CN101789222B - Method utilizing data enable signal to control time sequence of display device and time sequence control circuit - Google Patents
Method utilizing data enable signal to control time sequence of display device and time sequence control circuit Download PDFInfo
- Publication number
- CN101789222B CN101789222B CN2009100033926A CN200910003392A CN101789222B CN 101789222 B CN101789222 B CN 101789222B CN 2009100033926 A CN2009100033926 A CN 2009100033926A CN 200910003392 A CN200910003392 A CN 200910003392A CN 101789222 B CN101789222 B CN 101789222B
- Authority
- CN
- China
- Prior art keywords
- count value
- data enable
- enable signal
- display cycle
- value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Abstract
In a first display period of the display device, a first count value is recorded at the position of the rising edge of the data enable signal so as to control the time length of a horizontal line in the first display period, and zero clearing is carried out on the value of a counter after the first count value is recorded. Then, a second count value is recorded at the position of the falling edge of the data enable signal so as to indicate a time point of the data enable signal in the first display period from high potential to low potential. After a porch period following the first display period starts, zero clearing is carried out on the value of the counter when the value of the counter reaches the first count value. In a second display period following the porch period, zero clearing is carried out on the value of the counter at the position of the rising edge of the data enable signal and the time length of the horizontal line in the second display period is controlled according to the first count value.
Description
Technical field
The present invention is relevant to a kind of method and correlation timing control circuit that uses single data enable signal to control time sequence of display device, refers to especially a kind ofly use single data enable signal to control method and correlation timing control circuit that display hides from view the cycle sequential.
Background technology
Display system can be come the picture frame in the receiving video signals through transmission channel, pass through signal Processing again after, can on screen, show still image or dynamic video.Display system is generally followed (the Video Electronics Standards Association of VESA; VESA) broad sense that is proposed is formula (Generalized Timing Formula regularly; And can be divided into simulation display system or digital display system GTF), according to the form of view data.
Traditional CRT display (cathode ray tube; CRT) be simulation system; On screen and non-once show the view data of whole display frames, but the characteristic that persists through eye image, with after the picture signal segmentation again by column scan; That is after scanning the other end from a horizontal end, move to next bar horizontal line again and begin to scan next time.In the sequential control of CRT display, the signal packet of a picture contains horizontal picture signal and vertical picture signal.Horizontal picture signal comprises every horizontal view data, rising edge signal (front porch), horizontal-drive signal (horizontal synchronization) and back along signal (back porch).Any data are not transmitted along signal in forward position and back, but are used for letting cathode-ray tube (CRT) have the enough time to move to the starting point of scanning, and horizontal-drive signal then is used for notifying cathode-ray tube (CRT) when to begin scanning.In like manner, vertical picture signal comprises rising edge signal, vertical synchronizing signal (vertical synchronization) and back along signal, and its function is identical with horizontal picture signal.
Liquid crystal indicator (liquid crystal display; LCD) be digital display circuit; Because have low radiation, volume is little and advantage such as low power consuming, therefore replaces traditional cathode-ray tube display gradually, is widely used in mobile computer, personal digital assistant (personal digital assistant; PDA), flat-surface television, or on the information products such as mobile phone.In liquid crystal indicator, gate drivers (gate driver) sends a signal to the sweep trace on the display panel, with the switch of each pixel on the controlling level line.Source electrode driver (source driver) is the data line on transmitted image data (like the red, green, blue signal) to the display panel then, to drive the liquid crystal molecule of each pixel.LCD does not have the problem existence that cathode-ray tube (CRT) need move owing to differ widely with traditional monitor on the structure in sequential control, replacing is to drive the time of liquid crystal shutter and the time delay of data transmission etc.Generally still can adopt the VESA standard to carry out internal image and handle and timing technology, for example the usage level synchronizing signal is used for defining the initial of every sweep trace, and uses vertical synchronizing signal to be used for defining the initial of each frame.
Please refer to Fig. 1, Fig. 1 is the sequential chart of the sequential control mode of LCD in the prior art.Fig. 1 has shown vertical synchronizing signal Vsync, horizontal-drive signal Hsync, data enable (data enable) signal DE, and pixel data signal PX.In display cycle TD, horizontal-drive signal Hsync, vertical synchronizing signal Vsync and data enable signal DE have noble potential, and can write corresponding pixel respectively this moment with view data; Therefore in the cycle of hiding from view (porch period) TP, data enable signal DE has electronegative potential, does not write view data, can utilize this moment horizontal-drive signal Hsync and vertical synchronizing signal Vsync control between other signal synchronously.
Please refer to Fig. 2, Fig. 2 is the sequential chart of the sequential control mode of another LCD in the prior art.The sequential chart of Fig. 2 has shown data enable signal DE, pixel data signal PX, and count value LC, can be applicable to not have in the cycle of hiding from view the LCD of external horizontal synchronization Hsync and vertical synchronizing signal Vsync.Owing to do not have external horizontal synchronization Hsync and vertical synchronizing signal Vsync in the cycle of hiding from view; This prior art adopts single data enable signal DE to control the sequential when hiding from view the cycle; Understand the value of zero clearing (clear) thread count (line counter) at the rising edge of data enable signal DE; And the opening entry temporal information, make LCD in the cycle of hiding from view, can carry out other running according to count value.Yet, when leaving when hiding from view cycle T P and getting into display cycle TD once more, if data enable signal DE squints to some extent (Δ t as shown in Figure 1), synchronously problem can take place between data enable signal DE and the frame interior border.
Summary of the invention
The present invention provides a kind of method of using single data enable signal to control sequential in the display; It is included in the rising edge place of data enable signal in first display cycle; First count value of recording counter to be being controlled at horizontal line in this first display cycle, and after this first count value of record the value of this counter of zero clearing with counting again; The falling edge of this data enable signal in this first display cycle, second count value that writes down this counter is to be indicated in this data enable signal in this first display cycle is transferred to electronegative potential by noble potential time point; Follow all after dates that hides from view after this first display cycle in entering, when the value of this counter arrived this first count value, the value of this counter of zero clearing was to count again; And at the rising edge place that follows this data enable signal in this hides from view second display cycle of all after dates, the value of this counter of zero clearing is with counting again, and is controlled at horizontal time span in this second display cycle according to this first count value.
The present invention provides a kind of sequential control circuit that utilizes single data enable signal to control display in addition; It comprises counting assembly; Be used in first display cycle, following hiding from view the cycle after this first display cycle; And write down corresponding count value respectively following in this hides from view second display cycle of all after dates, and when receiving reset signal, count again; Pen recorder is used for first count value of rising edge place this counting assembly of record of in this first display cycle data enable signal, and in this first display cycle second count value of this counting assembly of falling edge record of this data enable signal; Control device; Be used for this reset signal being provided after this first count value of record, when this value of hiding from view all this counting assemblys of after date arrives this first count value this reset signal being provided, and the rising edge place of this data enable signal provides this reset signal in this second display cycle when getting into; And signal generation device, be used to provide this data enable signal, and this first with this second display cycle in control a horizontal time span according to this first count value.
Description of drawings
Fig. 1 is the sequential chart of the sequential control mode of LCD in the prior art.
Fig. 2 is the sequential chart of the sequential control mode of another LCD in the prior art.
Fig. 3 and Fig. 4 are the sequential chart of the sequential control mode of LCD among the present invention.
[primary clustering symbol description]
Hsync horizontal-drive signal Vsync vertical synchronizing signal
DE data enable signal PX pixel data signal
TD display cycle TP hides from view the cycle
CT control signal LC count value
410～490 steps
Embodiment
Please refer to Fig. 3, Fig. 3 is the sequential chart of the sequential control mode of LCD among the present invention.Fig. 3 has shown data enable signal DE, pixel data signal PX, count value LC, and control signal CT.To the LCD that does not have external horizontal synchronization Hsync and vertical synchronizing signal Vsync in the cycle of hiding from view; The present invention adopts single data enable signal DE to come control timing; All can recording time information at the rising edge (rising edge) of data enable signal DE and negative edge (falling edge); With as the timing control signal when the display cycle or the cycle of hiding from view, the method for recording time information of the present invention has detailed introduction in the instructions subsequent content.
During time point T1 in display cycle TD, control a horizontal time span at first at the count value N of the rising edge place of data enable signal DE call wire counter, and according to count value N.Write down behind the count value N zero clearing thread count again, and beginning counting again.
Then, the time point T in display cycle TD
M(T1+M) time, again at the count value M of the falling edge call wire counter of data enable signal DE, count value M representative data enable signal DE transfers the time point of electronegative potential to by noble potential, and count value M can be used to be used as the RP when producing inner clock signal.For instance, if want input control signal CT, can define the starting point T of control signal CT according to count value M to carry out other and operate hiding from view cycle T P
M-i(T
M-i) with end point T
M+j(T
M+ j).
After cycle T P was hidden from view in entering, when the value of thread count arrived count value N, can also count again once more by the zero clearing thread count this moment, but can't revise count value N during the period.In other words, the present invention keeps the sequential of hiding from view cycle T P by the count value N that before notes in the rising edge place of data enable signal DE.
LCD leaves when time point T2 and hides from view cycle T P, and when getting into display cycle TD once more, and this moment can be at the rising edge place zero clearing thread count of the first stroke data enable signal DE New count of laying equal stress on, but can't revise count value N.So, when hiding from view cycle T P and return general display cycle TD, fail suitable keeping and hide from view under the situation of time of cycle T P if skew to some extent or the external system of data enable signal DE take place, the present invention still can come control timing with correct count value N.
At last, when (for example time point T3), all can write down new count value N, and control horizontal time span in the follow-up display cycle TD when the rising edge of data enable signal DE in follow-up display cycle TD, occurring according to New count value N.Write down after the N value zero clearing thread count again, and beginning counting again.
Please refer to Fig. 4, the flowchart text of Fig. 4 utilize single data enable signal to control the method for sequential in the LCD among the present invention, comprise the following step:
Step 410: in first display cycle before one hides from view the cycle, the count value N of call wire counter is to control a horizontal time span at the rising edge place of data enable signal DE, and the thread count of zero clearing simultaneously is to count again;
Step 420: in first display cycle, transfer the time point of electronegative potential to by noble potential with unlabeled data enable signal DE at the count value M of the falling edge call wire counter of data enable signal DE;
Step 430: hide from view all after dates in entering, judge whether the value of thread count has arrived N: if the value of thread count has arrived N, execution in step 440; If the value of thread count is no show N still, execution in step 430;
Step 440: the zero clearing thread count is to count again;
Step 450: according to count value M so that a control signal to be provided;
Step 460: leaving in second display cycle of hiding from view all after dates, with counting again, and be controlled at horizontal time span in second display cycle according to first count value at the rising edge place zero clearing thread count of data enable signal DE;
Step 470: in second display cycle, transfer the time point of electronegative potential to by noble potential with unlabeled data enable signal DE at the count value M of the falling edge recording counter of data enable signal DE;
Step 480: in the 3rd display cycle after second display cycle, the count value N of recording counter is to be controlled at horizontal time span in the 3rd display cycle at the rising edge place of data enable signal DE, and the thread count of zero clearing simultaneously is to count again;
Step 490: in the 3rd display cycle, at the count value M of the falling edge recording counter of data enable signal DE to be indicated in data enable signal DE in the 3rd display cycle is transferred to electronegative potential by noble potential time point; Execution in step 410.
The above is merely the preferred embodiments of the present invention, and all equalizations of doing according to claim of the present invention change and modify, and all should belong to covering scope of the present invention.
Claims (12)
1. method of using single data enable signal to control sequential in the display, it comprises:
The rising edge place of data enable signal in first display cycle, first count value of recording counter to be being controlled at horizontal time span in this first display cycle, and after this first count value of record the value of this counter of zero clearing with counting again;
The falling edge of this data enable signal in this first display cycle, second count value that writes down this counter is to be indicated in this data enable signal in this first display cycle is transferred to electronegative potential by noble potential time point;
Follow all after dates that hides from view after this first display cycle in entering, when the value of this counter arrived this first count value, the value of this counter of zero clearing was to count again; And
At the rising edge place that follows this data enable signal in this hides from view second display cycle of all after dates, the value of this counter of zero clearing is with counting again, and is controlled at horizontal time span in this second display cycle according to this first count value.
2. the method for claim 1, it comprises in addition:
The falling edge of this data enable signal in this second display cycle, the value that writes down this counter is to be indicated in this data enable signal in this second display cycle is transferred to electronegative potential by noble potential time point.
3. method as claimed in claim 2, it comprises in addition:
The rising edge place of this data enable signal in the 3rd display cycle after this second display cycle; The 3rd count value that writes down this counter to be being controlled at horizontal time span in the 3rd display cycle, and after record the 3rd count value the value of this counter of zero clearing with counting again.
4. method as claimed in claim 2, it comprises in addition:
The sequential of control signal, this is provided according to this second count value when hiding from view the cycle.
5. method as claimed in claim 2, wherein the value of record and this counter of zero clearing comprises the value of record and zero clearing thread count.
6. the method for claim 1, it comprises in addition:
Whether the value of judging this counter arrives this first count value.
7. sequential control circuit that utilizes single data enable signal to control display, it comprises:
Counting assembly is used in first display cycle, is following hiding from view the cycle after this first display cycle, and writes down corresponding count value respectively following in this hides from view second display cycle of all after dates, and when receiving reset signal, counts again;
Pen recorder is used for first count value of rising edge place this counting assembly of record of in this first display cycle data enable signal, and in this first display cycle second count value of this counting assembly of falling edge record of this data enable signal;
Control device; Be used for this reset signal being provided after this first count value of record, when this value of hiding from view all this counting assemblys of after date arrives this first count value this reset signal being provided, and the rising edge place of this data enable signal provides this reset signal in this second display cycle when getting into; And
Signal generation device is used to provide this data enable signal, and this first with this second display cycle in control a horizontal time span according to this first count value.
8. sequential control circuit as claimed in claim 7; This pen recorder value of this counter of the falling edge of this data enable signal record in this second display cycle also wherein is to be indicated in this data enable signal in this second display cycle is transferred to electronegative potential by noble potential time point.
9. sequential control circuit as claimed in claim 7, wherein:
This pen recorder is the rising edge place of this data enable signal in the 3rd display cycle after this second display cycle also, writes down the 3rd count value of this counter;
This signal generation device is also controlled a horizontal time span according to the 3rd count value in the 3rd display cycle; And
This control device also is used for after record the 3rd count value, this reset signal being provided.
10. sequential control circuit as claimed in claim 7, wherein this signal generation device also provides the sequential of control signal according to this second count value when this hides from view the cycle.
11. sequential control circuit as claimed in claim 7, wherein this counting assembly comprises thread count.
12. sequential control circuit as claimed in claim 7, it also comprises:
Judgment means is used for when this hides from view the cycle, judging whether the value of this counter arrives this first count value.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009100033926A CN101789222B (en) | 2009-01-22 | 2009-01-22 | Method utilizing data enable signal to control time sequence of display device and time sequence control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009100033926A CN101789222B (en) | 2009-01-22 | 2009-01-22 | Method utilizing data enable signal to control time sequence of display device and time sequence control circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101789222A CN101789222A (en) | 2010-07-28 |
| CN101789222B true CN101789222B (en) | 2012-05-23 |
Family
ID=42532416
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2009100033926A Expired - Fee Related CN101789222B (en) | 2009-01-22 | 2009-01-22 | Method utilizing data enable signal to control time sequence of display device and time sequence control circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101789222B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4888591B1 (en) * | 2010-09-17 | 2012-02-29 | オムロン株式会社 | Image data transmission system and electronic device |
| CN117280410A (en) * | 2022-04-22 | 2023-12-22 | 京东方科技集团股份有限公司 | Read time sequence control method, device and computer readable storage medium |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6636205B1 (en) * | 2000-04-10 | 2003-10-21 | Infocus Corporation | Method and apparatus for determining a clock tracking frequency in a single vertical sync period |
| CN1790476A (en) * | 2004-12-13 | 2006-06-21 | Nec液晶技术株式会社 | Display device and automatic synchronization judging circuit |
| CN101031953A (en) * | 2004-09-30 | 2007-09-05 | 夏普株式会社 | Timing signal generating circuit, electronic device, display device, image receiving device and driving method |
| CN101051432A (en) * | 2007-04-04 | 2007-10-10 | 友达光电股份有限公司 | Method for correcting display data enable signal |
-
2009
- 2009-01-22 CN CN2009100033926A patent/CN101789222B/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6636205B1 (en) * | 2000-04-10 | 2003-10-21 | Infocus Corporation | Method and apparatus for determining a clock tracking frequency in a single vertical sync period |
| CN101031953A (en) * | 2004-09-30 | 2007-09-05 | 夏普株式会社 | Timing signal generating circuit, electronic device, display device, image receiving device and driving method |
| CN1790476A (en) * | 2004-12-13 | 2006-06-21 | Nec液晶技术株式会社 | Display device and automatic synchronization judging circuit |
| CN101051432A (en) * | 2007-04-04 | 2007-10-10 | 友达光电股份有限公司 | Method for correcting display data enable signal |
Non-Patent Citations (1)
| Title |
|---|
| JP平2-113679A 1990.04.25 |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101789222A (en) | 2010-07-28 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TWI407349B (en) | Method for determining scanning times of touch control signal in a touch panel | |
| CN100565287C (en) | Liquid crystal indicator and driving method thereof | |
| JP2018060199A (en) | Display device capable of changing frame rate | |
| CN1928700B (en) | Projection type display device and method for controlling the same | |
| CN100530331C (en) | Liquid crystal panel driving device and its driving method | |
| CN102118592A (en) | System for displaying multivideo | |
| US20100302352A1 (en) | Video data signal, system and method for controlling shutter glasses | |
| CN102542967A (en) | Timing controller, display device using the same, and method for driving timing controller | |
| TW201604731A (en) | Touch display device and control method thereof | |
| CN102737604B (en) | System and method for driving and scanning display panel | |
| WO2015007051A1 (en) | Touch display apparatus and driving method thereof | |
| CN101320544B (en) | Data processing circuit, LCD and its driving method | |
| US10319327B2 (en) | Time-sharing driving method of touch display panel | |
| CN101789222B (en) | Method utilizing data enable signal to control time sequence of display device and time sequence control circuit | |
| CN1945683A (en) | Display device using LCD panel and a method of executing timing control options thereof | |
| CN101295474A (en) | Image processing method and related device for display equipment | |
| US11804195B2 (en) | Display equipment, brightness compensation device and brightness compensation method | |
| CN204807860U (en) | Liquid crystal display panel's testing arrangement | |
| TWI397896B (en) | Method and circuit for controlling timings in display devices using a single data enable signal | |
| CN101000756A (en) | Method and apparatus for image frame synchronization | |
| CN100380189C (en) | Method for displaying liquid crystal display panel dynamic image | |
| US8134530B2 (en) | Liquid crystal display device and method of driving the same | |
| TWI765293B (en) | Receiving device, video recording system and method for reducing video latency in video recording system | |
| CN102087447B (en) | Liquid crystal display device with double-gate-electrode drive architecture | |
| WO2015043051A1 (en) | Touch control display device and drive method therefor |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20120523 Termination date: 20150122 |
|
| EXPY | Termination of patent right or utility model |