CN101788769B - Method for forming semiconductor device layer by exposure - Google Patents

Method for forming semiconductor device layer by exposure Download PDF

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Publication number
CN101788769B
CN101788769B CN2009100458216A CN200910045821A CN101788769B CN 101788769 B CN101788769 B CN 101788769B CN 2009100458216 A CN2009100458216 A CN 2009100458216A CN 200910045821 A CN200910045821 A CN 200910045821A CN 101788769 B CN101788769 B CN 101788769B
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China
Prior art keywords
layer
overlay
characteristic information
anterior layer
wafer
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Expired - Fee Related
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CN2009100458216A
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Chinese (zh)
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CN101788769A (en
Inventor
肖楠
邢一飞
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Semiconductor Manufacturing International Shanghai Corp
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Semiconductor Manufacturing International Shanghai Corp
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Abstract

The invention discloses a method for forming a semiconductor device layer by exposure, which is characterized by comprising that: A, when a lighthouse is aligned with a front layer, the lighthouse measures an alignment mark of the front layer to acquire characteristic information of a front layer wafer, and the lighthouse measures an overlapped precision measuring identifier of the front layer to acquire characteristic information of an exposure unit in the front layer; B, the characteristic information of the front layer wafer and the characteristic information of the exposure unit in the front layer are fed back to the lighthouse; and C, the lighthouse performs exposure to form the layer according to the fed back characteristic information of the wafer and characteristic information of the exposure unit. Due to the adoption of the method, the production efficiency of the wafer can be greatly improved.

Description

Exposure forms the method for semiconductor devices when layer
Technical field
The present invention relates to the manufacture of semiconductor field, particularly a kind of the exposure forms the method for semiconductor devices when layer.
Background technology
Semiconductor device is manufactured by the material layer that produces a series of patterned material layer and non-patterning, wherein the connection that spatially is relative to each other of the feature on patterned material layer.Therefore, in manufacture process, each material layer that is patterned all must so just must be considered the overlay precision of last material layer and present material interlayer in alignment with the previous material layer that is patterned.Be developed to critical size (the Critical Dimensions that can provide littler when manufacture of semiconductor, CD), reduction device size and when increasing number of layers purpose complexity, for quality, fiduciary level and the yield of device, the overlay precision between material layer and the material layer becomes more and more important.And the misalignment between material layer and the material layer may cause the reduction of device performance, even may be because of for example out-of-alignment material layer, the short circuit that is caused and cause failure of apparatus.Therefore need in processing procedure, measure the overlay skew between material layer and the material layer, to guarantee that overlay error is in the error that allows.
In the prior art, wafer 1 is divided into several exposing units with periodic structure 2, as shown in Figure 1.This exposing unit 2 is patterned last material layer, and promptly anterior layer is foursquare exposing unit 2 among Fig. 1.Be provided with scribe line 3 between exposing unit and exposing unit, alignment mark and overlay accurately measure sign (OVL mark) and all are located on the scribe line 3, form simultaneously with exposing unit 2.Alignment mark is generally accurate coordinate "+", has the characteristic information of wafer, can select exposing unit, and alignment mark is arranged on this exposing unit scribe line 3 on every side.Among Fig. 1 alignment mark is arranged near on the scribe line 3 around several exposing units 2 at wafer 1 edge, as shown in Figure 1, each exposing unit all has two alignment marks, respectively along X-direction and Y direction, is located at the inferior horn in each exposing unit left side and the left side of downside.OVL mark generally is the square with identical size, the characteristic information that has the anterior layer exposing unit along X-direction and Y direction, is provided with 4 OVL mark, be evenly distributed on exposing unit around, and OVL mark is located on the scribe line 3 of exposing unit of crystal circle center.
At present, in existing aligning measuring method, generally carry out the anterior layer exposure desk earlier and aim at, and then the overlay of work as layer with anterior layer accurately measures step.Existing making semiconductor devices anterior layer and when the layer method may further comprise the steps:
Step 11, utilize photoetching technique, exposure imaging forms exposing unit, the alignment mark of anterior layer and the OVL mark of anterior layer on the anterior layer wafer;
Step 12, carry out exposure desk and aim at, the coordinate of exposure desk is aimed at the coordinate (alignment mark) on the anterior layer wafer.At this moment, the characteristic information that feeds back to exposure desk is the characteristic information of wafer;
Step 13, utilize the characteristic information feed back to exposure desk, carry out the exposure desk exposure, to form, comprise exposing unit on the layer crystal circle, when the alignment mark of layer with as the OVL mark of layer when layer;
Step 14, (overlay OVL) works as layer and accurately measures with the overlay of anterior layer to utilize overlay to accurately measure instrument; If overlay error is bigger, then return execution in step 12 again.
Because on the present material layer of patterning, promptly when layer, also be provided with OVL mark, just the shape of OVL mark is less than the shape of anterior layer, as shown in Figure 2, the OVL mark of anterior layer is a housing 201, when the OVL of layer mark is an inside casing 202, as long as the overlay precision of housing and inside casing guarantees then can carry out next step operation smoothly in the overlay error that allows.Fig. 2 is the desirable synoptic diagram that housing 201 and inside casing 202 are aimed at fully.
Allow overlay error generally according to the difference of size of devices and other parameters and difference can be drawn by empirical value, thereby set a permissible error scope.In this permissible error scope, can ignore the influence of the aspect of performance of device, then can carry out next step operation, otherwise, need return step 12 again.For example,,, then this overlay error is fed back to exposure desk, after exposure desk adjusts again according to overlay error, returns step 12 again when layer and anterior layer overlay error are bigger if in step 14, until overlay error in allowed band.But in the step 12, exposure desk is aimed at the whole wafer alignment of anterior layer, but in the exposure process of anterior layer, because of mask by illumination generation thermal expansion, and make the exposing unit generation deformation of anterior layer, cause the skew at center, and this deformation in exposure desk is aimed at be measure less than, so in step 14, accurately measure instrument (overlay with overlay, OVL), measure anterior layer and when layer the overlay precision time, overlay error can be bigger, need carry out repeatedly alignment function again, inefficiency not only, and reduced the production efficiency of wafer.
Summary of the invention
In view of this, fundamental purpose of the present invention is to provide a kind of the exposure to form the method for semiconductor devices when layer, and this method can improve the production efficiency of wafer.
For achieving the above object, technical scheme of the present invention specifically is achieved in that
The invention discloses a kind of the exposure and form the method for semiconductor devices when layer, key is, comprising:
When A, exposure desk aligning anterior layer, exposure desk is measured the anterior layer alignment mark, obtains the characteristic information of anterior layer wafer; Exposure desk is measured the anterior layer overlay and is accurately measured sign, obtains the characteristic information of exposing unit in the anterior layer;
B, with the characteristic information of described anterior layer wafer and the characteristic information of exposing unit, feed back to exposure desk;
C, exposure desk expose formation when layer according to the characteristic information of the wafer of feedback and the characteristic information of exposing unit.
Forming after layer, comprising that further utilizing overlay to accurately measure instrument work as the step that the overlay of layer and anterior layer accurately measures, if describedly work as layer overlay precision with anterior layer in allowed band, end operation then; Re-execute steps A otherwise return.
The characteristic information of described wafer is the coordinate information of alignment mark; The characteristic information of described exposing unit is the coordinate information that overlay accurately measures sign.
The coordinate that described overlay accurately measures sign is positioned at the center that overlay accurately measures sign.
The overlay of described measurement anterior layer accurately measures the method for sign for the coordinate of exposure desk is aimed at the coordinate that overlay accurately measures sign.
As seen from the above technical solutions, exposure provided by the invention forms the method for semiconductor devices when layer, aim in the anterior layer step at exposure desk, on the basis of existing technology, the coordinate of exposure desk not only with the coordinate (alignment mark) on the anterior layer wafer is aimed at, and aim at the coordinate of anterior layer OVL mark, like this when anterior layer exposing unit generation deformation, deformation also takes place in anterior layer OVL mark, by measure the accurate coordinate of anterior layer OVL mark simultaneously with exposure desk, this characteristic information together with the anterior layer wafer is all fed back to exposure desk, when exposing, further improved exposure precision like this when layer when layer.So next, accurately measuring in the step when the overlay of layer with anterior layer, the overlay precision can improve naturally, thereby has improved the production efficiency of wafer.
Description of drawings
Fig. 1 is the wafer synoptic diagram with several exposing units.
Fig. 2 is anterior layer and works as the desirable synoptic diagram that layer is aimed at fully.
Fig. 3 accurately measures the coordinate synoptic diagram of sign for overlay around the exposing unit.
Fig. 4 makes the anterior layer of semiconductor devices for the present invention and works as the schematic flow sheet of layer.
Fig. 5 is a changes in coordinates synoptic diagram after certain exposing unit generation deformation.
Embodiment
For make purpose of the present invention, technical scheme, and advantage clearer, below with reference to the accompanying drawing embodiment that develops simultaneously, the present invention is described in more detail.
The present invention utilizes synoptic diagram to describe in detail, and when the embodiment of the invention was described in detail in detail, for convenience of explanation, the synoptic diagram of expression structure can be disobeyed general ratio and be done local the amplification, should be with this as limitation of the invention.
When the present invention aimed at anterior layer at exposure desk, the coordinate of exposure desk was not only aimed at the coordinate (alignment mark) on the anterior layer wafer, and, simultaneously the coordinate of exposure desk is aimed at the coordinate of anterior layer OVL mark.At this moment, the characteristic information that feeds back to exposure desk not only comprises the anterior layer wafer, and comprises the exposing unit of anterior layer, when exposing when layer, has further improved the exposure precision when layer like this.So next, accurately measuring in the step when the overlay of layer with anterior layer, the overlay precision can improve naturally.
The embodiment of the invention still is divided into wafer 1 several exposing units with periodic structure 2, as shown in Figure 1.This exposing unit 2 is patterned last material layer, and promptly anterior layer is foursquare exposing unit in the present embodiment.Be provided with scribe line between exposing unit and exposing unit, alignment mark and OVL mark are located on the scribe line 3, form simultaneously with exposing unit.Alignment mark is generally accurate coordinate "+", has the characteristic information of wafer, can select exposing unit, and alignment mark is arranged on this exposing unit scribe line on every side.In the present embodiment alignment mark is arranged near on the scribe line around several exposing units 2 at wafer 1 edge, as shown in Figure 1, each exposing unit 2 all has two alignment marks, respectively along X-direction and Y direction, is located at the inferior horn in each exposing unit left side and the left side of downside.OVL mark is the square with identical size generally, has the characteristic information of anterior layer exposing unit, along X-direction and Y direction, 4 OVL mark is set, be evenly distributed on exposing unit 2 around.The coordinate of OVL mark is got its center separately, be defined as respectively (a1, b1), (a2, b2), (a3, b3), (a4, b4).In the present embodiment, OVLmark is located on the scribe line of exposing unit 2 of crystal circle center, as shown in Figure 1.The OVL mark that amplifies and this exposing unit are as shown in Figure 3.
As shown in Figure 4, among the present invention, make the semiconductor devices anterior layer and may further comprise the steps when the method for layer:
Step 41, utilize photoetching technique, exposure imaging forms exposing unit on the anterior layer wafer and the alignment mark of anterior layer, the OVL mark of anterior layer;
Step 42, carry out exposure desk and aim at, the coordinate of exposure desk is aimed at the coordinate (alignment mark) on the anterior layer wafer, simultaneously, the coordinate of exposure desk is aimed at the coordinate of anterior layer OVL mark.At this moment, the characteristic information that feeds back to exposure desk not only comprises the anterior layer wafer, and comprises the exposing unit of anterior layer;
Step 43, utilize the characteristic information feed back to exposure desk, carry out the exposure desk exposure,, comprise when a layer exposing unit, when the alignment mark of layer with as a layer OVL mark to form when layer;
Step 44, (overlay OVL) works as layer and accurately measures with the overlay of anterior layer to utilize overlay to accurately measure instrument; If overlay error is bigger, then return execution in step 42 again.
Because when exposure desk is aimed at anterior layer in the prior art, the coordinate of exposure desk is to aim at the coordinate (alignment mark) on the anterior layer wafer, if certain exposing unit generation deformation of anterior layer, cause the skew at center, exposure desk is can't be detected with aiming at of anterior layer wafer, the present invention at step 42 exposure desk on time, simultaneously the coordinate of exposure desk is aimed at the coordinate of anterior layer OVL mark, like this when the situation of deformation such as Fig. 5 appears in the anterior layer exposing unit, the center of anterior layer exposing unit 2 is offset to the right, coordinate by original (a, b) become (a ', b '), at this moment, deformation also takes place in anterior layer OVL mark, by measure the accurate coordinate of anterior layer OVL mark simultaneously with exposure desk, this characteristic information together with the anterior layer wafer is all fed back to exposure desk, further improved the precision that exposure desk is measured.When so next carrying out step 44, just because of in step 42 exposure desk alignment procedures, measured the deformation coordinate of anterior layer OVL mark with exposure desk, the deformation situation that can reflect certain exposing unit of anterior layer accurately, in the exposure desk alignment procedures, just compensated this defective, so in step 43, form when layer, improved the exposure precision when layer, when next carrying out step 44, the Aligning degree of inside casing and housing is very high naturally so, repeatedly repetitive operation, thus the production efficiency of wafer improved greatly.
Those skilled in the art is to be understood that, the forming process of last material layer (anterior layer) and present material layer (working as layer) among the present invention, and to the operation of exposure desk itself, it all is prior art, do not repeat them here, those skilled in the art obviously can carry out suitable modifications and variations not breaking away from the spirit or scope of the present invention.

Claims (4)

1. the formation semiconductor devices that exposes is worked as the method for layer, it is characterized in that, comprising:
When A, exposure desk aligning anterior layer, exposure desk is measured the anterior layer alignment mark, obtains the characteristic information of anterior layer wafer; Exposure desk is measured the anterior layer overlay and is accurately measured sign, obtains the characteristic information of exposing unit in the anterior layer;
B, with the characteristic information of described anterior layer wafer and the characteristic information of exposing unit, feed back to exposure desk;
C, exposure desk expose formation when layer according to the characteristic information of the wafer of feedback and the characteristic information of exposing unit;
The characteristic information of described wafer is the coordinate information of alignment mark; The characteristic information of described exposing unit is the coordinate information that overlay accurately measures sign.
2. the method for claim 1, it is characterized in that, forming after layer, comprise that further utilizing overlay to accurately measure instrument works as layer the step that the overlay with anterior layer accurately measures, if described when layer and the overlay precision of anterior layer in allowed band, end operation then; Re-execute steps A otherwise return.
3. the method for claim 1 is characterized in that, the coordinate that described overlay accurately measures sign is positioned at the center that overlay accurately measures sign.
4. method as claimed in claim 3 is characterized in that, the overlay of described measurement anterior layer accurately measures the method for sign for the coordinate of exposure desk is aimed at the coordinate that overlay accurately measures sign.
CN2009100458216A 2009-01-23 2009-01-23 Method for forming semiconductor device layer by exposure Expired - Fee Related CN101788769B (en)

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Cited By (1)

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CN104777723A (en) * 2015-04-20 2015-07-15 武汉新芯集成电路制造有限公司 Overlay alignment mark and overlay measuring method

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CN103197501B (en) * 2013-02-19 2015-09-09 北京京东方光电科技有限公司 A kind of array base palte and preparation method thereof and display device
US9646896B2 (en) * 2013-07-12 2017-05-09 Taiwan Semiconductor Manufacturing Co., Ltd. Lithographic overlay sampling
CN104423144B (en) * 2013-08-23 2019-03-19 上海凸版光掩模有限公司 A kind of monitoring method of photomask and photomask alignment precision
CN110196535B (en) * 2019-06-20 2021-10-26 合肥芯碁微电子装备股份有限公司 Sectional exposure method of roll-to-roll maskless laser direct writing photoetching equipment

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Publication number Priority date Publication date Assignee Title
CN1971845A (en) * 2006-12-07 2007-05-30 中国科学院电工研究所 Overlay alignment method and device using atomic force microscope
CN101059661A (en) * 2006-04-04 2007-10-24 Asml荷兰有限公司 Lithographic apparatus and device manufacturing method

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CN101059661A (en) * 2006-04-04 2007-10-24 Asml荷兰有限公司 Lithographic apparatus and device manufacturing method
CN1971845A (en) * 2006-12-07 2007-05-30 中国科学院电工研究所 Overlay alignment method and device using atomic force microscope

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104777723A (en) * 2015-04-20 2015-07-15 武汉新芯集成电路制造有限公司 Overlay alignment mark and overlay measuring method
CN104777723B (en) * 2015-04-20 2018-06-01 武汉新芯集成电路制造有限公司 Alignment mark and alignment measuring method

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