CN101783389A - Resistive random access memory with asymmetric electrical characteristics - Google Patents
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Abstract
本发明公开了一种具有非对称电学特性的阻变存储器，包括：上电极；下电极；以及包含在上电极和下电极之间的具有阻变特性的阻变层薄膜。本发明的阻变存储器具有非对称的电学特性，在低阻态时具有整流作用，自身能够抑制串扰现象。本发明的阻变存储器具有结构简单，易集成，成本低的优点，有利于本发明的广泛推广和应用。
The invention discloses a resistive variable memory with asymmetric electrical characteristics, which comprises: an upper electrode; a lower electrode; and a resistive variable layer thin film with resistive characteristic contained between the upper electrode and the lower electrode. The resistive variable memory of the present invention has asymmetric electrical characteristics, has a rectification function in a low-resistance state, and can suppress crosstalk by itself. The resistive variable memory of the present invention has the advantages of simple structure, easy integration and low cost, and is beneficial to the wide popularization and application of the present invention.
Description
技术领域technical field
本发明涉及微电子制造及存储器技术领域，尤其涉及一种具有非对称电学特性的阻变存储器。The invention relates to the technical field of microelectronics manufacturing and memory, in particular to a resistive variable memory with asymmetric electrical characteristics.
背景技术Background technique
非易失性存储器，它的主要特点是在不加电的情况下也能够长期保持存储的信息，它既有ROM的特点，又有很高的存取速度。随着多媒体应用、移动通信等对大容量、低功耗存储的需要，非易失性存储器，特别是闪速存储器(Flash)，所占半导体器件的市场份额变得越来越大，也越来越成为一种相当重要的存储器类型。Non-volatile memory, its main feature is that it can keep the stored information for a long time without power on. It has both the characteristics of ROM and high access speed. With the demand for large-capacity and low-power storage in multimedia applications and mobile communications, the market share of non-volatile memory, especially flash memory (Flash), is becoming larger and larger, and it is also becoming more and more It has become an increasingly important type of memory.
当前市场上的非易失性存储器以闪存(Flash)为主流，但是闪存器件存在操作电压过大、操作速度慢、耐久力不够好以及由于在器件缩小化过程中过薄的隧穿氧化层将导致记忆时间不够长等缺点。阻变存储器由于具备操作电压低、结构简单、非破坏性读取、操作速度快、记忆时间(Retention)长、器件面积小、耐久力(Endurance)好、能进行三维堆叠等特点被视为下一代非易失存储器的强有力竞争者。Flash memory (Flash) is the mainstream of the non-volatile memory currently on the market, but flash memory devices have excessive operating voltage, slow operating speed, insufficient durability, and the over-thin tunnel oxide layer will Leading to shortcomings such as insufficient memory time. Resistive variable memory is regarded as a next-generation memory due to its low operating voltage, simple structure, non-destructive reading, fast operation speed, long memory time (Retention), small device area, good endurance (Endurance), and the ability to perform three-dimensional stacking. A strong contender for a generation of non-volatile memory.
阻变存储器的典型结构为上下电极之间夹含一层能够发生电阻转变的阻变层材料的“三明治”结构。如图1所示，在外加偏压的作用下，器件的电阻会在高低阻态之间发生转换从而实现“0”和“1”的存储。与闪存(Flash)的电荷存储机制不一样，RRAM是非电荷存储机制，因此可以解决Flash中因隧穿氧化层变薄而造成的电荷泄露的问题，具有更好的可缩小性。The typical structure of the resistive variable memory is a "sandwich" structure in which a layer of resistive layer material capable of resistive switching is sandwiched between the upper and lower electrodes. As shown in Figure 1, under the action of an external bias voltage, the resistance of the device will switch between high and low resistance states to realize the storage of "0" and "1". Unlike the charge storage mechanism of flash memory (Flash), RRAM is a non-charge storage mechanism, so it can solve the problem of charge leakage caused by the thinning of the tunnel oxide layer in Flash, and has better scalability.
目前阻变存储器的研究主要集中在电阻转变机制的探讨和单管性能的提升与集成上。到目前为止，除Spansion公司在2005年的IEDM上公开发布的64Kb测试芯片外，还没有关于RRAM的量产消息，RRAM的集成技术也是其实用化的基础。RRAM的集成常用的结构包含只有一个可变电阻(1R)、一个晶体管一个可变电阻(1T1R)和一个二极管一个可变电阻(1D1R)三种结构。在这三种集成方案中，采用1R结构集成碰到的严重的问题是读串扰。如图2所示相邻的四个器件，若A1为高阻态而其他为低阻态，在读取A1的阻态时，希望的电流通路如图2中实线所示，但实际上的电流通路却如图2中虚线所示，使得读出来的电阻值不是A1的电阻了，这就是读串扰现象。采用1T1R结构结构的集成方案中的器件单元面积最终是由晶体管决定的，如果不考虑晶体管的驱动电流的影响的话，最小的单元面积为6F2(F为特征线宽)，并且采用1T1R结构无法进行三维集成。基于1D1R结构中的二极管的性能指标却一直是RRAM研究工作者非常棘手的一个问题。以32nm技术节点来计，如果RRAM的复位(Reset)电流能够降低到10微安，所需二极管的电流密度高达106A/cm2，而目前所报道的用于RRAM整流二极管的电流密度只有104A/cm2，此外，采用1D1R结构的集成方式因为二极管的分压会提高器件的操作电压，增大功耗。At present, the research of resistive memory is mainly focused on the discussion of the resistance transition mechanism and the improvement and integration of single-transistor performance. So far, except for the 64Kb test chip publicly released by Spansion on the IEDM in 2005, there is no news about the mass production of RRAM, and the integration technology of RRAM is also the basis for its practical application. Commonly used structures for the integration of RRAM include only one variable resistor (1R), one transistor and one variable resistor (1T1R), and one diode and one variable resistor (1D1R). Among these three integration schemes, the serious problem encountered by adopting 1R structure integration is read crosstalk. For the four adjacent devices shown in Figure 2, if A1 is in a high-impedance state and the others are in a low-impedance state, when reading the resistance state of A1, the desired current path is shown by the solid line in Figure 2, but in fact However, the current path is shown by the dotted line in Figure 2, so that the read resistance value is not the resistance of A1, which is the phenomenon of read crosstalk. The unit area of the device in the integration scheme using the 1T1R structure is ultimately determined by the transistor. If the influence of the driving current of the transistor is not considered, the minimum unit area is 6F 2 (F is the characteristic line width), and the 1T1R structure cannot Perform three-dimensional integration. The performance index based on the diode in the 1D1R structure has always been a very difficult problem for RRAM researchers. Based on the 32nm technology node, if the reset (Reset) current of RRAM can be reduced to 10 microamps, the current density of the required diode is as high as 10 6 A/cm 2 , while the current density of the current reported RRAM rectifier diode is only 10 4 A/cm 2 . In addition, the integration method adopting the 1D1R structure will increase the operating voltage of the device and increase the power consumption because the voltage division of the diode will increase the power consumption.
由此可见，采用具有如图1所示电学特性的基于1R结构的集成方案具有严重的串扰问题，如果通过采用精心的外围电路设计来避免串扰势必要增大设计的复杂度和成本，这使得图1所示这种对称转变特性的1R结构的集成受到限制。1T1R结构集成中存储单元面积的决定因素是选择晶体管的大小，这样就丧失了RRAM的优异的可缩小性的优势，而且无法进行三维集成，在存储密度上将使得RRAM的优势大打折扣。基于1D 1R结构的RRAM阵列除了具有和1R结构一样的最小存储单元面积(4F2)和三维集成优势之外，通过选择二极管还可以抑制串扰现象。但是目前用于RRAM整流的二极管的电流密度还不是很高，当RRAM存储器的器件面积持续缩小时，二极管提供的电流不足以使得阻变存储器发生电阻转变，因此基于1D1R结构的集成方案在很大程度上依赖于整流二极管的性能，这在一定程度上制约了基于1D1R结构集成的发展。It can be seen that the integration scheme based on the 1R structure with the electrical characteristics shown in Figure 1 has serious crosstalk problems. If the crosstalk is avoided by adopting careful peripheral circuit design, the complexity and cost of the design will increase, which makes The integration of 1R structures with such symmetric transition properties as shown in Figure 1 is limited. In the 1T1R structure integration, the determining factor of the memory unit area is to select the size of the transistor, which loses the advantages of RRAM's excellent scalability and cannot be integrated in three dimensions, which will greatly reduce the advantages of RRAM in terms of storage density. The RRAM array based on the 1D 1R structure not only has the same minimum memory cell area (4F 2 ) and three-dimensional integration advantages as the 1R structure, but also can suppress crosstalk by selecting diodes. However, the current density of the diode used for RRAM rectification is not very high. When the device area of RRAM memory continues to shrink, the current provided by the diode is not enough to make the resistance change of the resistive memory. Therefore, the integration scheme based on the 1D1R structure has a great potential To a certain extent, it depends on the performance of the rectifier diode, which restricts the development based on 1D1R structure integration to a certain extent.
发明内容Contents of the invention
(一)要解决的技术问题(1) Technical problems to be solved
针对上述现有RRAM集成方案中遇到的问题，本发明的主要目的在于提供一种制造工艺简单、制造成本低、利用非对称的电学特性自身能够抑制RRAM集成中的串扰现象的阻变存储器。In view of the above-mentioned problems encountered in the existing RRAM integration scheme, the main purpose of the present invention is to provide a resistive variable memory with simple manufacturing process, low manufacturing cost, and capable of suppressing crosstalk in RRAM integration by using asymmetric electrical characteristics itself.
(二)技术方案(2) Technical solution
为达到上述目的，本发明提出了一种具有非对称电学特性的阻变存储器，该阻变存储器包括：In order to achieve the above purpose, the present invention proposes a resistive variable memory with asymmetric electrical characteristics, the resistive variable memory includes:
上电极；upper electrode;
下电极；以及the lower electrode; and
包含在上电极和下电极之间的具有阻变特性的阻变层薄膜。A resistive switch layer thin film with resistive properties is contained between the upper electrode and the lower electrode.
上述方案中，所述上电极和下电极采用能够与阻变层薄膜形成不同的接触势垒的材料。In the above solution, the upper electrode and the lower electrode are made of materials capable of forming different contact barriers with the resistive variable layer thin film.
上述方案中，所述上电极和下电极采用Au、Pt、Ag、Pd、W、Ti、Al、Cu、TiN、ITO、IZO、YBCO、LaAlO3、SrRuO3和多晶硅中的任一种。In the above solution, the upper electrode and the lower electrode use any one of Au, Pt, Ag, Pd, W, Ti, Al, Cu, TiN, ITO, IZO, YBCO, LaAlO 3 , SrRuO 3 and polysilicon.
上述方案中，所述阻变层薄膜采用具有电阻转变特性的NiO、TiO2、CuOx、ZrO2、Ta2O5、Al2O3、CoO、HfOx、MoOx、ZnO、PCMO、LCMO、SrTiO3、BaTiO3、SrZrO和非晶硅中的任一种材料。In the above solution, the resistive switch layer film is made of NiO, TiO 2 , CuO x , ZrO 2 , Ta 2 O 5 , Al 2 O 3 , CoO, HfO x , MoO x , ZnO, PCMO, LCMO , SrTiO 3 , BaTiO 3 , SrZrO and any one of amorphous silicon materials.
上述方案中，所述阻变层薄膜采用具有电阻转变特性的NiO、TiO2、CuOx、ZrO2、Ta2O5、Al2O3、CoO、HfOx、MoOx、ZnO、PCMO、LCMO、SrTiO3、BaTiO3、SrZrO和非晶硅经过掺杂改性后的任一种材料。In the above solution, the resistive switch layer film is made of NiO, TiO 2 , CuO x , ZrO 2 , Ta 2 O 5 , Al 2 O 3 , CoO, HfO x , MoO x , ZnO, PCMO, LCMO , SrTiO 3 , BaTiO 3 , SrZrO and amorphous silicon modified by doping any material.
上述方案中，所述阻变层薄膜的厚度为30至200nm。In the above solution, the thickness of the resistive switch layer film is 30 to 200 nm.
上述方案中，所述上电极或下电极与阻变层薄膜之间接触形成整流特性。In the above scheme, the contact between the upper electrode or the lower electrode and the thin film of the resistive variable layer forms a rectification characteristic.
上述方案中，该阻变存储器具有非对称的电学特性，在低阻态时具有整流的作用。In the above solution, the RRAM has an asymmetric electrical characteristic, and has a rectifying function in a low-resistance state.
(三)有益效果(3) Beneficial effects
从上述技术方案可以看出，本发明具有以下有益效果：As can be seen from the foregoing technical solutions, the present invention has the following beneficial effects:
1、利用本发明，器件的制备方法简单，降低了存储器的制作成本，有利于存储器的集成。1. By using the present invention, the method for preparing the device is simple, the manufacturing cost of the memory is reduced, and the integration of the memory is facilitated.
2、利用本发明，存储整流本身具有抑制串扰的作用，避免制备整流二极管或者选通三极管所造成的不利影响，能够有效地提高器件的良率和存储密度。2. Utilizing the present invention, the memory rectification itself has the effect of suppressing crosstalk, avoiding adverse effects caused by the preparation of rectifier diodes or gate triodes, and can effectively improve the yield rate and storage density of devices.
附图说明Description of drawings
通过参考附图对本发明的示范性实施例的详细描述中，本发明的上述和其他特点和优点将更为明显，在附图中：The above and other features and advantages of the present invention will be more apparent from the detailed description of exemplary embodiments of the present invention with reference to the accompanying drawings, in which:
图1是常见的阻变存储器器件的电阻转变特性示意图，低阻态时存储器件在正负电压下电学特性曲线基本对称；Figure 1 is a schematic diagram of the resistance transition characteristics of a common resistive memory device. In the low resistance state, the electrical characteristic curve of the memory device is basically symmetrical under positive and negative voltages;
图2是阻变存储器器件读串扰的电流通道示意图；2 is a schematic diagram of a current channel for reading crosstalk of a resistive memory device;
图3是具有非对称电学特性的阻变存储器器件的电阻转变特性示意图；3 is a schematic diagram of resistance transition characteristics of a resistive variable memory device with asymmetric electrical characteristics;
图4是实际制作的Au/ZrO2:Au/Si器件的电阻转变特性。Fig. 4 is the resistance transition characteristic of the actually fabricated Au/ZrO 2 :Au/Si device.
图5是实际制作的Au/ZrO2:Au/Si器件在低阻态时的整流特性曲线。Fig. 5 is the rectification characteristic curve of the actually fabricated Au/ZrO 2 :Au/Si device in the low resistance state.
具体实施方式Detailed ways
为使本发明的目的、技术方案和优点更加清楚明白，以下结合具体实施例，并参照附图，对本发明进一步详细说明。In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be described in further detail below in conjunction with specific embodiments and with reference to the accompanying drawings.
本发明提出了一种具有非对称电学特性的阻变存储器，该阻变存储器包括：上电极、下电极，以及包含在上电极和下电极之间的具有阻变特性的阻变层薄膜。上电极和下电极采用能够与阻变层薄膜形成不同的接触势垒的材料，例如Au、Pt、Ag、Pd、W、Ti、Al、Cu、TiN、ITO、IZO、YBCO、LaAlO3、SrRuO3或多晶硅，一般选用金属Au。阻变层薄膜采用NiO、TiO2、CuOx、ZrO2、Ta2O5、Al2O3、CoO、HfOx、MoOx、ZnO、PCMO、LCMO、SrTiO3、BaTiO3、SrZrO和非晶硅等具有电阻转变特性材料中的任一种材料，或者采用NiO、TiO2、CuOx、ZrO2、Ta2O5、Al2O3、CoO、HfOx、MoOx、ZnO、PCMO、LCMO、SrTiO3、BaTiO3、SrZrO和非晶硅等具有电阻转变特性的材料经过掺杂改性后的任一种材料。The invention proposes a resistive variable memory with asymmetric electrical characteristics, which includes: an upper electrode, a lower electrode, and a resistive variable layer thin film with resistive characteristics contained between the upper electrode and the lower electrode. The upper electrode and the lower electrode are made of materials that can form different contact barriers with the resistive switch layer film, such as Au, Pt, Ag, Pd, W, Ti, Al, Cu, TiN, ITO, IZO, YBCO, LaAlO 3 , SrRuO 3 or polysilicon, usually metal Au is used. The resistive layer film adopts NiO, TiO 2 , CuO x , ZrO 2 , Ta 2 O 5 , Al 2 O 3 , CoO, HfO x , MoO x , ZnO, PCMO, LCMO, SrTiO 3 , BaTiO 3 , SrZrO and amorphous Silicon and other materials with resistance switching characteristics, or NiO, TiO 2 , CuO x , ZrO 2 , Ta 2 O 5 , Al 2 O 3 , CoO, HfO x , MoO x , ZnO, PCMO, LCMO , SrTiO 3 , BaTiO 3 , SrZrO, and amorphous silicon and other materials with resistance switching properties that have been modified by doping.
阻变层薄膜的厚度为30至200nm。上电极(或下电极)与阻变层薄膜之间接触形成整流特性。该阻变存储器具有非对称的电学特性，在低阻态时具有整流的作用。The thickness of the resistance variable layer film is 30 to 200nm. The contact between the upper electrode (or the lower electrode) and the thin film of the resistance variable layer forms a rectification characteristic. The RRAM has asymmetric electrical characteristics, and has a rectifying function in a low-resistance state.
在本发明的一个实施例中，以n型硅为衬底(下电极)，利用电子束蒸发工艺依次淀积25/2/25nm的ZrO2/Au/ZrO2薄膜，然后在800℃下N2的氛围中退火2分钟，形成Au纳米晶掺杂的ZrO2薄膜阻变层(ZrO2:Au)，之后淀积一层50nm厚的Au作为上电极层，完成器件的制作。In one embodiment of the present invention, using n-type silicon as the substrate (lower electrode), the electron beam evaporation process is used to deposit 25/2/25nm ZrO 2 /Au/ZrO 2 films in sequence, and then N 2 for 2 minutes to form an Au nanocrystal-doped ZrO 2 thin film resistive layer (ZrO 2 : Au), and then deposit a layer of 50nm-thick Au as the upper electrode layer to complete the fabrication of the device.
图4是实际制作的Au/ZrO2:Au/Si器件的电阻转变特性。图5是实际制作的Au/ZrO2:Au/Si器件在低阻态时的整流特性曲线，在±0.5V的读取电压下，整流比高达500，能够有效的抑制串扰，避免误读发生。Fig. 4 is the resistance transition characteristic of the actually fabricated Au/ZrO 2 :Au/Si device. Figure 5 is the rectification characteristic curve of the actually produced Au/ZrO 2 :Au/Si device in the low resistance state. Under the reading voltage of ±0.5V, the rectification ratio is as high as 500, which can effectively suppress crosstalk and avoid misreading. .
由上述可知，在本发明的实施例中，通过采用制备一种具有非对称电学特性的阻变存储器，利用器件本身在低阻态下的整流特性能够有效的抑制串扰，便于阻变存储器和外围电路的集成，简化了器件的制备工艺，降低了成本。As can be seen from the above, in the embodiment of the present invention, by preparing a resistive variable memory with asymmetric electrical characteristics, the rectification characteristics of the device itself in a low-resistance state can effectively suppress crosstalk, which is convenient for resistive variable memory and peripherals. The integration of the circuit simplifies the manufacturing process of the device and reduces the cost.
以上所述的具体实施例，对本发明的目的、技术方案和有益效果进行了进一步详细说明，所应理解的是，以上所述仅为本发明的具体实施例而已，并不用于限制本发明，凡在本发明的精神和原则之内，所做的任何修改、等同替换、改进等，均应包含在本发明的保护范围之内。The specific embodiments described above have further described the purpose, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above descriptions are only specific embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included within the protection scope of the present invention.
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102185102A (en) * | 2011-03-11 | 2011-09-14 | 中国科学院物理研究所 | Resistance memory device with luminescence characteristics, and operating method and application thereof |
| CN103247696A (en) * | 2012-02-07 | 2013-08-14 | 中国科学院微电子研究所 | Tunneling diode rectifying device and manufacturing method thereof |
| WO2013123704A1 (en) * | 2012-02-21 | 2013-08-29 | 北京大学 | Method for preparing resistive random access memory |
| CN103579499A (en) * | 2012-08-10 | 2014-02-12 | 中国科学院微电子研究所 | Resistive random access memory device with rectification characteristic and manufacturing method thereof |
| CN108899418A (en) * | 2018-07-09 | 2018-11-27 | 广东工业大学 | A kind of noncrystal membrane device and its preparation method and application |
| CN118338771A (en) * | 2024-06-13 | 2024-07-12 | 华中科技大学 | Silicon oxide self-rectifying memristor and preparation method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102185102A (en) * | 2011-03-11 | 2011-09-14 | 中国科学院物理研究所 | Resistance memory device with luminescence characteristics, and operating method and application thereof |
| CN103247696A (en) * | 2012-02-07 | 2013-08-14 | 中国科学院微电子研究所 | Tunneling diode rectifying device and manufacturing method thereof |
| WO2013123704A1 (en) * | 2012-02-21 | 2013-08-29 | 北京大学 | Method for preparing resistive random access memory |
| CN103579499A (en) * | 2012-08-10 | 2014-02-12 | 中国科学院微电子研究所 | Resistive random access memory device with rectification characteristic and manufacturing method thereof |
| CN103579499B (en) * | 2012-08-10 | 2016-01-27 | 中国科学院微电子研究所 | Resistive random access memory device with rectification characteristic and manufacturing method thereof |
| CN108899418A (en) * | 2018-07-09 | 2018-11-27 | 广东工业大学 | A kind of noncrystal membrane device and its preparation method and application |
| CN118338771A (en) * | 2024-06-13 | 2024-07-12 | 华中科技大学 | Silicon oxide self-rectifying memristor and preparation method thereof |
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