CN101764088B - Lightly-doped ion implantation method and I/O metal-oxide semiconductor field effect tube (MOSFET) - Google Patents
Lightly-doped ion implantation method and I/O metal-oxide semiconductor field effect tube (MOSFET) Download PDFInfo
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- CN101764088B CN101764088B CN 200810208066 CN200810208066A CN101764088B CN 101764088 B CN101764088 B CN 101764088B CN 200810208066 CN200810208066 CN 200810208066 CN 200810208066 A CN200810208066 A CN 200810208066A CN 101764088 B CN101764088 B CN 101764088B
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Abstract
The invention discloses a lightly-doped ion implantation method, including the steps of providing a base comprising a core device area and an I/O device area surrounding the core device area; forming a grid on the base; executing the lightly-doped ion implantation operation in the I/O device area; re-oxidizing the grid; and executing the lightly-doped ion implantation operation in the core device area. The invention also provides an I/O MOSFET, which has a lightly-doped leakage area with the junction depth h being more than the junction depth h0 meeting the product requirement obtained under the same condition of ion implantation. The invention can reduce the hot carrier effect.
Description
Technical field
The present invention relates to the manufacturing technology field, particularly a kind of light dope ion injection method and I/O metal oxide semiconductor field effect tube.
Background technology
The light dope Implantation is in order to form light doping section, described light doping section comprises lightly doped drain and injects (Lightly Doped Drain, LDD) district and pocket type (Pocket) ion implanted region, described light doping section is used for defining the source and drain extension of MOS device.LDD impurity is positioned at the grid below and is close to the channel region edge, and Pocket impurity is positioned at below, LDD district and is close to the channel region edge, is source-drain area the impurity concentration gradient is provided.
Implantation is the standard technique of the dopant material that changes conductance being introduced substrate.In ion implant systems, needed dopant material is ionized in ion source, ion is accelerated into the surface that is drawn towards substrate behind the ion beam with predetermined energy, and the energetic ion in the ion beam is infiltrated material and is mounted among the lattice of material.
To form the LDD district as example, the step of utilizing existing technique to carry out the light dope Implantation comprises: as shown in Figure 1, substrate 10 is provided, described substrate 10 comprises at least two discrete chips, each described chip all comprises core device region 12 and is positioned at its peripheral input and output device district 14, is formed with shallow channel isolation area 16 between each device; As shown in Figure 2, form grid 20 in described substrate 10; As shown in Figure 3, described grid 20 execution are reoxidized (reoxidation) operation, to repair its sidewall; After the described reoxidation operation of experience, form oxide layer 22 on the surface of described substrate 10 and grid 20; As shown in Figure 4, order is carried out the Implantation operation in core device region 12 and the input and output device district 14, and forms Implantation interface 42 and 44.
In the practice, the complete integrated circuit of one cover comprises at least one core devices (Core device) and at least one input and output device (I/O device, IO device), described core devices is formed in the core device region, described input and output device is formed in the input and output device district, the operating voltage (as being 1.0V) of core devices as described in the operating voltage of described input and output device (as being 1.8V or 3.3V) is higher than; High working voltage easily causes in the input and output device boundary edge of knot and channel region to be formed with high electric field, electronics will be subjected to this high electric field acceleration to become high energy particle in mobile process, described high energy particle collision produces electronics one hole to (being called hot carrier), described hot carrier obtains energy from electric field, can enter in gate oxide or the grid, then affect the threshold voltage control of device and the drift of mutual conductance, namely produce hot carrier's effect.The generation that how to suppress described hot carrier's effect is the target that industry is pursued always.
As, on September 27th, 2006, disclosed notification number was for providing the technology integrating method that improves hot carrier's effect in a kind of CMOS manufacturing in the Chinese patent of " CN1277305C ", after finishing, transistor gate polycrystalline graphical definition increases respectively thermal oxidation technology by before gate oxidation technique, reaching, with the interface trap in effective minimizing gate oxide, particularly drain terminal is near the oxide layer interface trap at polycrystalline edge, thereby reduce hot carrier captive probability in grid oxygen, improve hot carrier's effect.But, when suppressing described hot carrier's effect, adopting said method need increase processing step, affect production efficiency.
In addition, on June 15th, 2005, disclosed notification number provided a kind of I/O nmos device that reduces hot carrier's effect in the Chinese patent application of " CN1627532A ", described device comprises that the place, pars intermedia top that the both sides, top of silicon base, substrate have source region and drain region, a silicon base has gate oxide, has polysilicon layer on the gate oxide, the both sides of polysilicon and gate oxide have side wall, especially, the pars intermedia position of substrate is slightly higher than source region and drain region.By adopting above setting, make the peak point of the channel laterally electric field that drain voltage causes will be away from channel surface, can effectively reduce hot carrier to the injection of gate oxide, reduce simultaneously the peak value electric field value in the raceway groove, with the remarkable hot carrier's effect that improves, improve device lifetime, and then guarantee the high reliability of device.But, when suppressing described hot carrier's effect, can cause adopting said method the change of gate oxide structure, affect subsequent technique.
Summary of the invention
The invention provides a kind of light dope ion injection method, can reduce the generation of hot carrier's effect; The invention provides a kind of input and output metal oxide semiconductor field effect tube, it has junction depth h greater than the junction depth h that meets product requirement that obtains under same ion implanting conditions
0Lightly doped drain.
A kind of light dope ion injection method provided by the invention comprises:
Substrate is provided, and described substrate comprises core device region and is positioned at its peripheral input and output device district;
Form grid in described substrate;
Carry out input and output device district light dope Implantation;
Described grid is carried out reoxidation operation;
Carry out core device region light dope Implantation.
Alternatively, described light dope Implantation comprises lightly doped drain injection and pocket type Implantation.
A kind of light dope ion injection method provided by the invention comprises:
Substrate is provided, and described substrate comprises core device region and is positioned at its peripheral input and output device district;
Form grid and described grid is carried out reoxidation operation in described substrate;
Carry out input and output device district light dope Implantation;
The anaerobic heat treatment operation is carried out in substrate to the district's light dope Implantation operation of experience input and output device;
Carry out core device region light dope Implantation.
Alternatively, described light dope Implantation comprises lightly doped drain injection and pocket type Implantation; Alternatively, when carrying out described anaerobic heat treatment operation, the indoor N that comprises of hot processing chamber
2Or He; The temperature range of temperature range when alternatively, carrying out described anaerobic heat treatment operation during with the reoxidation operation of carrying out described grid is identical.
A kind of input and output metal oxide semiconductor field effect tube provided by the invention, comprise: substrate, be formed at described suprabasil grid, and, be positioned at described substrate and around the light doping section of described grid, the junction depth h of described light doping section is greater than the junction depth h that meets product requirement that obtains under same ion implanting conditions
0
Alternatively, described ion implanting conditions comprises energy, the dosage of Implantation, type and the substrate surface pattern of ion.
Compared with prior art, technique scheme has the following advantages:
The light dope ion injection method that technique scheme provides by before the reoxidation operation of carrying out described grid, is carried out the light dope Implantation operation of input and output device district; Can utilize the temperature when carrying out described reoxidation operation, strengthen the injection diffusion of ion in the input and output device district, have the light doping section of higher junction depth so that in input and output device district, form, and then make the possibility that becomes that suppresses hot carrier's effect; And do not affect the ion in the core device region; In addition, also need not to increase processing step;
The light dope ion injection method that technique scheme provides by at first carrying out the light dope Implantation operation of input and output device district, then, is carried out the anaerobic heat treatment operation to the substrate of experience input and output device district's light dope Implantation operation; Can utilize the temperature when carrying out described anaerobic heat treatment operation, strengthen the injection diffusion of ion in the input and output device district; Have the light doping section of higher junction depth so that in input and output device district, form, and then make the possibility that becomes that suppresses hot carrier's effect; And do not affect the ion in the core device region; In addition, also can make the heat treatment operation of increase as far as possible little on the impact that the grid that experiences reoxidation operation causes;
The input and output metal oxide semiconductor field effect tube that technique scheme provides, the junction depth h by making light doping section in it is greater than the junction depth h that meets product requirement that obtains under same ion implanting conditions
0, can utilize this light doping section with higher junction depth, make the possibility that becomes that suppresses hot carrier's effect.
Description of drawings
Fig. 1 is underlying structure schematic diagram of the prior art;
Fig. 2 is the underlying structure schematic diagram behind the formation grid in the prior art;
Fig. 3 is to the underlying structure schematic diagram after the grid execution reoxidation operation in the prior art;
Fig. 4 is the underlying structure schematic diagram behind the execution light dope Implantation in the prior art;
Fig. 5 is the underlying structure schematic diagram in the first embodiment of the invention;
Fig. 6 is the underlying structure schematic diagram behind the formation grid in the first embodiment of the invention;
Fig. 7 is the underlying structure schematic diagram behind the execution input and output device district light dope Implantation in the first embodiment of the invention;
Fig. 8 carries out underlying structure schematic diagram after the reoxidation operation to grid in the first embodiment of the invention;
Fig. 9 is the underlying structure schematic diagram behind the execution core device region light dope Implantation in the first embodiment of the invention;
Figure 10-Figure 11 is the application preferred embodiment of the present invention and the Electrical Property Correlation schematic diagram of using the device of prior art acquisition;
Life tests process schematic diagram when Figure 12-Figure 13 is the application preferred embodiment of the present invention.
Embodiment
Although below with reference to accompanying drawings the present invention is described in more detail, wherein represented the preferred embodiments of the present invention, be to be understood that those skilled in the art can revise the present invention described here and still realize advantageous effects of the present invention.Therefore, following description is appreciated that extensive instruction for those skilled in the art, and not as limitation of the present invention.
For clear, whole features of practical embodiments are not described.In the following description, be not described in detail known function and structure, the confusion because they can make the present invention owing to unnecessary details.Will be understood that in the exploitation of any practical embodiments, must make a large amount of implementation details to realize developer's specific objective, for example according to relevant system or relevant commercial restriction, change into another embodiment by an embodiment.In addition, will be understood that this development may be complicated and time-consuming, but only be routine work to those skilled in the art.
In the following passage, with way of example the present invention is described more specifically with reference to accompanying drawing.Will be clearer according to following explanation and claims advantages and features of the invention.It should be noted that, accompanying drawing all adopts very the form of simplifying and all uses non-accurately ratio, only in order to convenient, the purpose of the aid illustration embodiment of the invention lucidly.
Usually, the high electric field that the boundary edge of knot and channel region forms in the device, so that electronics will be subjected to this high electric field acceleration to become high energy particle in mobile process, described high energy particle collision produces electron-hole pair (being called hot carrier), described hot carrier obtains energy from electric field, can enter in gate oxide or the grid, then affect the threshold voltage control of device and the drift of mutual conductance, namely produce hot carrier's effect.The generation that how to suppress described hot carrier's effect always is the target that industry is pursued.Current, industry is generally acknowledged, and the high electric field that the boundary edge of knot and channel region forms in device can change along with the increase of light doping section junction depth, and thus, the junction depth that how to increase the device light doping section becomes the direction that suppresses described hot carrier's effect.
In the practical work process of device, be positioned at the operating voltage of device in input and output device district usually above the operating voltage of the device that is positioned at non-input and output device district, be that the operating voltage of input and output device is usually above the operating voltage of core devices, so that how described hot carrier's effect occurs in described input and output device.
When suppressing described hot carrier's effect by the junction depth that increases the device light doping section, when junction depth increases, the lateral dimension of knot also has the increase of respective degrees, for core devices, the increase of the lateral dimension of knot will cause tying edge, boundary with channel region to the channel region indentation, be accompanied by dwindling of device critical dimension, this indentation will cause channel region to shorten, and very easily cause short channel effect, and then affect device performance.In the practice, in the degree of indentation described in core devices and the input and output device about equally, and since the critical dimension of described input and output device greater than the critical dimension of described core devices, so that the channel region of described input and output device is wider than the channel region of described core devices, then, the identical described core devices that makes causes the indentation amount of short channel effect, for described input and output device, usually can be left in the basket, therefore, think after the present inventor's analysis, the junction depth that how to increase input and output device light doping section becomes the subject matter that the inventive method solves.
Be to increase the junction depth of input and output device light doping section, the present inventor by analysis with practice, a kind of light dope ion injection method is provided.
The step of utilizing method provided by the invention to carry out the light dope Implantation comprises: substrate is provided, and described substrate comprises at least two discrete chips (die), and each described chip all comprises core device region and is positioned at its peripheral input and output device district; Form grid in described substrate; Carry out input and output device district light dope Implantation; Described grid is carried out reoxidation operation; Carry out core device region light dope Implantation.
As the first embodiment of the present invention, the concrete steps of utilizing method provided by the invention to carry out the light dope Implantation comprise:
At first, provide substrate, described substrate comprises at least two discrete chips, and each described chip all comprises core device region and is positioned at its peripheral input and output device district.
As shown in Figure 5, the substrate of shallow trench 160 isolation has also been finished in described substrate 100 for defined device active region.Described substrate 100 surfaces can be formed with the oxide layer (not shown); described oxide layer both can be used as the separator of grid that the experience subsequent step forms and 100 of described substrates, can be used as again and carried out protecting in the light doping section forming process the injury-free protective layer of described substrate.Described oxide layer obtains via thermal oxidation technology.Described thermal oxidation technology is used high-temperature oxydation equipment or oxidation furnace carries out.
Usually, the integrated circuit that one cover is complete (as, a chip) comprise at least one core devices and at least one input and output device, described core devices is formed in the core device region 120, and described input and output device is formed in the input and output device district 140; Described input and output device district 140 is positioned at the periphery of described core device region 120; Isolate by shallow trench 160 between each described device.
Subsequently, as shown in Figure 6, form grid 200 in described substrate 100.
The step that forms grid 200 in described substrate 100 can comprise: at described substrate 100 deposition grid layers; Form patterned resist layer, described patterned resist layer has gate patterns; Take described patterned resist layer as mask, the described grid layer of etching.
Described grid layer material comprises polysilicon (poly).Described grid layer also can comprise metal silicide.Described metal silicide then experiences annealing process and obtains by depositing metal layers on polysilicon.
In the practice, the patterned resist layer of described formation comprises the steps such as coating, oven dry, photoetching, exposure and detection of described resist layer, related process can be used various traditional methods, the described resist layer of using can be selected any anticorrosive additive material that can be applicable in the processing procedure, all repeats no more at this.
As other embodiment of the present invention, described substrate after forming grid forms before the patterned resist layer, all can be included as the graphical effect that improves described resist layer and the step that under described resist layer, forms antireflecting coating (ARC), such as the BARC (not shown).When being pre-formed antireflecting coating before forming patterned resist layer, take described patterned resist layer as mask, the step of the described grid layer of etching comprises: take described patterned resist layer as mask, form patterned described antireflecting coating; Take described patterned resist layer and antireflecting coating as mask, the described grid layer of etching.
In the traditional handicraft, after forming described grid, need order that described grid is carried out reoxidation operation, when utilizing etching technics to form described grid with reparation to its damage that causes.The technical scheme that the present embodiment provides and the difference of traditional handicraft are: described reoxidation operation is no longer carried out between the step that forms described grid and follow-up execution light dope Implantation, finish after the light dope Implantation operation of input and output device district but move to, temperature when carrying out described reoxidation operation to utilize, strengthen the injection diffusion of ion in the input and output device district, have the light doping section of higher junction depth so that in input and output device district, form, and then make the possibility that becomes that suppresses hot carrier's effect; And do not affect the ion in the core device region, need not to increase processing step yet.
Again, carry out input and output device district light dope Implantation.
Described light dope Implantation comprises lightly doped drain and injects and the pocket type Implantation.Light dope Implantation in the input and output device district is take described grid as mask.The lightly doped drain injection interface 420 that forms and/or pocket type Implantation interface 440 are as shown in Figure 7.
The ion injection method that relates to can adopt any traditional technique, does not repeat them here.
Particularly, implantation dosage can be 1e13～1e15 atomicity/square centimeter (atom/cm
2); Implantation Energy can be 5k～10k electron-volt (eV).
Then, described grid is carried out reoxidation operation.
Can adopt any traditional method to carry out described reoxidation operation, repeat no more.As shown in Figure 8, after carrying out described reoxidation operation, after described substrate surface forms oxide layer 220, lightly doped drain in the described input and output device district injects interface 422 and/or pocket type Implantation interface 442 is compared with 440 with the injection interface 420 before carrying out described reoxidation operation, extends to some extent again on depth direction.
It should be noted that, along with reducing of critical dimension, after described grid is carried out reoxidation operation, carry out core device region light dope Implantation before, usually need be pre-formed lateral wall substrate (offset spacer), in order under the restriction of device critical dimension, to increase channel length, to prevent the generation of short channel effect; The mask of using when itself and the common composition of grid carry out core device region light dope Implantation; As other embodiment of the present invention, the related heat treatment operation of step that forms described lateral wall substrate is beneficial to and injects the further extension of interface 422 and 442 on depth direction.
As example, described lateral wall substrate can comprise the first lateral wall substrate and the second lateral wall substrate that is formed on described the first lateral wall substrate; In the actual production, described the first lateral wall substrate material is chosen as silicon dioxide, and for 65 nanometer technologies, described the first lateral wall substrate thickness is chosen as 2～4 nanometers; Described the second lateral wall substrate material is chosen as silicon nitride, and for 65 nanometer technologies, described the second lateral wall substrate thickness is chosen as 6～8 nanometers.Form the reaction temperature that the operation of described lateral wall substrate 300 relates to and can be 600～700 degrees centigrade.Obtain after the processes such as described lateral wall substrate 300 experience depositions, etching.
At last, carry out core device region light dope Implantation.
Described light dope Implantation comprises lightly doped drain and injects and the pocket type Implantation.Light dope Implantation operation in the core device region, take described grid as mask (or with around the lateral wall substrate of described grid jointly as mask), the core devices lightly doped drain of formation injects interface 424 and/or pocket type Implantation interface 444 as shown in Figure 9.
The ion injection method that relates to can adopt any traditional technique, does not repeat them here.
Particularly, implantation dosage can be 1e13～1e15 atomicity/square centimeter (atom/cm
2); Implantation Energy can be 5k～10k electron-volt (eV).
In addition, the present inventor also proposes a kind of light dope ion injection method, comprising: substrate is provided, and described substrate comprises core device region and is positioned at its peripheral input and output device district; Form grid and described grid is carried out reoxidation operation in described substrate; Carry out input and output device district light dope Implantation; The anaerobic heat treatment operation is carried out in substrate to the district's light dope Implantation operation of experience input and output device; Carry out core device region light dope Implantation.
That is, by at first carrying out the light dope Implantation operation of input and output device district, then, the anaerobic heat treatment operation is carried out in the substrate of experience input and output device district's light dope Implantation operation; Can utilize the temperature when carrying out described anaerobic heat treatment operation, strengthen the injection diffusion of ion in the input and output device district; Have the light doping section of higher junction depth so that in input and output device district, form, and then make the possibility that becomes that suppresses hot carrier's effect; And do not affect the ion in the core device region; In addition, also can make the heat treatment operation of increase as far as possible little on the impact that the grid that experiences reoxidation operation causes.
Described light dope Implantation comprises lightly doped drain and injects and the pocket type Implantation.When carrying out described anaerobic heat treatment operation, the indoor N that comprises of hot processing chamber
2Or He.Temperature range when the temperature range when carrying out described anaerobic heat treatment operation can be with the reoxidation operation of carrying out described grid is identical, to reduce the heat budget of processing procedure.
To sum up, the present inventor also provides a kind of input and output metal oxide semiconductor field effect tube, comprise: substrate, be formed at described suprabasil grid, and, be positioned at described substrate and around the light doping section of described grid, wherein, described lightly doped drain adopts the technical scheme that relates in above-described embodiment to form; Especially, the junction depth h of described lightly doped drain is greater than the junction depth h that meets product requirement that obtains under same ion implanting conditions
0Wherein, described ion implanting conditions comprises energy, the dosage of Implantation, type and the substrate surface pattern of ion.
Be that checking uses after the technical scheme provided by the invention the improvement effect of hot carrier's effect in the device, the present inventor is corresponding to be detected with the wafer behind above-mentioned preferred version and the formation light doping section of using the traditional scheme acquisition:
As seen, compare with using traditional scheme, after using above-mentioned preferred version and forming light doping section, for the drain saturation current (I that determines
Dsat), as shown in figure 10, the cut-off leakage current (I of device
Off) obviously reduce, that is, use the leakage current that above-mentioned preferred version can reduce device significantly; And as shown in figure 11, threshold voltage (V
tThough) increase to some extent, increasing degree is very little; To sum up, use the electric property that above-mentioned preferred version can improve device.
In addition, for checking is used technical scheme provided by the invention to the impact of device reliability, the present inventor is also corresponding to have carried out the reliability detection with the device that obtains behind the above-mentioned preferred version:
As shown in figure 12, at first, obtain and determine required deterioration data device lifetime (lifetime); As example, be the device of 1.8V to operating voltage, choose respectively V
G1=2.3v; V
D1=1.3v; V
G2=2.5v; V
D2=1.4v; V
G3=2.7v; V
D3=1.5v; Survey it at the device creepage required time t 10% time that degenerates
1, t
2, t
3(in Figure 12, show as degenerated curve 11,12 ..., 16 and with the degeneration ratios constant be the abscissa of the intersection point of 10% curve 17);
Subsequently, as shown in figure 13, with I
SubI
DsatBe abscissa, with t
1, t
2, t
3For ordinate obtains the life curve 1 of device (in the practice, usually with I
Sub* w*t
1, I
Sub* w*t
2, I
Sub* w*t
3Be ordinate), wherein, I
SubBe substrate current; W is active area (AA) width, under the prerequisite that operating voltage is determined, is known; I when after this, calculating corresponding operating voltage and be 1.8V
SubI
Dsat, in described life curve 1, determine corresponding described I
SubI
DsatThe time corresponding ordinate, can draw the life-span of device under operating voltage; As example, in the practice, the life-span of device under operating voltage needs greater than 0.2yr (in such as Figure 13 curve 2 sign), and when using above-mentioned preferred version, the life-span of device under operating voltage is 0.98yr, greater than 0.2yr (that is, in Figure 13, the point 3 of the device of representative under operating voltage is positioned on the curve 2); Can judge that using above-mentioned preferred version can make device reliability meet product requirement.
What need emphasize is that not elsewhere specified step all can use conventional methods acquisition, and concrete technological parameter is determined according to product requirement and process conditions.
Although describe that by the embodiment at this present invention being described, although and enough described embodiment in detail, the applicant does not wish by any way the scope of claims is limited on this details.Other advantage and improvement are apparent to those skilled in the art.Therefore, relative broad range the invention is not restricted to represent and the specific detail of describing, equipment and method and the illustrative example of expression.Therefore, can depart from these details and do not break away from the spirit and scope of the total inventive concept of applicant.
Claims (3)
1. a light dope ion injection method is characterized in that, comprising:
Substrate is provided, and described substrate comprises core device region and is positioned at its peripheral input and output device district;
Form grid and described grid is carried out reoxidation operation in described substrate;
Carry out input and output device district light dope Implantation;
The anaerobic heat treatment operation that can form the light doping section with higher junction depth in input and output device district is carried out in substrate to the district's light dope Implantation operation of experience input and output device; The temperature range of temperature range when carrying out described anaerobic heat treatment operation during with the reoxidation operation of carrying out described grid is identical;
Carry out core device region light dope Implantation.
2. light dope ion injection method according to claim 1 is characterized in that: described light dope Implantation comprises lightly doped drain and injects and the pocket type Implantation.
3. light dope ion injection method according to claim 1 is characterized in that: when carrying out described anaerobic heat treatment operation, and indoor N2 or the He of comprising of hot processing chamber.
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| CN101118876A (en) * | 2006-08-04 | 2008-02-06 | 联华电子股份有限公司 | Method for manufacturing metal-oxide semiconductor transistor |
| CN101281870A (en) * | 2007-04-03 | 2008-10-08 | 中芯国际集成电路制造(上海)有限公司 | Method for manufacturing semiconductor device |
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| CN101118876A (en) * | 2006-08-04 | 2008-02-06 | 联华电子股份有限公司 | Method for manufacturing metal-oxide semiconductor transistor |
| CN101281870A (en) * | 2007-04-03 | 2008-10-08 | 中芯国际集成电路制造(上海)有限公司 | Method for manufacturing semiconductor device |
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