CN101752339B - 接垫结构、导线接合结构及封装结构 - Google Patents

接垫结构、导线接合结构及封装结构 Download PDF

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CN101752339B
CN101752339B CN2008102073798A CN200810207379A CN101752339B CN 101752339 B CN101752339 B CN 101752339B CN 2008102073798 A CN2008102073798 A CN 2008102073798A CN 200810207379 A CN200810207379 A CN 200810207379A CN 101752339 B CN101752339 B CN 101752339B
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lead
bonding pad
hardness
pattern
pad structure
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CN101752339A (zh
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许宏达
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Ase Assembly & Test (shanghai) Ltd
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Abstract

本发明提供一种接垫结构、导线接合结构及封装结构。此导线接合结构包括接垫结构和导线，接垫结构包括具有第一材料的图案化结构和第二材料，导线接合于接垫结构，其中导线的材料硬度小于第一材料的硬度，且图案化结构的分布面积是大于导线与该接垫结构之间的接触面积。本发明的接垫结构及导线接合结构可应用于封装结构中，并可确保打线质量，减少发生导线与接垫之间的剥离问题。

Description

接垫结构、导线接合结构及封装结构
技术领域
本发明涉及一种接垫结构、导线接合结构及封装结构，特别是涉及一种可确保打线质量的接垫结构、导线接合结构及封装结构。
背景技术
在半导体封装构造制程中，焊线接合技术已广泛地应用于半导体芯片与封装基板或导线架之间的电性连接。一般打线接合制程是以金线为主，但由于铜线具有低成本的优势，相较于金线，铜线具有较佳的导电性及导热性，因而铜制焊线的线径可较细且散热效率较佳。
请参阅图7，其显示依据现有焊线接合的剖面示意图。目前，铜制焊线910可藉由一打线机901来接合于接垫920上，然而，当铜制焊线910的硬度大于接垫920(如铝制接垫)的材料硬度时，铜制焊线910在施压接合于接垫920的过程中，可能会损坏铝制接垫920的结构，此时，接垫920与焊线910的接触面可能因挤压而损坏变形，例如铝制接垫920可能被铜制焊线挤出(如图7所示)，而容易发生应力集中情形，因而影响焊线接合的稳固性及打线强度，而容易发生焊线910与接垫920之间的剥离问题。
发明内容
本发明的目的之一在于提供一种接垫结构，用以接合导线，其特征在于：所述接垫结构包括：
图案化结构，具有第一材料，其硬度大于所述导线的材料硬度，且所述图案化结构的分布面积是大于所述导线与所述接垫结构之间的接触面积；以及
第二材料，形成于所述图案化结构上。
本发明的目的之二在于提供一种导线接合结构，其特征在于所述导线接合结构包括：
接垫结构，包括：
图案化结构，具有第一材料；以及
第二材料，形成于所述图案化结构上；以及
导线，接合于所述接垫结构，其中所述导线的材料硬度小于所述第一材料的硬度，且所述图案化结构的分布面积是大于所述导线与所述接垫结构之间的接触面积。
本发明的目的之三在于提供一种封装结构，其特征在于所述封装结构包括：
基材；
接垫结构，设置于所述基材上，其中所述接垫结构包括：
图案化结构，具有第一材料；以及
第二材料，形成于所述图案化结构上；
导线，接合于所述接垫结构，其中所述导线的材料硬度小于所述第一材料的硬度，且所述图案化结构的分布面积是大于所述导线与所述接垫结构之间的接触面积；以及
封胶体，形成于所述基材上，并包覆所述接垫结构和所述导线。
本发明的接垫结构及其应用的导线接合结构及封装结构可避免或减少接垫在接合过程中损坏或变形的情形，因而可确保打线质量，减少发生导线与接垫之间的剥离问题。
为让本发明的上述内容能更明显易懂，下文特举优选实施例，并配合所附图式，作详细说明如下：
附图说明
图1显示依据本发明的一实施例的导线接合结构的剖面示意图；
图2显示依据本发明的一实施例的接垫结构与基材的剖面示意图；
图3A至图3E显示依据本发明的一实施例的各种接垫结构的俯视示意图；
图4显示依据本发明的一实施例的导线插设于打线机中的剖面示意图；
图5显示依据本发明的一实施例的导线接合于接垫结构时的剖面示意图；
图6显示依据本发明的一实施例的封装结构的剖面示意图；以及
图7显示依据现有焊线接合的剖面示意图。
具体实施方式
请参照图1，其显示依据本发明的一实施例的导线接合结构的剖面示意图。本实施例的接垫结构100是用以接合(如焊接)导线200，而形成导线接合结构，此导线接合结构可应用于封装结构中，用以进行电性连接。接垫结构100包括有图案化结构110，图案化结构110具有第一材料，其硬度大于导线200的材料硬度，且此图案化结构110在接垫结构100中的分布面积是大于导线200与接垫结构100之间的接触面积(亦即接合面的面积)，藉以避免当导线的硬度大于接垫的硬度时，接垫被导线挤压而遭损坏或变形的情形。
请参照图2至图3E，图2显示依据本发明的一实施例的接垫结构与基材的剖面示意图，图3A至图3E显示依据本发明的一实施例的各种接垫结构的俯视示意图。本实施例的接垫结构100是设置于基材300上，用以接合导线200，此基材300例如为具有电路的封装基板(例如是单层或多层的印刷电路板PCB、陶瓷电路板或柔性电路板FCB)或芯片，因而导线200可通过接垫结构100来电性连接于基材300。在本实施例中，接垫结构100包括图案化结构110和第二材料120，图案化结构110可利用例如物理气相沉积技术(Physical Vapor Deposition，PVD)、化学气相沉积技术(Chemical VaporDeposition，CVD)、蒸镀(Evaporation Deposition)、离子镀(Ion Plating)、原子层沉积法(Atomic Layer Deposition，ALD)、溅镀(SputteringDeposition)或电镀等方法的其中一种搭配光微影法来形成于基材300上，其中图案化结构110是由第一材料所制成，此第一材料例如为镍、钛、钯、上述任意合金或其它导电材料，且此第一材料的硬度是大于导线200(例如铜)的材料硬度。此图案化结构110可例如为矩阵点状(如图3A和图3B所示)、同心圆状(如图3C所示)、旋涡状(如图3D所示)、直线交叉状(如图3E所示)等图案化结构，且图案化结构110的分布面积是大于导线200与接垫结构100接合后的接触面积，用以避免导线200损坏接垫结构100。第二材料120可利用例如物理气相沉积技术(Physical Vapor Deposition，PVD)、化学气相沉积技术(Chemical Vapor Deposition，CVD)、蒸镀(EvaporationDeposition)、离子镀(Ion Plating)、原子层沉积法(Atomic LayerDeposition，ALD)、溅镀(Sputtering Deposition)或电镀等方法的其中一种搭配光微影法来形成于图案化结构110上，第二材料120的材料(例如铝)硬度可小于导线200的材料硬度，其中第二材料120优选是齐平或覆盖于图案化结构110上。
请参照图4，其显示依据本发明的一实施例的导线插设于打线机中的剖面示意图。本实施例的导线200可利用打线机201来提供，导线200的材料例如为金、银、铜、铝或其上述任意合金。当导线200未尚接合于接垫结构100时，导线200可插设于打线机201中，此时，导线200包括线状部210和球状部220，球状部220是连接于线状部210的一端，用以接合于接垫结构100，且球状部220的剖面面积大于线状部210的剖面面积。其中，可透过放电方法或氢焰烧结来熔融导线200的前端成球状，因而形成球状部220。
请参照图5，其显示依据本发明的一实施例的导线接合于接垫结构时的剖面示意图。当接合导线200于接垫结构100时，利用打线机201来挤压导线200的球状部220于接垫结构100上，并可辅以压力、加热或超音波振荡，藉以使导线200与接垫结构100接触摩擦，以形成紧密键结，因而形成导线200与接垫结构100之间的接合。在本实施例中，导线200例如为铜线，接垫结构100第一材料例如为镍、钛或钯，而第二材料120例如为铝，当导线200接合于接垫结构100时，由于接垫结构100中具有硬度高于导线200的图案化结构110(第一材料)可限制导线200的下压程度，因而接垫结构100可避免或减少第二材料120被导线200所损坏而变形的风险，以确保焊线接合的稳固性及打线强度，减少发生导线200与接垫结构100之间的剥离问题，进而确保打线质量。
请参照图6，其显示依据本发明的一实施例的封装结构的剖面示意图。当本实施例的接垫结构与导线接合结构应用于封装结构时，此封装结构包括接垫结构100、导线200、基材300a、300b及封胶体400。接垫结构100是设置于基材300a、300b上，导线200是接合于接垫结构100，以形成电性连接，封胶体400是形成于基材300a、300b，并包覆接垫结构100和导线200。在本实施例中，基材为具有电路的封装基板300a或至少一芯片300b，而接垫结构100可设置于封装基板300a或芯片300b上，导线200是用以电性连接于封装基板300a和芯片300b之间，封胶体400的材料例如为环氧树脂、PMMA、聚碳酸酯(Polycarbonate)、玻璃、硅胶、光硬化型树脂(UV curableheat-resistant resin)、压克力，用以包覆接垫结构100、导线200、封装基板300a及芯片300b，因而形成本实施例的封装结构。在本实施方法中，该接垫结构100可仅仅设置于封装基板300a或仅仅设置于芯片300b之上。
因此，本实施例的接垫结构及其应用的导线接合结构及封装结构可避免或减少接垫在接合过程中被导线挤压而遭损坏或变形的情形，因而确保打线质量，减少发生导线与接垫之间的剥离问题。
综上所述，虽然本发明已以优选实施例揭露如上，但上述优选实施例并非用以限制本发明，本领域的普通技术人员，在不脱离本发明的精神和范围内，均可作各种更动与润饰，因此本发明的保护范围以权利要求界定的范围为准。

Claims (10)

1.一种封装结构，其特征在于所述封装结构包括：
基材；
接垫结构，设置于所述基材上，其中所述接垫结构包括：
图案化结构，具有第一材料；以及
第二材料，形成于所述图案化结构上；
导线，接触于所述接垫结构的所述图案化结构，其中所述导线的材料硬度小于所述第一材料的硬度，所述第二材料的材料硬度小于所述导线的材料硬度，且所述图案化结构的分布面积是大于所述导线与所述接垫结构之间的接触面积；以及
封胶体，形成于所述基材上，并包覆所述接垫结构和所述导线。
2.根据权利要求1所述的封装结构，其特征在于：所述基材为封装基板或芯片。
3.根据权利要求1所述的封装结构，其特征在于：所述图案化结构为矩阵点状、同心圆状、旋涡状或直线交叉状结构。
4.根据权利要求1所述的封装结构，其特征在于：所述第二材料为铝。
5.根据权利要求1所述的封装结构，其特征在于：所述第一材料为镍、钛、钯或其合金。
6.根据权利要求1所述的封装结构，其特征在于：所述导线的材料为金、银、铜、铝或其合金。
7.根据权利要求1所述的封装结构，其特征在于：所述第二材料是齐平或覆盖于图案化结构上。
8.一种导线接合结构，其特征在于所述导线接合结构包括：
接垫结构，包括：
图案化结构，具有第一材料；以及
第二材料，形成于所述图案化结构上；以及
导线，接触于所述接垫结构的所述图案化结构，其中所述导线的材料硬度小于所述第一材料的硬度，所述第二材料的材料硬度小于所述导线的材料硬度，且所述图案化结构的分布面积是大于所述导线与所述接垫结构之间的接触面积。
9.一种接垫结构，用以接合导线，其特征在于：所述接垫结构包括：
图案化结构，具有第一材料，其硬度大于所述导线的材料硬度，且所述图案化结构的分布面积是大于所述导线与所述接垫结构之间的接触面积，当所述导线接合于所述接垫结构时，所述导线接触合于所述接垫结构的所述图案化结构；以及
第二材料，形成于所述图案化结构上，所述第二材料的材料硬度小于所述导线的材料硬度。
10.根据权利要求9所述的接垫结构，其特征在于：所述接垫结构是设置于封装基板或芯片上。
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101248522A (zh) * 2005-06-14 2008-08-20 田中电子工业株式会社 具有高接合可靠性、压接球的高真圆性、高直进性、以及高耐树脂流动性的接合引线用金合金线
CN101256993A (zh) * 2007-02-20 2008-09-03 恩益禧电子股份有限公司 半导体器件
CN101256991A (zh) * 2007-03-01 2008-09-03 育霈科技股份有限公司 一种增进硅片级封装(wlp)可靠度的封装结构
CN201153120Y (zh) * 2007-12-27 2008-11-19 环隆电气股份有限公司 无线通讯模块封装结构

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101248522A (zh) * 2005-06-14 2008-08-20 田中电子工业株式会社 具有高接合可靠性、压接球的高真圆性、高直进性、以及高耐树脂流动性的接合引线用金合金线
CN101256993A (zh) * 2007-02-20 2008-09-03 恩益禧电子股份有限公司 半导体器件
CN101256991A (zh) * 2007-03-01 2008-09-03 育霈科技股份有限公司 一种增进硅片级封装(wlp)可靠度的封装结构
CN201153120Y (zh) * 2007-12-27 2008-11-19 环隆电气股份有限公司 无线通讯模块封装结构

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