The CMOS power factor correction control circuit that is used for electric ballast
Technical field
The present invention relates to boost power factor correction circuit, especially a kind of CMOS power factor correction control circuit that is used for electric ballast is a kind of APFC control circuit that can integrate with the ballast control circuit.
Background technology
The AC Harmonics of Input is considered to a kind of " electric power public hazards "; In order to reduce the harmonic pollution that nonlinear load produces AC network; Both at home and abroad generally the Harmonics of Input of switch power supply equipment is proposed the strict restriction standard, required to improve the power factor of input stage.For example require the power factor of power (comprises 25W) more than 25W electronic energy-saving lamp must be in " about the ecological designing requirement instruction of non-directional family expenses electric light " of European Union's promulgation recently more than or equal to 0.9.
At present, using the most general APFC is to adopt booster type (Boost) circuit, makes input current follow the variation of input voltage through source control circuit is arranged, and reaches the purpose that improves the input stage power factor.
Fig. 1 is existing by the APFC schematic diagram that generally adopts.Input ac power is through electromagnetic interference filter circuit (Electro Magnetic Interference; Abbreviation EMI) is input to rectifier bridge after the filtering; Rectifier bridge is connected and composed by 4 diode D1, D2, D3, D4; This rectifier bridge is transformed to the input of the direct current of pulsation as the Boost circuit with the alternating current of input; The Boost circuit is connected and composed by boost inductance L1, switching power tube M1, booster diode D5 and output filter capacitor Cout, and the direct current of pulsation becomes the high voltage direct current supply load through this Boost circuit boosting inverter.There is source control circuit to adopt dual-loop control circuit, comprises:
Ring pulse-width modulation (PWM) control circuit in the average current type current, this electric circuit inspection is imported the electric current of boost inductance L1, and testing result and sinusoidal current sample are compared, and exports turning on and off of sinusoidal pulse width modulation (SPWM) signal controlling main switch M1 then;
Voltage Feedback and outer loop control circuit, the voltage on this electric circuit inspection output capacitance Cout, and make output voltage stabilization, its output voltage error signal is input in the analog signal computing circuit;
For reaching the correction input current waveform; Make it sineization and follow the purpose of input voltage waveform; Between the outer loop control circuit of dual-loop control circuit and interior loop control circuit, also need add divider circuit and multiplier circuit successively; Also need add input voltage mean value sample circuit and square circuit simultaneously, with the feedforward AC-input voltage mean value behind square operation, be input to divider circuit.The error of outer loop control circuit output signal is through division arithmetic, and after square being divided by of AC-input voltage mean value, its output signal is done multiplying with input voltage instantaneous value of feedforward, forms the sinusoidal current sample that supplies interior loop control circuit correction signal to use.
From the control circuit principles illustrated of the circuit of power factor correction of above-mentioned Fig. 1, can find out that the analog signal computing of control circuit is more, hardware is realized comparatively complicated.In ring need with adjustings for adapting to loop stability with outer shroud, all need increase the compensation correction circuit, this makes design and debug and all become difficult.Typical case's representative is exactly the power factor correction special integrated chip UC3854 of the U.S. outstanding Buddhist nun's wound (Unitrode) company.
Application scenario at the electricity-saving lamp ballast; No matter be to use the integrated circuit of the special use of above control method; Also be to use the similar control method to realize having the power factor and the ballast control combination integrated circuit of power factor correction; All because of the design with production cost higher, thereby the increase electronic energy-saving lamp cost, influenced " green illumination "---with the promotion rate of electricity-saving lamp replace incandescent.
Summary of the invention
The present invention seeks to overcome the deficiency of prior art; A kind of CMOS power factor correction control circuit that is used for electric ballast is provided; It is a kind of simple and effective; And the integrated APFC control circuit of available CMOS technology, be convenient to integrate with electronic amperite of gas-discharge lamp control circuits such as metal halogen lamp electric ballast control circuit, electronic ballast for fluoresent lamp control circuits, and some parts in the multiplexing ballast circuit; Thereby reduce the complexity of control circuit, save the design and the hardware cost of control circuit.
The present invention realizes through following technical scheme: a kind of CMOS power factor correction control circuit that is used for electric ballast; Be provided with the booster type APFC that main power circuit and control circuit two parts constitute; Wherein, Main power circuit is provided with and comprises the electromagnetic interference filter circuit that is used to receive input ac voltage, rectifier bridge, booster type circuit and the load that is used for alternating voltage is converted into pulsating dc voltage, and AC power inputs to rectifier bridge through after the electromagnetic interference filter circuit; Rectifier bridge is input to the booster type circuit with the direct current that the alternating current of importing is transformed to pulsation, becomes high voltage direct current to export to load through boosting inverter;
It is characterized in that: be provided with one and be used for controlling opening or turn-offing of booster type circuit switching power tube, so that inductive current reaches the control circuit of predetermined waveform, this control circuit comprises:
Pulse signal generator is used to produce impulse wave;
Trapezoidal waveshaping circuit is used to detect the input voltage and the output voltage of booster type circuit, and converts the ladder type signal to;
Receive the pulse-width modulation and the buffering drive circuit of trapezoidal signal controlling, being used for the ladder type conversion of signals is pulse-width signal, the switching power tube of drive controlling booster type circuit;
The output of pulse signal generator is connected with the pulsed signal end of trapezoidal waveshaping circuit; The output of trapezoidal waveshaping circuit is connected with the input of buffering drive circuit with the pulse-width modulation that receives trapezoidal signal controlling, be connected with the grid of the switching power tube of booster type circuit with the output of buffering drive circuit by the pulse-width modulation of trapezoidal signal controlling; The input voltage that the booster type circuit is detected in the input voltage test side of trapezoidal waveshaping circuit is the output voltage of rectifier bridge, and the output voltage that the booster type circuit is detected in the output voltage test side of trapezoidal waveshaping circuit is the voltage at load two ends; The output signal of pulse signal generator is input to trapezoidal waveshaping circuit; The ladder type signal that trapezoidal waveshaping circuit produces is input to pulse-width modulation and the buffering drive circuit that receives trapezoidal signal controlling; Receive the switching power tube of the pulse-width modulation of trapezoidal signal controlling and the control signal driving booster type circuit that buffering drive circuit produces; Make the envelope waveform of inductive current follow the input ac voltage waveform, accomplish power factor correction, stable DC bus-bar voltage output is provided.
Above-mentioned pulse signal generator can adopt 555 circuit to constitute, and also can be other oscillating circuit; Trapezoidal waveshaping circuit contains a coupling capacitance, a sampling capacitance, an input voltage sampling resistor, an output voltage sampling resistor and a voltage-stabiliser tube; Wherein, One end of coupling capacitance is connected with the output of pulse signal generator as the pulse signal sampling end; One end of one end of the coupling capacitance other end and sampling capacitance, an end of input voltage sampling resistor, output voltage sampling resistor and the negative electrode of voltage-stabiliser tube link together as the output of trapezoidal waveshaping circuit, the other end of sampling capacitance and the equal ground connection of the anode of voltage-stabiliser tube; The other end of input voltage sampling resistor is connected with the input of booster type circuit, and the other end of output voltage sampling resistor is connected with the output of booster type circuit;
In the trapezoidal waveshaping circuit, an electric capacity plays coupling, and the pulse signal that pulse signal generator is exported is coupled to sampled point; Another electric capacity plays sampling action, and in the sampling period, this electric capacity is recharged, and after the pulse signal trailing edge arrived, sampling capacitance was refreshed, and the next sampling period of beginning; A resistance is as Boost circuit input end voltage sample resistance, and detected voltage charges to sampling capacitance through this resistance, the rate of rise of ladder type signal with the voltage that obtains of sampling relevant, voltage is high more, slope is big more.Another resistance is as Boost circuit output end voltage sample resistance, and detected voltage charges to sampling capacitance through this resistance, and the slope that the ladder type signal rises is relevant with the voltage that obtains of sample, and voltage is high more, and slope is big more; Voltage-stabiliser tube is stabilized in certain value with the voltage of sampling capacitance after sampling is accomplished.
Receive the pulse-width modulation and the buffering drive circuit of trapezoidal signal controlling to contain a voltage comparator and a buffering driver; Wherein voltage comparator input is connected with reference voltage; Another input is connected with the output of trapezoidal waveshaping circuit; The output of voltage comparator is connected with the input of buffering driver, and the output of buffering driver is connected with the switch power tube grid of booster type circuit.
Advantage of the present invention and remarkable result:
The present invention adopts whole CMOS technology device, is easy to realize that cost is low.
The present invention is as the APFC method, can obtain to compare with PPFC higher power factor.
The present invention adopts the APFC of dicyclo control to compare with prior art; Needn't use numerous and diverse analog signal computing circuit; Like multiplier circuit etc.; Can all adopt CMOS technology to realize, therefore easy and ballast control circuit process compatible can reduce design and production cost greatly.
An application example of the present invention is; Can be used for itself and ballast control circuit are integrated on the same chip; Only needing increases the ballast control that very little chip area can realize having APFC, therefore can significantly reduce the cost of the electron rectifier with APFC function.
Description of drawings
Fig. 1 is the schematic diagram of prior art circuit of power factor correction;
Fig. 2 is the theory diagram of circuit of power factor correction of the present invention;
Fig. 3 is that the physical circuit of Fig. 2 is implemented illustration;
Fig. 4 is for when the input voltage of AC power is near 0, the signal waveform on the qualified point of the circuit of power factor correction in Fig. 3;
Fig. 5 for when the input voltage of AC power 0 and peak value between certain when a bit, the signal waveform on the qualified point of the circuit of power factor correction in Fig. 3;
Fig. 6 is for when the input voltage of AC power is near peak value, the signal waveform on the qualified point of the circuit of power factor correction in Fig. 3.
Embodiment
Referring to Fig. 2; The present invention is provided with EMI filter circuit 1, rectifier bridge 2, Boost circuit 3, load 4; More than constitute main power circuit, after the AC power process EMI electromagnetic interference filter circuit 1, input to rectifier bridge 2; Rectifier bridge is input to booster type Boost circuit 3 with the direct current that the alternating current of importing is transformed to pulsation, becomes high voltage direct current to export to load 4 through boosting inverter; Pulse signal generator 5, trapezoidal waveshaping circuit 6, the pulse-width modulation that receives trapezoidal signal controlling and buffering drive circuit 7 more than constitute source control circuit and replace prior art employing dual-loop control circuit;
Referring to Fig. 3, rectifier bridge 2 comprises 4 diode D1, D2, D3, D4; Boost circuit 3 comprises input filter capacitor Cin, boost inductance L1, switching power tube M1, booster diode D5 and output filter capacitor Cout; Trapezoidal waveshaping circuit 6 comprises that input voltage detects resistance R 1, output voltage detects resistance R 2, pulse signal input coupling capacitance C1, sampling capacitance C2 and voltage-stabiliser tube Z1.Receive the pulse-width modulation and the buffering drive circuit 7 of trapezoidal signal controlling to comprise voltage comparator and buffering driver.The input termination AC power of electromagnetic interface filter 1.An output of electromagnetic interface filter 1, the anode of diode D1 and the negative electrode of diode D3 are interconnected in node n1; The negative electrode of another output of electromagnetic interface filter 1, the anode of diode D2 and diode D4 is interconnected in node n2; One end of the end of the input filter capacitor Cin of the negative electrode of the negative electrode of diode D1, diode D2, Boost circuit, the end of boost inductance L1 and input sample resistance R 1 is interconnected in node n3; The end of the output capacitance Cout of the other end of the anode of the anode of diode D3, diode D4, Boost circuit input filter capacitor Cin, the source electrode of switching power tube M1, Boost circuit, an end of load 4, the end of sampling capacitance C2 and the anode of voltage-stabiliser tube Z1 are interconnected in node n4, and n4 is as earth terminal; The anode of the drain electrode of the other end of boost inductance L1, switching power tube M1 and booster diode D5 is interconnected in node n5; The end of the other end of the output filter capacitor Cout of the negative electrode of booster diode D5, Boost circuit, output sampling resistor R2 and the other end of load 4 are interconnected in node n6; The end of the output of pulse signal generator, coupling capacitance C1 is interconnected in node n7; The other end, the other end of sampling capacitance C2, the negative electrode of voltage-stabiliser tube Z1 and the inverting input of voltage comparator of the other end of the other end of C1, input sample resistance R 1, output sampling resistor R2 are interconnected in node n8; The in-phase input end of voltage comparator and reference voltage Vref are interconnected in node n9; The output of voltage comparator and the input of buffering driver are interconnected in node n10; The grid of the output of buffering driver and switching power tube M1 is interconnected in node n11.
Operation principle of the present invention: pulse signal generator 5 produces the pulse signal of a fixed frequency, fixed duty cycle.When pulse signal is high level, voltage-stabiliser tube Z1 with the voltage clamp of sampling capacitance C2 at its voltage of voltage regulation.This voltage of voltage regulation is higher than the reference voltage Vref of voltage comparator, and buffering driver is output as low level.When the trailing edge of pulse signal arrives; Through pulse signal input coupling capacitance C1 coupling, make the voltage of sampling capacitance C2 to the negative direction saltus step, the voltage after the saltus step is lower than the reference voltage of voltage comparator; The voltage comparator output switching activity, buffering driver is output as high level.
The voltage of sampling capacitance C2 is the beginning in a new sampling period after the negative direction saltus step; After this input voltage sampling resistor R1 detects the input voltage (being the output voltage of rectifier bridge 2) of Boost circuit 3, and this voltage charges to sampling capacitance C2 through sampling resistor R1; Output sampling resistor R2 detects the output voltage (being the voltage at load two ends) of Boost circuit 3; This voltage charges to sampling capacitance C2 through sampling resistor R2; The voltage that makes sampling capacitance is in each sampling period, from the initial voltage after the negative sense saltus step to rise (initial voltage after the saltus step of sampling capacitance negative sense is lower than the voltage comparator reference voltage).They have following relation:
1, the slope of the voltage of sampling capacitance C2 rising is relevant with the voltage of rectifier bridge 2 outputs in this employing cycle: voltage is high more, and it is fast more to charge, and makes that the duty ratio of the control signal that controller is exported is more little; Voltage is low more, and it is slow more to charge, and makes that the duty ratio of the control signal that controller is exported is big more.
2, the slope of the voltage of sampling capacitance rising is relevant with the voltage of output in this employing cycle of Boost circuit: voltage is high more, and it is fast more to charge, and makes that the duty ratio of the control signal that controller is exported is more little; Voltage is low more, and it is slow more to charge, and makes that the duty ratio of the control signal that controller is exported is big more.
When sampling capacitance voltage rises to when being higher than the voltage comparator reference voltage, voltage comparator output upset once more, buffering driver is output as low level.
This structure has realized two kinds of functions, like Fig. 4, and Fig. 5, shown in Figure 6.Among Fig. 4,5,6, last figure is the pulse signal generator output waveform, and middle figure solid line is the voltage waveform into sampling capacitance C2, and dotted line is and is the voltage comparator reference voltage Vref, and figure below is the pulse driver output waveform.
1, the input voltage in AC power changes to the peak value process by sinusoidal rule from zero; The duty ratio of switch controlling signal (controller output signal) reduces gradually; Near the input voltage peak value, the duty of switch controlling signal is minimum, after this duty ratio reducing and increase gradually with input voltage again; Go round and begin again, thereby make the waveform of the electric current of AC power input follow the waveform of input voltage.
2, when output voltage uprises, big to the charging current change of sampling capacitance C2, it is big that the voltage rate of rise becomes, thereby the duty ratio of switch controlling signal is reduced; When the output voltage step-down, the charging current of sampling capacitance diminishes, and the voltage rate of rise diminishes, thereby the duty ratio of switch controlling signal is increased, and makes VD be stabilized in certain scope like this.
The present invention has simplified the source control circuit that has in the existing circuit of power factor correction; Needn't use numerous and diverse analog signal computing circuit and complicated sample circuit; Can all realize, needn't adopt bipolar technology or BiCMOS technology, reduce the design and the production cost of circuit with CMOS technology.For example can this circuit be integrated in the ballast control chip, the pulse signal in the reusable ballast so just can realize having the electric ballast application-specific integrated circuit (ASIC) of active power calibration function on the basis that does not increase cost basically.Certainly, this circuit methods needing also to can be used for other power integrated circuits of APFC function.