CN101741865B - High-speed reconfigurable data forwarding device - Google Patents
High-speed reconfigurable data forwarding device Download PDFInfo
- Publication number
- CN101741865B CN101741865B CN201010101976.XA CN201010101976A CN101741865B CN 101741865 B CN101741865 B CN 101741865B CN 201010101976 A CN201010101976 A CN 201010101976A CN 101741865 B CN101741865 B CN 101741865B
- Authority
- CN
- China
- Prior art keywords
- module
- port
- framing
- inbound port
- clock
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Data Exchanges In Wide-Area Networks (AREA)
Abstract
The invention discloses a high-speed reconfigurable data forwarding device relating to a high-speed route forwarding device in a communication network field. The device is composed of a service interface module, a framing module, a forwarding processing module, an exchange preprocessing module, a rate configuration module, a main processor module and the like. The invention adopts flexible interface and protocol design, a physical layer can be accessed into service with various rates, such as 155 Mbps, 622 Mbps, 1 Gbps, 2.5 Gbps and the like, a link layer supports POS, ATM and Ethernet protocol, and a network layer supports data forwarding based on IPv4, IPv6 and MPLS, so that the device of the invention has high reconfigurable characteristics. The invention realizes the function of various traditional data forwarding devices by one data forwarding device so as to greatly simplify the design of communication network router, thus effectively lowering development cost and shortening development period. The device is especially suitable for serving as a high-speed reconfigurable data forwarding device in the high-speed route forwarding equipment with various interface and protocol types.
Description
Technical field
The present invention relates to the high speed routing forwarding unit in communication network field.Be particularly suitable for making high-speed reconfigurable data forwarding device in interface and the multifarious high speed routing forwarding unit of protocol type.
Background technology
Current communication network large to exchange capacity, interface rate is high, support various protocols and guarantee the future developments such as service quality.Be in the routing forwarding equipment of network core status, the physical interface of the speed such as 155Mbps, 622Mbps, 1Gbps and 2.5Gbps not only will be provided, and link layer needs to support the various protocols such as POS, ATM and Ethernet, network layer needs to support based on various protocols such as IPv4, IPv6 and MPLS.
In order to meet above-mentioned requirements, traditional method designs the interface that the different circuit board of several functions provides different rates, supports that different agreement type is to realize interconnecting between network node.In this context, how realize by a kind of data forwarding device the key issue that function that in traditional design, multiple circuit board completes becomes the research and development of current routing forwarding equipment gradually.
Summary of the invention
Technical problem to be solved by this invention is exactly be to avoid the weak point in above-mentioned background technology and provide a kind of to have restructural performance data retransmission unit and realize the function that in traditional design, multiple circuit board completes, it adopts interface and Protocol Design flexibly, physical layer can access the business of the multiple speed such as 155Mbps, 622Mbps, 1Gbps and 2.5Gbps, link layer supports POS, ATM and Ethernet protocol, network layer supports the data retransmission based on IPv4, IPv6 and MPLS, has the restructural characteristic of height.The present invention has that hardware platform is unified, cost is low and the feature such as the R&D cycle is short.
Technical problem to be solved by this invention is realized by following technical proposal:
The present invention is made up of business interface module 101, framing module 102, forward process module 103, exchange pretreatment module 104, rate configuration module 105, main processor modules 106 and clock module 107, wherein the inbound port 2 of business interface module 101 is connected with business datum port A, carries out opto-electronic conversion to the business datum that business datum port A accesses; Business interface module 101 outbound port 1 is connected with framing module 102 inbound port 1 by 8 pairs of universal serial bus, and the business datum that framing module 102 pairs of business interface modules 101 input carries out framing processing;
The outbound port 2 of framing module 102 is connected with forward process module 103 inbound port 1 by parallel bus, and the business datum that the forward process module 103 pairs of framing module 102 input is resolved, table look-up, forward process; The inbound port 3 of framing module 102 is connected with the outbound port 1 of clock module 107 by clock bus, and clock information is transferred to framing module 102 by clock module 107, and to carry out data clock synchronous; The inbound port 4 of framing module 102 is connected with rate configuration module 105 outbound port 1, and rate information is transferred to the configuration that framing module 102 carries out service rate by rate configuration module 105; The inbound port 5 that goes out of framing module 102 is connected with the discrepancy port one of main processor modules 106 by cpu bus, management, configuration information are transferred to framing module 102 and carry out managing and configuring by main processor modules 106, and state information is reported to main processor modules 106 by framing module 102;
The outbound port 2 of forward process module 103 is connected with the inbound port 1 exchanging pretreatment module 104 by parallel bus, and the data exchanging pretreatment module 104 pairs of forward process modules 103 inputs are carried out fixed length grouping, increased the exchange pretreatment operation of switch label; The inbound port 3 of forward process module 103 is connected with the outbound port 3 of clock module 107 by clock bus, and clock signal transmission is carried out clock synchronous to forward process module 103 by clock module 107; The inbound port 4 that goes out of forward process module 103 is connected with the inbound port 2 that goes out of main processor modules 106 by cpu bus, management, configuration information are transferred to forward process module 103 and carry out managing and configuring by main processor modules 106, and state information is reported to main processor modules 106 by forward process module 103;
Exchange pretreatment module 104 inbound port 2 to be connected with the outbound port 3 of clock module 107 by clock interface, clock signal transmission is carried out clock synchronous to exchange pretreatment module 104 by clock module 107; Exchange pretreatment module 104 goes out inbound port 3 and is connected with the inbound port 3 that goes out of main processor modules 106, management, configuration information are transferred to deliver and change pretreatment module 104 and carry out managing and configuring by main processor modules 106, exchange pretreatment module 104 and state information are reported to main processor modules 106; Exchange pretreatment module 104 outbound port 4 to be connected with backboard port B, the business data transmission that exchange pretreatment module 104 exports is exchanged to backboard.
Framing module 102 of the present invention comprises line-side interface module 208, SDH/SONET framing module 209, POS/ATM framing module 210, Physical Coding Sublayer module 211, Media Access Control Module 212, exchange side interface module 213, wherein line-side interface module 208 inbound port 1 is connected with business interface module 101 outbound port 1, and the business datum of business interface module 101 is carried out speed decoupling zero by line-side interface module 208, line-side interface module 208 inbound port 4 is connected with the outbound port 1 of clock module 107, and clock information is transferred to line-side interface module 208 and carries out clock recovery and clock synchronous by clock module 107, line-side interface module 208 inbound port 3 is connected with rate configuration module 105 outbound port 1, rate information is transferred to the configuration that line-side interface module 208 carries out service rate and mode of operation by rate configuration module 105, support the restructural of 155Mbps, 622Mbps, 1Gbps and 2.5Gbps multiple business speed in physical layer, support the restructural of POS, ATM and Ethernet protocol at link layer, when being configured to the POS/ATM pattern of 155Mbps, 622Mbps or 2.5Gbps, line-side interface module 208 outbound port 2 is connected with the inbound port 1 of SDH/SONET framing module 209, and the business datum that SDH/SONET framing module 209 pairs of line-side interface modules 208 input carries out SDH/SONET framing processing, the outbound port 2 of SDH/SONET framing module 209 is connected with the inbound port 1 of POS/ATM framing module 210, and the business datum that POS/ATM framing module 210 pairs of SDH/SONET framing module 209 input carries out POS/ATM framing processing, the outbound port 2 of POS/ATM framing module 210 is connected with the inbound port 1 of exchange side interface module 213, and the POS/ATM data that POS/ATM framing module 210 inputs by exchange side interface module 213 carry out encapsulation and the forwarding of SPI4.2 formatted data, when being configured to the Ethernet pattern of 1Gbps, the outbound port 2 of line-side interface module 208 is connected with the inbound port 1 of Physical Coding Sublayer module 211, the business datum that Physical Coding Sublayer module 211 pairs of line-side interface modules 208 input meets the 8B/10B physical layer encodes process of 802.3 specifications, the outbound port 2 of Physical Coding Sublayer module 211 is connected with the inbound port 1 of Media Access Control Module 212, the business datum that Media Access Control Module 212 pairs of Physical Coding Sublayer modules 211 input carries out medium education process, the outbound port 2 of Media Access Control Module 212 is connected with the inbound port 1 of exchange side interface module 213, the business datum that exchange side interface module 213 pairs of Media Access Control Module 212 input meets the encapsulation of SPI4.2 specification, decapsulation and forwarding, the outbound port 2 of exchange side interface module 213 is connected with the inbound port 1 of forward process module 103, and the business datum that the forward process module 103 pairs of exchange side interface modules 213 input is resolved, table look-up, forward process.
Forward process module 103 of the present invention comprises parsing module 314, table look-up module 315, forwarding decision module 316, packet header modified module 317, traffic management module 318, list item memory module 319, data memory module 320, microcode configuration module 321, wherein the inbound port 1 of parsing module 314 is connected with the outbound port 2 of framing module 102, and the business datum that parsing module 314 pairs of framing module 102 input carries out header dissection process; The outbound port 2 of parsing module 314 is connected with the inbound port 1 of table look-up module 315, and the business datum that the table look-up module 315 pairs of parsing modules 314 input is tabled look-up process; The inbound port 3 that goes out of table look-up module 315 is connected with the discrepancy port one of list item memory module 319, and the list item of table look-up module 315 pairs of memory modules 319 carries out read-write operation; The outbound port 2 of table look-up module 315 is connected with the inbound port 1 of forwarding decision module 316, and the business datum that forwarding decision module 316 pairs of table look-up module 315 input carries out forwarding decision; The outbound port 2 of forwarding decision module 316 is connected with the inbound port 1 of packet header modified module 317, and the business datum that modified module 317 pairs of forwarding decision modules 316 in packet header input is carried out packet header amendment and forwarded operation; The outbound port 2 of packet header modified module 317 is connected with the inbound port 1 of traffic management module 318, and the business datum that traffic management module 318 pairs of packet header modified modules 317 input carries out traffic scheduling and flow control process; The inbound port 3 that goes out of traffic management module 318 is connected with the discrepancy port one of data memory module 320, and the business datum that traffic management module 318 pairs of data memory modules 320 store carries out read-write operation; The outbound port 2 of traffic management module 318 is connected with the inbound port 1 exchanging pretreatment module 104, and the business datum exchanging pretreatment module 104 pairs of traffic management modules 318 inputs is carried out fixed length grouping, increased the exchange pretreatment operation of switch label; The inbound port 4 of the outbound port 1 of microcode configuration module 321 and the inbound port 3 of parsing module 314, table look-up module 315, the inbound port 3 of forwarding decision module 316, the inbound port 3 of packet header modified module 317, the inbound port 4 of traffic management module 318 are connected, microcode configuration module 321 carries out microcode configuration to each modular circuit connected, by the easy configuration of microcode, network layer realizes the restructural of IPv4, IPv6 and MPLS various protocols; The inbound port 2 that goes out of microcode configuration module 321 is connected with the inbound port 2 that goes out of main processor modules 106, and micro-code instruction is issued to microcode configuration module 321 and carries out instruction translation and transmission operation by main processor modules 106.
The present invention compares background technology tool and has the following advantages:
1. the present invention adopts unified hardware platform to provide the interface of multiple speed such as 155Mbps, 622Mbps, 1Gbps and 2.5Gbps, simplifies interconnecting between different rates network node.
2. the present invention has reconfigurability flexibly, the flexible access of the several data such as POS, ATM and Ethernet can be supported by software merit rating link layer, the fast zoom table of data of IPv4, IPv6 and MPLS can be completed by microcode configuration, realize the high speed forward of network layer multiple business.
3. the present invention extensively adopts parallel data processing mechanism: achieve the parallel of bit stream by parallel bus, realize instruction level parallelism, realize Thread-Level Parallelism by hardware thread by streamline, realizes the parallel of processor by on-chip multiprocessor.Therefore, the high speed processing of data is achieved.
4. the present invention can adopt commercially available general production of integrated circuits, and research and production is with low cost, easy to utilize.
Accompanying drawing explanation
Fig. 1 is the electric principle logic block-diagram of the embodiment of the present invention.
Fig. 2 is the electric principle logic block-diagram of framing module 102 embodiment of the present invention.
Fig. 3 is the electric principle logic block-diagram of forward process module 103 embodiment of the present invention.
Embodiment
Referring to figs. 1 through Fig. 3, the present invention is made up of business interface module 101, framing module 102, forward process module 103, exchange pretreatment module 104, rate configuration module 105, main processor modules 106 and clock module 107, Fig. 1 is electric principle logic block-diagram of the present invention, and embodiment presses Fig. 1 connection line.Business interface module 101 is realized the high-speed transfer of business datum by 8 pairs of speed up to the CML differential lines pair of 3.125Gbps and framing module 102 and provides signal monitoring, and whether instruction interface has signal; Framing module 102, forward process module 103 and exchange the SPI4.2 interface adopting standard between pretreatment module 104, adopt the bus clock of 100MHz, transmission bandwidth reaches 16Gbps; Clock module 107 pairs of framing module 102 provide frequency to be the synchronised clock of 155.52MHz and 156.25MHz, and wherein, 155.52MHz clock is used for the synchronised clock under SDH/SONET pattern, and 156.25MHz clock is used for the synchronised clock under gigabit Ethernet pattern.Embodiment business interface module 101 adopts the PT7423-61-2T chip manufacturing of PHOTON company, exchange pretreatment module 104 and adopt that the FAP10V chip of DUNE company is auxiliary to be made in DDRII SDRAM, rate configuration module adopts toggle switch 105 and FPGA to make, main processor modules 106 coordinates the VxWorks software development of WINDRIVER company by the MPC8265 chip of MOTOROLA company, and clock module 107 adopts the ZL30117 of Zarlink company to make.
Framing module 102 of the present invention mainly completes the functions such as SDH framing, POS framing, ATM framing and Ethernet framing; It comprises line-side interface module 208, SDH/SONET framing module 209, POS/ATM framing module 210, Physical Coding Sublayer module 211, Media Access Control Module 212, exchange side interface module 213, Fig. 2 is the electric principle logic block-diagram of framing module 102 of the present invention, and embodiment presses Fig. 2 connection line.Wherein line-side interface module 208 inbound port 1 is connected with business interface module 101 outbound port 1, service data transmission; Line-side interface module 208 inbound port 4 is connected with the outbound port 1 of clock module 107, recovers and provides clock synchronization information; Line-side interface module 208 inbound port 3 is connected with rate configuration module 105 outbound port 1, realize the configuration of service rate and mode of operation, support the restructural of 155Mbps, 622Mbps, 1Gbps and 2.5Gbps multiple business speed in physical layer, support the restructural of POS, ATM and Ethernet protocol at link layer; When being configured to the POS/ATM pattern of 155Mbps, 622Mbps or 2.5Gbps, line-side interface module 208 outbound port 2 is connected with the inbound port 1 of SDH/SONET framing module 209, realize SDH/SONET framing function, the outbound port 2 of SDH/SONET framing module 209 is connected with the inbound port 1 of POS/ATM framing module 210, realize POS/ATM framing function, the outbound port 2 of POS/ATM framing module 210 is connected with the inbound port 1 of exchange side interface module 213, service data transmission; When being configured to the Ethernet pattern of 1Gbps, the outbound port 2 of line-side interface module 208 is connected with the inbound port 1 of Physical Coding Sublayer module 211, complete the 8B/10B physical layer encodes function meeting 802.3 specifications, the outbound port 2 of Physical Coding Sublayer module 211 is connected with the inbound port 1 of Media Access Control Module 212, complete medium education function, the outbound port 2 of Media Access Control Module 212 is connected with the inbound port 1 of exchange side interface module 213, service data transmission; The inbound port 1 of exchange side interface module 213 is connected with the inbound port 1 of forward process module 103, carries out the transmission of business datum.Each modular circuit in embodiment framing module 102 adopts the CS1331 chip manufacturing of Cortina company.
Forward process module 103 of the present invention mainly realizes the parsing that business data packet carries out head, distinguishes IPv4, IPv6, MPLS bag, realizes classification and the filtration of bag.What the bag through classification to be completed the fast-forwarding table of all kinds bag by forward process module by the collaborative work of inner search processor searches process.After completing and tabling look-up, the packet of middle coupling will be transmitted, give traffic manager (TM) to carry out QoS by measures such as traffic shaping, queue scheduling and congestion managements and ensure process, and be sent to switching matrix according to specific priority level and forward.It comprises parsing module 314, table look-up module 315, forwarding decision module 316, packet header modified module 317, traffic management module 318, list item memory module 319, data memory module 320, microcode configuration module 321, Fig. 3 is the electric principle logic block-diagram of forward process module 103 of the present invention, and embodiment presses Fig. 3 connection line.Wherein the inbound port 1 of parsing module 314 is connected with the outbound port 2 of framing module 102, service data transmission; The outbound port 2 of parsing module 314 is connected with the inbound port 1 of table look-up module 315, realizes parsing and the classification of packet; The inbound port 3 that goes out of table look-up module 315 is connected with the discrepancy port one of list item memory module 319, realizes list item locating function; The outbound port 2 of table look-up module 315 is connected with the inbound port 1 of forwarding decision module 316, the checking result of transmission data; The outbound port 2 of forwarding decision module 316 is connected with the inbound port 1 of packet header modified module 317, the forwarding decision of transmission packet; The outbound port 2 of packet header modified module 317 is connected with the inbound port 1 of traffic management module 318, transmits according to the amended packet of forwarding decision; The inbound port 3 that goes out of traffic management module 318 is connected with the discrepancy port one of data memory module 320, realizes the traffic management function of business datum; The outbound port 2 of traffic management module 318 is connected with the inbound port 1 exchanging pretreatment module 104, service data transmission; The outbound port 1 of microcode configuration module 321 is connected with parsing module 314, table look-up module 315, forwarding decision module 316, packet header modified module 317, traffic management module 318, realize microcode configuration feature, by the easy configuration of microcode, network layer realizes the restructural of IPv4, IPv6 and MPLS various protocols; The inbound port 1 of microcode configuration module 321 is connected with the inbound port 2 that goes out of main processor modules 106, is completed the injection of microcode by the communication channel of main processor modules.The network processing unit of the NP-2 series of each modular circuit employing Ezchip company in embodiment forward process module 103 is auxiliary to be made in DDR-II SDRAM, QDR-II SRAM.
Mounting structure of the present invention is as follows:
It is in the printed board of 322.5 millimeters × 220 millimeters that each parts of the present invention are arranged on one piece of size long × wide, it is in the cabinet of 482.6 millimeters × 443.7 millimeters × 440 millimeters that printed board is arranged on long × wide × height, installing cables socket on panel, assembly cost is invented.
Claims (3)
1. high-speed reconfigurable data forwarding device, it comprises business interface module (101), exchanges pretreatment module (104), rate configuration module (105), main processor modules (106), clock module (107), characterized by further comprising framing module (102), forward process module (103), wherein the inbound port 2 of business interface module (101) is connected with business datum port A, carries out opto-electronic conversion to the business datum that business datum port A accesses; Business interface module (101) outbound port 1 is connected with framing module (102) inbound port 1 by 8 pairs of universal serial bus, and framing module (102) carries out framing processing to the business datum that business interface module (101) inputs;
The outbound port 2 of framing module (102) is connected with forward process module (103) inbound port 1 by parallel bus, and the business datum that forward process module (103) inputs framing module (102) is resolved, table look-up, forward process; The inbound port 3 of framing module (102) is connected by the outbound port 1 of clock bus with clock module (107), and clock information is transferred to framing module (102) by clock module (107), and to carry out data clock synchronous; The inbound port 4 of framing module (102) is connected with rate configuration module (105) outbound port 1, and rate information is transferred to the configuration that framing module (102) carries out service rate by rate configuration module (105); The inbound port 5 that goes out of framing module (102) is connected by the discrepancy port one of cpu bus with main processor modules (106), management, configuration information are transferred to framing module (102) and carry out managing and configuring by main processor modules (106), and state information is reported to main processor modules (106) by framing module (102);
The outbound port 2 of forward process module (103) is connected with the inbound port 1 exchanging pretreatment module (104) by parallel bus, exchanges pretreatment module (104) and the data that forward process module (103) inputs are carried out to fixed length grouping, increased the exchange pretreatment operation of switch label; The inbound port 3 of forward process module (103) is connected by the outbound port 3 of clock bus with clock module (107), and clock signal transmission is carried out clock synchronous to forward process module (103) by clock module (107); The inbound port 4 that goes out of forward process module (103) is connected with the inbound port 2 that goes out of main processor modules (106) by cpu bus, management, configuration information are transferred to forward process module (103) and carry out managing and configuring by main processor modules (106), and state information is reported to main processor modules (106) by forward process module (103);
Exchange pretreatment module (104) inbound port 2 to be connected by the outbound port 3 of clock interface with clock module (107), clock signal transmission is carried out clock synchronous to exchange pretreatment module (104) by clock module (107); Exchange pretreatment module (104) goes out inbound port 3 and is connected with the inbound port 3 that goes out of main processor modules (106), management, configuration information are transferred to deliver and change pretreatment module (104) and carry out managing and configuring by main processor modules (106), exchange pretreatment module (104) and state information are reported to main processor modules (106); Exchanging pretreatment module (104) outbound port 4 to be connected with backboard port B, exchanging exchanging the business data transmission that pretreatment module (104) exports to backboard.
2. high-speed reconfigurable data forwarding device according to claim 1, is characterized in that: framing module (102) comprises line-side interface module (208), SDH/SONET framing module (209), POS/ATM framing module (210), Physical Coding Sublayer module (211), Media Access Control Module (212), exchange side interface module (213), wherein line-side interface module (208) inbound port 1 is connected with business interface module (101) outbound port 1, and the business datum of business interface module (101) is carried out speed decoupling zero by line-side interface module (208), line-side interface module (208) inbound port 4 is connected with the outbound port (1) of clock module (107), and clock information is transferred to line-side interface module (208) and carries out clock recovery and clock synchronous by clock module (107), line-side interface module (208) inbound port 3 is connected with rate configuration module (105) outbound port 1, rate information is transferred to the configuration that line-side interface module (208) carries out service rate and mode of operation by rate configuration module (105), support the restructural of 155Mbps, 622Mbps, 1Gbps and 2.5Gbps multiple business speed in physical layer, support the restructural of POS, ATM and Ethernet protocol at link layer, when being configured to the POS/ATM pattern of 155Mbps, 622Mbps or 2.5Gbps, line-side interface module (208) outbound port 2 is connected with the inbound port 1 of SDH/SONET framing module (209), and SDH/SONET framing module (209) carries out SDH/SONET framing processing to the business datum that line-side interface module (208) inputs, the outbound port 2 of SDH/SONET framing module (209) is connected with the inbound port 1 of POS/ATM framing module (210), and POS/ATM framing module (210) carries out POS/ATM framing processing to the business datum that SDH/SONET framing module (209) inputs, the outbound port 2 of POS/ATM framing module (210) is connected with the inbound port 1 of exchange side interface module (213), and the POS/ATM data that POS/ATM framing module (210) inputs are carried out encapsulation and the forwarding of SPI4.2 formatted data by exchange side interface module (213), when being configured to the Ethernet pattern of 1Gbps, the outbound port 2 of line-side interface module (208) is connected with the inbound port 1 of Physical Coding Sublayer module (211), Physical Coding Sublayer module (211) meets the 8B/10B physical layer encodes process of 802.3 specifications to the business datum that line-side interface module (208) inputs, the outbound port 2 of Physical Coding Sublayer module (211) is connected with the inbound port 1 of Media Access Control Module (212), Media Access Control Module (212) carries out medium education process to the business datum that Physical Coding Sublayer module (211) inputs, the outbound port 2 of Media Access Control Module (212) is connected with the inbound port 1 of exchange side interface module (213), exchange side interface module (213) meets the encapsulation of SPI4.2 specification to the business datum that Media Access Control Module (212) inputs, decapsulation and forwarding, the outbound port 2 of exchange side interface module (213) is connected with the inbound port 1 of forward process module (103), and the business datum that forward process module (103) inputs exchange side interface module (213) is resolved, table look-up, forward process.
3. high-speed reconfigurable data forwarding device according to claim 1, it is characterized in that: forward process module (103) comprises parsing module (314), table look-up module (315), forwarding decision module (316), packet header modified module (317), traffic management module (318), list item memory module (319), data memory module (320), microcode configuration module (321), wherein the inbound port 1 of parsing module (314) is connected with the outbound port 2 of framing module (102), parsing module (314) carries out header dissection process to the business datum that framing module (102) inputs, the outbound port 2 of parsing module (314) is connected with the inbound port 1 of table look-up module (315), and table look-up module (315) to be tabled look-up process to the business datum that parsing module (314) inputs, the inbound port 3 that goes out of table look-up module (315) is connected with the discrepancy port one of list item memory module (319), and the list item of table look-up module (315) to memory module (319) carries out read-write operation, the outbound port 2 of table look-up module (315) is connected with the inbound port 1 of forwarding decision module (316), and forwarding decision module (316) carries out forwarding decision to the business datum that table look-up module (315) inputs, the outbound port 2 of forwarding decision module (316) is connected with the inbound port 1 of packet header modified module (317), and packet header modified module (317) carries out packet header amendment to the business datum that forwarding decision module (316) inputs and forwards operation, the outbound port 2 of packet header modified module (317) is connected with the inbound port 1 of traffic management module (318), and traffic management module (318) carries out traffic scheduling and flow control process to the business datum that packet header modified module (317) inputs, the inbound port 3 that goes out of traffic management module (318) is connected with the discrepancy port one of data memory module (320), and traffic management module (318) carries out read-write operation to the business datum that data memory module (320) stores, the outbound port 2 of traffic management module (318) is connected with the inbound port 1 exchanging pretreatment module (104), exchanges pretreatment module (104) and the business datum that traffic management module (318) inputs is carried out to fixed length grouping, increased the exchange pretreatment operation of switch label, the inbound port 4 of the outbound port 1 of microcode configuration module (321) and the inbound port 3 of parsing module (314), table look-up module (315), the inbound port 3 of forwarding decision module (316), the inbound port 3 of packet header modified module (317), the inbound port 4 of traffic management module (318) are connected, microcode configuration module (321) carries out microcode configuration to each modular circuit connected, by the easy configuration of microcode, network layer realizes the restructural of IPv4, IPv6 and MPLS various protocols, the inbound port 2 that goes out of microcode configuration module (321) is connected with the inbound port 2 that goes out of main processor modules (106), and micro-code instruction is issued to microcode configuration module (321) and carries out instruction translation and transmission operation by main processor modules (106).
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201010101976.XA CN101741865B (en) | 2010-01-28 | 2010-01-28 | High-speed reconfigurable data forwarding device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201010101976.XA CN101741865B (en) | 2010-01-28 | 2010-01-28 | High-speed reconfigurable data forwarding device |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101741865A CN101741865A (en) | 2010-06-16 |
CN101741865B true CN101741865B (en) | 2015-07-15 |
Family
ID=42464751
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201010101976.XA Active CN101741865B (en) | 2010-01-28 | 2010-01-28 | High-speed reconfigurable data forwarding device |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN101741865B (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN114389753B (en) * | 2021-12-15 | 2024-01-30 | 中国电子科技集团公司第三十研究所 | POS interface capable of adapting to various rates |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101184092A (en) * | 2007-12-10 | 2008-05-21 | 华中科技大学 | Environment perception restructurable mobile terminal communication processor |
-
2010
- 2010-01-28 CN CN201010101976.XA patent/CN101741865B/en active Active
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101184092A (en) * | 2007-12-10 | 2008-05-21 | 华中科技大学 | Environment perception restructurable mobile terminal communication processor |
Also Published As
Publication number | Publication date |
---|---|
CN101741865A (en) | 2010-06-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US10742513B2 (en) | Network interconnect as a switch | |
CN100384169C (en) | Master and slave frame cascade system in cut-in device | |
CN101252537B (en) | Switching network communicating system, method and master control board | |
KR101502610B1 (en) | 50 Gb/s ETHERNET USING SERIALIZER/DESERIALIZER LANES | |
CN206820773U (en) | A kind of board for supporting RapidIO and network double crossing over function | |
CN101848186B (en) | Three-layer plastic optical fiber Ethernet switch | |
CN103823784A (en) | FC-AE-1553 bus controller based on FPGA | |
US20060075175A1 (en) | Method and system for configuring high-speed serial links between components of a network device | |
CN107347027A (en) | A kind of link redundancy communication system based on EtherCAT | |
CN103905281A (en) | FC-AE-1553 bus node card capable of interchangeably achieving functions of network controller and network terminal | |
CN104009867A (en) | Optical fiber Ethernet intelligent branching unit switching method based on FPGA | |
CN107395525A (en) | A kind of rapidIO network exchange methods of VPX power boards | |
CN204392269U (en) | A kind of full SDN High_speed NIC able to programme | |
CN100421423C (en) | Central router based on serial Rapid 10 bus | |
CN101895398B (en) | Method and device for data communication | |
CN106168933B (en) | A method of virtual dual-port shared drive is realized based on high-speed serial communication | |
CN205304857U (en) | 10, 000, 000, 000 light network switch | |
CN205305048U (en) | Giga light network switch | |
CN101741865B (en) | High-speed reconfigurable data forwarding device | |
CN201388208Y (en) | Multi-rate, multi-interface data message processing veneer based on ATCA | |
CN206332674U (en) | A kind of Ethernet switch wiring board | |
CN107980223A (en) | Ethernet interconnection circuit and device | |
US20040081096A1 (en) | Method and device for extending usable lengths of fibre channel links | |
WO2018196833A1 (en) | Message sending method and message receiving method and apparatus | |
CN206195819U (en) | Spatial information network link controlgear |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant |