Embodiment
The present invention is further detailed explanation below in conjunction with accompanying drawing and example.
As shown in Figure 1, communication of mobile terminal processor of the present invention comprises restructural physical layer element 100, Clock Managing Unit 200, timing control unit 300, microcontroller 600, memory cell 400, agreement and perception processing unit 500, bus bridge contact 930, boundary scan interface 910, oscillator 800, electric power management circuit 700, can redefine high-speed interface 920 and bus bridge contact 930.
Restructural physical layer element 100 is used to finish the self adaptation transmitting-receiving and the modulation of data, and it receives and comes from outside data RX, and it is sent into external bus; After other resume module were intact, data were admitted to external bus and send through restructural physical layer element 100.Oscillator 800 provides needed frequency of oscillation for restructural physical layer element 100.
The major function of Clock Managing Unit 200 is to carry out the management of clock.It receives the frequency of oscillation from oscillator 800, carries out Clock management by external bus.
Timing control unit 300 is used to finish regularly, interruption controls, to improve the anti-interference of system.
The major function of memory cell 400 is the configurations that are used for starting, it and inside and external bus storage, swap data.
The major function of agreement and perception processing unit 500 is to be mainly used to treatment media MAC layer, media-independent handover layer protocol, environmental variance and fail safe etc.It receives from the data of restructural physical layer element 100 by bus bridge contact 930 and handles accordingly, and then sends to restructural physical layer element 100 by bus bridge contact 930.
Boundary scan interface 910 is the interfaces to whole system is debugged and internal element is tested.
The function of oscillator 800 is to produce stable frequency of oscillation.It provides frequency of oscillation for Clock Managing Unit 200 and restructural physical layer element 100.When working frequency of chip is low as the whole clock work of chip.
The major function of microcontroller 600 is the processing of mac-layer protocol and the message groups bag and the processing of MIH layer, and to control, management, storage and the debugging of entire chip.The processing time of microcontroller 600 mainly concentrates on agreement and perception processing unit 500.The control of restructural physical layer element 100 can trigger by timing control unit 300, and the timer in the timing control unit 300 is adjustable with each priority of interrupt, guarantees that microcontroller 600 has time enough to handle MAC layer and MIH layer protocol.Microcontroller 600 comprises 4 states altogether, moves, resets, hovers and restart, and its state such as Fig. 8 show.
Can redefine high-speed interface 920 and can realize and being connected of peripheral hardware that this interface can be defined as serial line interface or parallel interface.
Bus bridge contact 930 is responsible for connecting internal bus and external bus.When the device that connects on 600 pairs of external buss of microcontroller is controlled, need through bus bridge contact 930.
When receiving data, input data RX at first enters restructural physical layer element 100, enters external bus then, enters into internal bus via bus bridge contact 930 again, enters agreement and perception processing unit 500 then, enters microcontroller 600 at last; When sending data, data at first enter agreement by microcontroller 600 and perception processing unit 500 enters internal bus then, enter external bus via bus bridge contact 930, and entering into restructural physical layer element 100 at last becomes data flow TX and send out.
Illustrate the concrete formation of each part mentioned above below.
As shown in Figure 2, restructural physical layer element 100 comprises that frequency synthesizer 106, D and D/A converter 101, upconverter 103, low-converter 102, variable low noise amplifier 105, variable low noise amplifier 104, restructural coded/modulated device 107, direct memory access device 108, restructural decode/demodulates device 109, radio-frequency transmissions buffer memory 110, radio frequency receive buffer memory 111, wireless environment variable configurator 112, antenna switching unit 114, broad-band antenna 113.When its workflow is reception, RX at first enters broad-band antenna 113, enter variable low noise amplifier 105 through antenna switching unit 114, enter low-converter 102 then, enter radio-frequency transmissions buffer memory 110 again through D and D/A converter 101, enter external bus after entering restructural decode/demodulates device 109; Data enter restructural coded/modulated device 107 by external bus in the time of the emission data, enter radio-frequency transmissions buffer memory 110 then, enter upconverter 103 after in D and D/A converter 101, changing accordingly, enter variable low noise amplifier 104 then, become emission data TX through antenna switching unit 114 and broad-band antenna 113.
Frequency synthesizer 106 is a kind of broadband frequency synthesizers of modulating, and this frequency synthesizer can realize being lower than the modulation step-length of 1MHz, and the output frequency modulation range is greater than 10GHz.For modulator and demodulator provide accurate frequency.Particularly frequency synthesizer 106 adopts 3 frequency synthesizers, controls synthetic MHz frequency band signals and ghz band signal as required respectively by control logic, synthesizes then to have the broad frequency range, resolution height, and the fast clock signal of switching rate.Frequency synthesizer 106 is with good expansibility, and can change output frequency flexibly according to the requirement of applied environment.It receives the control signal of external bus, adjusts corresponding output frequency fc.Fc provides conversion frequency for last low-converter.Oscillator 800 provides reference frequency for frequency synthesizer 106.
D and D/A converter 101 is the adaptive pipeline organization digital-to-analogue/analog to digital converters of a kind of restructural, this transducer can be according to the difference of input signal band limits, automatically select the size of sample frequency and the figure place of resolution, and can reduce area of chip and power consumption.Particularly D and D/A converter 101 detects the frequency range that control circuit detects the input analog signal automatically by a frequency range, disposes the size of sample frequency and the figure place of resolution automatically according to frequency range then.As required, D and D/A converter 101 can directly be linked on 802.3 the intermediate frequency.The signal that it receives from low-converter 102 receives buffer memory 111 through issuing radio frequency after the analog-to-digital conversion; It receives from the signal of radio-frequency transmissions buffer memory 110 and issues upconverter 103 through after the digital-to-analogue conversion.Microcontroller 600 can carry out the configuration of sample frequency and figure place by 930 pairs of D and D/A converters of bus bridge contact 101.
The function of upconverter 103 is the lower frequency bands of moving the radiofrequency signal linearity, passes in the base band, is convenient to Base-Band Processing.The structure of upconverter 103 also is a difference paralleling switch on two frequency mixers, at the local frequency input of frequency mixer tandem tap respectively, the shutoff by the radiofrequency signal control switch realizes that not frequency conversion, up-conversion, three kinds of frequency conversion modes of secondary up-conversion move signal in the base band to a higher frequency band.It receives from the signal of D and D/A converter 101 and sends it to variable power amplifier 104.
Variable power amplifier 104 makes transmitter power keep stable in the set point of temperature scope, has the power-on protection function, the damage of impulse current to reflector of avoiding starting shooting.Variable power amplifier 104 compares and enlarges reference voltage and feedback voltage by amplifier, controls the size of bias current, to realize the control of transmitter power.Coupling capacitance effect in this circuit is very important, and its effect is a ripple of eliminating the amplifier output voltage, so it is the key that keeps laser bias current stability.It receives from the data of upconverter 103 and sends it to antenna switching unit 114.
The function of low-converter 102 is the processing of the analog signal that the lower band signal linearity in the base band is moved a high frequency band being convenient to simulate part.The structure of low-converter 102 is difference paralleling switches on two frequency mixers, at the local frequency input of frequency mixer tandem tap respectively, the shutoff by the radiofrequency signal control switch realizes that not frequency conversion, down-conversion, three kinds of frequency conversion modes of secondary down-conversion move radiofrequency signal to a lower frequency band.He receives from the signal of variable low noise amplifier 105 and sends it to D and D/A converter 101.
Variable low noise amplifier 105 satisfies the performance requirement of various protocols to low noise amplifier, comprise a plurality of variable gain power amplification units, possess different saturation output power level separately, configuration is equipped with effect by input switch array with one of them power cell to mode switching signal with controller according to environmental parameter.
By the switching of radio-frequency switch array, the output signal that the high-output power that is used for the high-output power pattern amplifies the variable gain unit or is used for the low output variable gain power cell of low output power mode has realized the efficiency improvement under high and low output power mode.Its frequency makes it can work in the wide frequency ranges of 0~11G by the adjusting of input impedance matching network and gain.And designed automatic gain Control and Feedback loop, make the non-linear of variable low noise amplifier 105 and gain reach good compromise, and regulating and controlling at any time.Avoid the use of cascade variable gain amplifier simultaneously, reduced system noise.For output impedance, adopt standard 50 ohm, made things convenient for the design of subsequent cascaded circuit to avoid too much capacitance-resistance use simultaneously, saved circuit area, reduced cost.It receives from the signal of antenna switching unit 114 and sends it to low-converter 102.
Restructural coded/modulated device 107 provides to be realized coding and modulates needed various basic logic unit (such as register, adder or the like), by controller these basic logic units is configured, and can realize multiple code modulation mode.Its receive from the data of external bus and send it to radio-frequency transmissions buffer memory 110. and it can also by direct memory access device 108 realize with restructural decode/demodulates device 109 between leading directly to.
Direct memory access device 108 is used for realizing leading directly between restructural decode/demodulates device 109 and the restructural coded/modulated device 107.Direct memory access device 108 is arbitrators of internal bus, according to the priority of using, and the priority level of can distribution bus using.
Restructural decode/demodulates device 109 provides realizes decoding and the needed various basic logic units of demodulation (such as register, adder, memory cell or the like), by controller these basic logic units are configured, can realize the algorithm of multiple decoding demodulation.It receives from radio frequency and receives the data of buffer memory 111 and send it to external bus.And it can also be by leading directly between 108 realizations of direct memory access device and the restructural coded/modulated device 107.
Radio-frequency transmissions buffer memory 110 connects D and D/A converter 101 and restructural coded/modulated device 107.Its effect be realize between D and D/A converter 101 and the restructural coded/modulated device 107 synchronously.
Radio frequency receives buffer memory 111 and connects D and D/A converter 101 and restructural decode/demodulates device 109.Its effect be realize between D and D/A converter 101 and the restructural decode/demodulates device 109 synchronously.
Wireless environment variable configurator 112 major functions are QOS requirement, environmental aspect and resource information to be passed to destination node be configured, and require to be suitable modulation scheme Resources allocation according to the algorithm of environment sensing coprocessor 560.It receives from the information of agreement and perception processing unit 500 and handles accordingly.
Antenna switching unit 114 is used for selecting antenna to be in transmission or receiving mode.Its receives from the signal of variable power amplifier 104 and sends to broad-band antenna 113 when sending; Signal comes to enter variable low noise amplifier 105 from broad-band antenna 113 when receiving.
The structure that broad-band antenna 113 adopts is dielectric substrate-tectum structure, takes plane to obtain small size.Realized the comprehensive and optimization of antenna performance by the combination of GA and MoM method.It is the wave point of restructural physical layer element 100 and space outerpace.
As shown in Figure 1, Clock Managing Unit 200 comprises clock generator 220, the phase-locked loop 210 among Fig. 4.
Clock generator 220 can be realized the use of a plurality of clocks, and by using gated clock, each unit can turn-off in real time; The low-speed clock that can turn-off the power supply of phase-locked loop 210 separately and the whole clock of chip is switched to external oscillator unit 800 under the low situation of operating frequency further reduces power.
The function of phase-locked loop 210 is to realize Phase Tracking and locking.It receives from the frequency of oscillation of oscillator 800 and sends data to clock generator 220.
Electric power management circuit 700 adopts circuit structure simple, and the embedded LDO circuit of high-performance low-power-consumption is made the power subsystem of SOC chip.On traditional LDO Fundamental Theory of Circuit, we have increased feedback control loop, have realized the LDO double loop structure.Electric power management circuit 700 is responsible for the power management of entire chip, uses gated clock in design, and each unit can turn-off in real time, can support single-unit, two joints, three joint AAA batteries and single-unit lithium/nickel-cadmium cell power supply.
Timing control unit 300 comprises among Fig. 5: watchdog circuit 301, timer 302, interrupt control unit 303.
The function of watchdog circuit 301 is to prevent that microcontroller 600 from causing the phenomenon that crashes because of being subjected to external interference, improves system's anti-interference.
The stability of the frequency of oscillation of timer 302 has significant effects to the performance of chip, adopts external crystal-controlled oscillation to cooperate the chip internal circuit as clock generation circuit, and its frequency of oscillation depends primarily on quartz crystal.The equivalent Q value of this clock generation circuit is very high, and stray parameter is very little to the influence of frequency of oscillation, so the stability of this clock frequency can be very high.In order to remove the burr of clock, increased Schmidt trigger at the output of oscillator clock signal has been carried out shaping.
The function of interrupt control unit 303 is to be worked simultaneously in microcontroller 600 and other unit.The respective process of interrupting has three phases: promptly interrupt corresponding, Interrupt Process and interruption and return.
As shown in Figure 5, memory cell 400 comprises the tight random asccess memory 401 of Fig. 6, read-only memory 402, random asccess memory 403.
Closely the function of random asccess memory 401 is that wherein a cover bus is taken by DMA, and CPU can use an other cover bus to carry out data or process of commands, and the result that will handle leaves among the tight RAM.When last cover bus is taken by CPU again, reading of data is carried out subsequent treatment from tight RAM.Purpose is to improve the service efficiency of CPU.
The function of read-only memory 402 is programs that place system starts.
The function of random asccess memory 403 is the spaces as executive program, can be used as internal memory and use.
The major function of agreement and perception processing unit 500 is to be mainly used to treatment media MAC layer, media-independent handover layer protocol, environmental variance and fail safe etc., and it comprises among Fig. 7:
Superencipherment algorithm coprocessor 510, medium access control coprocessor 520, medium independent bridge point 540, media-independent handover coprocessor 550, environment sensing coprocessor 560.
The algorithm logic of superencipherment algorithm coprocessor 510 is as follows: the S box of 16 8 bits is finished byte and is replaced, and carries out the capable shift transformation of 128 bits then, and again through the row mixing transformation of 4 32 bits, the last key that comes out with expansion carries out XOR.Its function is the fail safe that improves chip, effectively prevents timing attack, energy attack, particularly superencipherment algorithm differential power consumption attack.
The major function of medium access control coprocessor 520 is to comprise: conflict management; Automatic-answering back device ACK produces; System's multicycle timer; Programmable encryption and decryption is handled and frame check.It comprises among Fig. 8: physical layer interface 521, emission first-in first-out buffer memory 528, reception first-in first-out buffer memory 522, power managed device 531, conflict manager 529, ciphering signature device 527, decrypted authentication device 523, transmit buffer 526, reception buffer 524, tandom number generator 532, multicycle timer 533, Microprocessor Interface 525.Its workflow is DRP data reception process: the data of reception are entered by physical layer interface 521 and receive first-in first-out buffer memory 522, enter reception buffer 524 through decrypted authentication device 523 then, enter Microprocessor Interface 525 at last; Data transmission procedure: the data of transmission enter transmit buffer 526 by Microprocessor Interface 525, through entering emission first-in first-out buffer memory 528 after the ciphering signature device 527, enter physical layer interface 521 at last.
Physical layer interface 521 is used for doing the interface of physical layer and media access control layer.It is the interface of conflict manager 529, emission first-in first-out buffer memory 528, reception first-in first-out buffer memory 522 and internal bus.
Emission first-in first-out buffer memory 528 is used for realizing the synchronous of physical layer and media access control layer.Its receives the data from ciphering signature device 527, data is sent to physical layer interface 521 under the control of conflict manager 529.
Receive first-in first-out buffer memory 522 and be used for realizing the synchronous of physical layer and media access control layer.Its receives the data from physical layer interface 521, data is sent to decrypted authentication device 523 under the control of conflict manager 529.
Power managed device 531 can carry out Clock gating according to using appointment or system's needs, closes idle unit, thereby saves energy consumption, the particularly conversion from the sleep pattern to the mode of operation.
Conflict manager 529 is finished the optional collision detection algorithm of parameter, realizes channel access, and conflict is avoided.It receives from the data of microprocessor 525 and control hazard manager 529, ciphering signature device 527, decrypted authentication device 523, transmit buffer 526, reception buffer 524, emission first-in first-out buffer memory 528, receives first-in first-out buffer memory 522.
Ciphering signature device 527 is based on the block encryption operation of superencipherment algorithm, finishes by special superencipherment algorithm coprocessor is auxiliary.It receives from the data of transmit buffer 526 and sends it to emission first-in first-out buffer memory 528.
Decrypted authentication device 523 is based on the packet deciphering operation of superencipherment algorithm, finishes by special superencipherment algorithm coprocessor is auxiliary.It receives from the data that receive first-in first-out buffer memory 522 and sends it to reception buffer 524.
The function of transmit buffer 526 is to realize synchronous between microcontroller 600 and the ciphering signature device 527.It receives from the data of Microprocessor Interface 525 and sends it to ciphering signature device 527.
The function of reception buffer 524 is to realize synchronous between microcontroller 600 and the decrypted authentication device 523.It receives from the data of decrypted authentication device 523 and sends it to Microprocessor Interface 525.
The function of tandom number generator 532 is to be used for producing the encryption that random number is carried out the media access control layer data.
Multicycle timer 533 can produce the required multiple frequency-dividing clock of system's different operating state.
The function of Microprocessor Interface 525 is to realize being connected of media access control layer and microcontroller 600.
Medium independent bridge point 540 among Fig. 6 can play the effect of route in self-organizing network.At this moment MIH will not work.
Media-independent handover coprocessor 550 is terminals for management level that satisfy the access of independently finishing network under different network environments and handoff functionality and re-establish, be positioned on the MAC, under the IP layer, the part of link layer, also can be referred to as LL2.5, its function comprises:
PDU management, connection management, exchanging policy management, exchange of management, media-independent handover, environment sensing, letter exchange, information service.
The PDU management is to receive protocol data to be given to this layer medium access control coprocessor 520 from the upper strata, breaks into the packet MPDU of media access control layer according to the needs of agreement.
Connection management is that selection is towards connection or towards disconnected mode.
The exchanging policy management is the exchanging policy that selection is adopted.
The exchange of management decision systems is to adopt soft handover or direct-cut operation.
Media-independent handover is to carry out carrying the resource reservation application when operation associated in the association request at terminal and target BS/AP.
Environment sensing is according to the requirement of the cognitive coprocessor of environment the MIH layer to be disposed accordingly.
Information exchange is dynamically change link attribute, linking status and link quality.
Information service is to provide necessary information for message exchange.
Environment sensing coprocessor 560 is carried out corresponding adaptive algorithm by a kind of cost function.Node in transmission always will minimize cost function and minimize BER by adaptive modulation scheme.Consider that at first the throughput of network has precedence over the situation of BER and energy.Find the incomer as the mobile network, server wishes to obtain more video data.Such application has some predefined BER of minimizing.Therefore, environment sensing coprocessor 560 is selected the system configuration of maximum data transfer speed for target BER and given signal to noise ratio.For this application, maximum data transfer speed can minimize cost function; For the sensor network of considering energy, minimize the transmission of power of every bit.Such network is only exported and is satisfied the energy that minimum QOS requires.Environment sensing coprocessor 560 further reduces the energy cost by selecting modulation scheme.
Owing to adopt common bigger data traffic and the operand of unified bus framework can cause the response time long, can't adapt to high speed data transfer, so adopt dual-bus structure among the present invention.
The medium access control coprocessor 520 that operand is big, medium independent bridge point 540 and media-independent handover coprocessor 550 are mounted on independently internal bus, and the transfer of data that directly will accept and send by the DMA unit is to correspondence position, and external bus is responsible for controlling analogue unit and various peripheral cell.
Show that as Fig. 9 the example that this processor of the present invention is used is: in WLAN (wireless local area network), formed portable terminal by the present invention and host computer CPU, keyboard, display; In metropolitan area network, formed portable terminal by the present invention, host computer CPU, display and keyboard.The keyboard of two portable terminals all is keyboards of the T168 of Sony-Ericson of employing, and display all is displays of the 3510i of Nokia of employing.Host computer CPU is 32 ARM nuclears, and its function all is to be used for the above upper-layer protocol of treatment media independent handover layer.In the heterogeneous network of WLAN (wireless local area network) and wireless MAN composition, two portable terminals can carry out real-time, the second best in quality communication, and low in energy consumption.Optimize embodiment though this explanation is of choosing, the professional and technical personnel should understand, and the present invention is not limited to above-mentioned example, but the situation of communicating by letter between the suitable multiple heterogeneous network.