CN101620576A - Expansion method and device for compact flash card - Google Patents
Expansion method and device for compact flash card Download PDFInfo
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- CN101620576A CN101620576A CN200810130701A CN200810130701A CN101620576A CN 101620576 A CN101620576 A CN 101620576A CN 200810130701 A CN200810130701 A CN 200810130701A CN 200810130701 A CN200810130701 A CN 200810130701A CN 101620576 A CN101620576 A CN 101620576A
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Abstract
The invention discloses an expansion method and device for a compact flash card; wherein the method includes that: an FPGA PCI (periphery communication interface) soft core logical unit connected with the compact flash card is configured; the logical unit of an FPGA compact flash card is configured, the FPGA is simulated to be a PCI device, so that a CPU connected with the FPGA can communicate with the compact flash card by the FPGA; and an upper driver of the simulated PCI device is configured on the CPU and the driver of the compact flash card is configured based on the upper driver. By applying the invention, the characteristic of PCI core can be fully utilized to realize flexible and high-efficiency CF card expansion with low cost.
Description
Technical field
The present invention relates to the embedded system application, and especially, relate to a kind of extended method and device of compact flash card.
Background technology
Compact flash card (Compact Flash Card, CF card) is a kind of general large-capacity storage media, and at present, CF is stuck in a lot of embedded design and uses to some extent, and is especially higher and can not adopt the occasion of hard disk or micro harddisk in stability requirement.
In the process of using, need inevitably CF is sticked into the row expansion.Usually the extended method to the CF card that adopts has a lot.For example, the pcmcia interface expansion by CPU, and the local bus expansion by CPU etc.
In the technology that proposes at present, provide a kind of extended method, in the method, the local bus of CPU carries out Signal Processing and is connected among the CPLD by CPLD and CF card connection, guarantees that the CF card works in True IDE mode of operation.In addition, also have a kind of extended mode be by CPU with pci bus expand the CF card, but generally all need to adopt the pci interface chip that is similar to PCI9054 etc. earlier pci bus to be converted into local bus.
And in present technology, the local bus of a lot of subcards does not extract by the subcard socket, and the quantity that perhaps extracts is not enough, and perhaps big little endian mode is inconsistent etc., is difficult to accomplish compatibility, and versatility can be restricted; And, when carrying out the bridge joint of chip, will increase the cost of expansion, in configuration, also lack dirigibility.The problem that occurs during at these CF card expansions does not propose effective solution at present as yet.
Summary of the invention
Consider the problems referred to above and make the present invention, for this reason, fundamental purpose of the present invention is to provide a kind of expansion scheme of compact flash card, to solve compatibility and very flexible and the high problem of expansion cost that the expansion of CF card exists in the correlation technique.
According to embodiments of the invention, provide a kind of extended method of compact flash card.
This method comprises: the soft nuclear logical block of PCI of the field programmable gate array that configuration is connected with compact flash card is the soft nuclear logical block of peripheral communications interface; The compact flash card logical block of configuration field programmable gate array is modeled as PCI equipment with field programmable gate array, makes the CPU that is connected with field programmable gate array to communicate by field programmable gate array and compact flash card; The upper strata of the PCI equipment of configuration simulation drives on CPU, and based on the driving of upper strata drive arrangements compact flash card.
Wherein, the processing of the soft nuclear logical block of PCI allocation comprise following one of at least: the parameter configuration partial logic code of the soft nuclear of PCI allocation, the calling logic code of the soft nuclear of PCI allocation, PCI allocation scratchpad register are realized the data bit width of logical code, the soft nuclear of PCI allocation, the data bit width of configuration compact flash card, the bit wide of configuration compact flash card, the subordinate pattern of the soft nuclear of PCI allocation.
And when the driving of configuration upper strata, this method further comprises: according to the scratchpad register of the soft nuclear of PCI scratchpad register realization logical code read-write PCI that disposes, whether driving of checking upper strata and compact flash card be correct.
Wherein, the subordinate pattern be following one of at least: main with pattern, used pattern, lead the master who combines with standby mode with pattern and used mixed mode.
In addition, the processing of configuration compact flash card logical block comprise following one of at least: the address date line processing logic code of the communication logical code of the soft nuclear of PCI allocation, configuration compact flash card, the control signal of configuration compact flash card produce logical code.
In addition, after the driving of having disposed compact flash card, this method can further comprise:
On CPU, compact flash card is articulated to file system and reservation service.
A kind of expanding unit of compact flash card is provided according to another embodiment of the present invention.
This device comprises: the soft nuclear logical block of PCI configuration module, and the soft nuclear logical block of PCI that is used to dispose the field programmable gate array that is connected with compact flash card is the soft nuclear logical block of peripheral communications interface; Compact flash card logical block configuration module, be used to dispose the compact flash card logical block of field programmable gate array, field programmable gate array is modeled as PCI equipment, makes the CPU that is connected with field programmable gate array to communicate by field programmable gate array and compact flash card; The drive arrangements module, the upper strata that is used on CPU the PCI equipment of configuration simulation drives, and based on the driving of upper strata drive arrangements compact flash card.
Wherein, the processing of the soft nuclear logical block of the soft nuclear logical block of PCI configuration module PCI allocation comprise following one of at least: the parameter configuration partial logic code of the soft nuclear of PCI allocation, the calling logic code of the soft nuclear of PCI allocation, PCI allocation scratchpad register are realized the data bit width of logical code, the soft nuclear of PCI allocation, the data bit width of configuration compact flash card, the bit wide of configuration compact flash card, the subordinate pattern of the soft nuclear of PCI allocation.
And the drive arrangements module also is used for realizing according to the PCI scratchpad register of configuration the scratchpad register of the soft nuclear of logical code read-write PCI when the driving of configuration upper strata, and whether driving of checking upper strata and compact flash card be correct.
In addition, the processing of compact flash card logical block configuration module configuration compact flash card logical block comprise following one of at least: the address date line processing logic code of the communication logical code of the soft nuclear of PCI allocation, configuration compact flash card, the control signal of configuration compact flash card produce logical code.
By technique scheme of the present invention, can make full use of the characteristic of PCI core, realize flexibly, efficiently reaching CF card expansion cheaply.
Description of drawings
Accompanying drawing described herein is used to provide further understanding of the present invention, constitutes the application's a part, and illustrative examples of the present invention and explanation thereof are used to explain the present invention, do not constitute improper qualification of the present invention.In the accompanying drawings:
Fig. 1 is the connection diagram of CPU, FPGA and CF card when the extended method of realizing according to the CF card of the inventive method embodiment;
Fig. 2 is the process flow diagram according to the extended method of the CF card of the inventive method embodiment;
Fig. 3 is the process flow diagram according to the processing example of the extended method of the CF card of the inventive method embodiment;
Fig. 4 is the processing flow chart that CF is sticked into row control according to CPU in the extended method of the CF card of the inventive method embodiment;
Fig. 5 is the block diagram according to the expanding unit of the CF card of apparatus of the present invention embodiment.
Embodiment
Method embodiment
The extended method of a kind of compact flash card (CF card) is provided in the present embodiment.
This method is mainly concerned with CPU, includes FPGA and the CF card of PCI core, and wherein, CPU communicates by each hardware cell on pci bus and the veneer.Concrete annexation as shown in Figure 1.In Fig. 1, CPU is connected to FPGA by pci bus, other logical block that the PCI core logical block of nFPGA is connected to CF card expansion logic and is used to realize other expanded function of veneer, FPGA is connected to the CF card by CF card address wire, CF card control line, CF data line card, and FPGA also is connected to miscellaneous equipment.
As shown in Figure 2, the extended method according to the CF card of present embodiment comprises: step S202, the soft nuclear of PCI (PCI core) logical block of the FPGA of configuration (exploitation) and CF card connection; Step S204, the CF card logic unit of configuration (exploitation) FPGA is modeled as PCI equipment with FPGA, makes the CPU that is connected with FPGA to stick into row communication by FPGA and CF; Step S106, the upper strata driving of the PCI equipment of configuration (exploitation) simulation on CPU, and based on the driving of upper strata drive arrangements CF card.
Wherein, the processing of PCI allocation core logical block comprise following one of at least: the parameter configuration partial logic code of PCI allocation core, the calling logic code of PCI allocation core, PCI allocation scratchpad register are realized the data bit width of logical code, PCI allocation core, the data bit width of configuration CF card, the bit wide of configuration CF card, subordinate (slave) pattern of PCI allocation core.
Whether and when the driving of configuration upper strata, this method further comprises: according to the scratchpad register of the PCI scratchpad register realization logical code read-write PCI core that disposes, correct with driving of checking upper strata and CF card.
Wherein, the subordinate pattern be following one of at least: main with pattern, used pattern, lead the master who combines with standby mode with pattern and used mixed mode.
In addition, the processing of configuration CF card logic unit comprise following one of at least: the address date line processing logic code of the communication logical code of PCI allocation core, configuration CF card, the control signal of configuration CF card produce logical code.
In addition, after the driving of having disposed the CF card, this method can further comprise:
On CPU, the CF card is articulated to file system and reservation service.
Below in conjunction with instantiation present embodiment is described.
On hardware circuit, the embedded type CPU that uses is PowerPC, particularly, in this example, that select CPU for use is MPC8541, and the CPU minimum system is made the form of PrPMC subcard, subcard is plugged on the ANCP (senior network element control disposable plates), the FPGA that includes PCI core is arranged, wherein on the motherboard, that in this example, FPGA selects for use is LFXP15.With FPGA is that core can have been expanded a lot of devices, will describe the specific implementation process of expansion high capacity (4G byte) the CF card of the present invention's proposition below.
When expanding, system design can be divided into logic development and two links of Driver Development.Fig. 3 shows the detailed process flow process when expanding, and as shown in Figure 3, logic development comprises following processing procedure:
302, the generation of PCI core and customized logic unit are the FPGA of Lattice owing to what adopt in this example, so practical tool is the IPexpress among the ispLEVER;
304, PCI core parameter setting and module are quoted logical block, in this step, need to set the value of each parameter in the pci configuration space according to the demand of oneself, for example, in 6 workspaces, use which workspace, each workspace to work in the size etc. that the IO mode still is Memory mode and each space, workspace;
306, dispose 32 bit wide data (PCI side) and 8 bit wide data (CF card side) conversion logical unit mutually, according to { Lt_r_nw1 (PCI core read-write), Bar_hit (PCIcore space region sub-signal), Lt_command_out (PCI core command analysis signal) } distinguish data direction, distinguish bit data source (in corresponding 48 which 8) according to Lt_cben_out (PCI core data bit width mask);
308, configuration CF card address produces logical block.Mainly come the identification address bitmask, and will handle the control of CF_reg_n (the differentiation signal of CF card attribute area and file area) well according to Lt_cben_out;
310, configuration CF card read-write steering logic unit.What notice that we use is the Memory working method (the CF card has Memory and two kinds of working methods of True IDE) of CF card, so will carry out masking operation corresponding to the pin of True IDE working method;
312, configuration CF card selects the signal controlling logical block;
314, configuration CF card reset control logic unit, wherein, this type of signal produces in the time of can being customized by IP kernel automatically;
As shown in Figure 3, Driver Development is divided into:
316, PCI allocation device drives configuration software unit comprises PCI spatial model configuration (the Memory mode still is the IO mode), PCI space base location configuration etc.;
318, PCI allocation bottom access control function is realized the unit, comprises 8,16,32 bit wide data write functions;
320, configuration CF card drives the bottom function and realizes the unit, call PCI bottom access function.Comprise that CF card register read function, register write that function, sector (sector) are read function, function is write in the sector;
322, configuration CF card upper strata driver element for example, comprises that the control of sector read-write flow process, file system articulate, FTP articulates etc.
Fig. 4 is the processing flow chart that CF is sticked into row control according to CPU in the method for present embodiment.
As shown in Figure 4, comprise following processing procedure:
402, the CPU upper layer software (applications) sends read-write requests;
404, the CF card drives and PCI drives access hardware;
406, logic chip carries out sequential and switches;
408, the corresponding read-write requests of CF card.
By above-mentioned processing, can be under the situation of DMA that does not utilize CPU and interrupt resources, guarantee CF be stuck in upload file in download in the FTP environment speed more than 2M byte/s, if make PCI be operated in the burst mode of operation and utilize the DMA resource of CPU, read or write speed will be more considerable so, under same condition, compare to the local bus mode, the speed of read-write card is at least original more than 2 times.
In addition, utilize the characteristics of PCI characteristics of high efficiency and logical design dirigibility, established technical foundation for expanding a lot of equipment such as SD card later on.
Device embodiment
A kind of expanding unit of CF card is provided in the present embodiment.
As shown in Figure 5, comprise according to the expanding unit of the CF card of present embodiment: PCI core logical block configuration module 502, the PCI core logical block that is used to dispose with the FPGA of CF card connection is the soft nuclear logical block of peripheral communications interface; CF card logic configuration of cells module 504 is used to dispose the CF card logic unit of FPGA, and FPGA is modeled as PCI equipment, makes the CPU that is connected with FPGA to stick into row communication by FPGA and CF; Drive arrangements module 506, the upper strata that is used on CPU the PCI equipment of configuration simulation drives, and based on the driving of upper strata drive arrangements CF card.
Wherein, the processing of PCI core logical block configuration module 502 PCI allocation core logical blocks comprise following one of at least: the parameter configuration partial logic code of PCI allocation core, the calling logic code of PCI allocation core, PCI allocation scratchpad register are realized the data bit width of logical code, PCI allocation core, the data bit width of configuration CF card, the bit wide of configuration CF card, the subordinate pattern of PCI allocation core.
And drive arrangements module 506 also is used for realizing according to the PCI scratchpad register of configuration the scratchpad register of logical code read-write PCI core when the driving of configuration upper strata, and whether driving of checking upper strata and CF card be correct.
In addition, the processing of CF card logic configuration of cells module 504 configuration CF card logic unit comprise following one of at least: the address date line processing logic code of the communication logical code of PCI allocation core, configuration CF card, the control signal of configuration CF card produce logical code.
In sum, the present invention utilizes the PCI core of programmable logic device (PLD) to realize that CPU is connected with the expansion of CF card, compares to the local bus mode of utilizing, and uses the advantage of PCI mode to be:
(1) the present invention can adopt the form of subcard at great majority than complicated embedded system, for example adopts under the situation of PrPMC (processor P CI carries on the back card), has guaranteed the compatibility of expansion; (2) because pci bus all is consistent for any CPU, and local bus is often variant, and at this problem, the present invention can guarantee good versatility; (3) and, because pci bus efficient will be higher than local bus, therefore, the present invention can reach higher treatment effeciency.
Compare to the scheme of using bridging chip, the bright advantage of we is: (1) FPGA on system board (can have FPGA in the general system design, the expansion of CF card connects only uses wherein a part of logical resource) in contain under the situation of soft nuclear (now a lot of programming devices are all supported PCI core) of PCI core, can carry out this function under the situation that does not increase other devices realizes, save cost, especially compare to the scheme of much utilizing pci bus interface chips such as PCI9054, advantage is more obvious; (2) expand the CF card by the mode of the soft nuclear of this logic, can give full play to the dirigibility of logic, concrete manifestation is as follows: (21) CF jig has various working methods such as True IDE, IO, Memory, by the logic adjustment, and can compatible various mode of operations.And use asic chip to be difficult to accomplish this compatibility, (22) can be adjusted control timing flexibly in logic inside, thereby reach best transfer rate and efficient; (3) use much other inside and outside equipment of this PCI core unit further expansion, for example, when PCI core is expanding the CF card, also expanded unit such as ASRAM in the project.
By means of technical scheme of the present invention, can make full use of the characteristic of PCI core, realize flexibly, efficiently reaching CF card expansion cheaply.
The above is the preferred embodiments of the present invention only, is not limited to the present invention, and for a person skilled in the art, the present invention can have various changes and variation.Within the spirit and principles in the present invention all, any modification of being done, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (10)
1. the extended method of a compact flash card is characterized in that, comprising:
The soft nuclear logical block of PCI of the field programmable gate array that configuration is connected with described compact flash card is the soft nuclear logical block of peripheral communications interface;
Dispose the compact flash card logical block of described field programmable gate array, described field programmable gate array is modeled as PCI equipment, makes the CPU that is connected with described field programmable gate array to communicate by described field programmable gate array and described compact flash card;
The upper strata of the described PCI equipment of configuration simulation drives on described CPU, and based on the driving of the described compact flash card of described upper strata drive arrangements.
2. method according to claim 1 is characterized in that, the processing of disposing the soft nuclear logical block of described PCI comprise following one of at least:
Parameter configuration partial logic code, the calling logic code of the soft nuclear of the described PCI of configuration, the PCI allocation scratchpad register that disposes the soft nuclear of described PCI realized the data bit width of the data bit width of logical code, the soft nuclear of the described PCI of configuration, the described compact flash card of configuration, the bit wide of the described compact flash card of configuration, the subordinate pattern of the soft nuclear of the described PCI of configuration.
3. method according to claim 2 is characterized in that, when driving on the described upper strata of configuration, further comprises:
Realize that according to the described PCI scratchpad register of configuration logical code reads and writes the scratchpad register of the soft nuclear of described PCI, verify that described upper strata drives and whether described compact flash card is correct.
4. method according to claim 2 is characterized in that, described subordinate pattern be following one of at least: main with pattern, used pattern, describedly lead the master who combines with described standby mode with pattern and used mixed mode.
5. method according to claim 1 is characterized in that, the processing of disposing described compact flash card logical block comprise following one of at least:
Dispose the communication logical code of the soft nuclear of described PCI, the address date line processing logic code of the described compact flash card of configuration, the control signal generation logical code of the described compact flash card of configuration.
6. method according to claim 1 is characterized in that, after the driving of having disposed described compact flash card, further comprises:
On described CPU, described compact flash card is articulated to file system and reservation service.
7. the expanding unit of a compact flash card is characterized in that, comprising:
The soft nuclear logical block of PCI configuration module, the soft nuclear logical block of PCI that is used to dispose the field programmable gate array that is connected with described compact flash card is the soft nuclear logical block of peripheral communications interface;
Compact flash card logical block configuration module, be used to dispose the compact flash card logical block of described field programmable gate array, described field programmable gate array is modeled as PCI equipment, makes the CPU that is connected with described field programmable gate array to communicate by described field programmable gate array and described compact flash card;
The drive arrangements module, the upper strata that is used on described CPU the described PCI equipment of configuration simulation drives, and based on the driving of the described compact flash card of described upper strata drive arrangements.
8. device according to claim 7 is characterized in that, the processing that the soft nuclear logical block of described PCI configuration module disposes the soft nuclear logical block of described PCI comprise following one of at least:
Parameter configuration partial logic code, the calling logic code of the soft nuclear of the described PCI of configuration, the PCI allocation scratchpad register that disposes the soft nuclear of described PCI realized the data bit width of the data bit width of logical code, the soft nuclear of the described PCI of configuration, the described compact flash card of configuration, the bit wide of the described compact flash card of configuration, the subordinate pattern of the soft nuclear of the described PCI of configuration.
9. device according to claim 8, it is characterized in that, described drive arrangements module also is used for reading and writing according to the described PCI scratchpad register realization logical code of configuration the scratchpad register of the soft nuclear of described PCI when the driving of the described upper strata of configuration, verify that described upper strata drives and whether described compact flash card is correct.
10. device according to claim 7 is characterized in that, the processing that described compact flash card logical block configuration module disposes described compact flash card logical block comprise following one of at least:
Dispose the communication logical code of the soft nuclear of described PCI, the address date line processing logic code of the described compact flash card of configuration, the control signal generation logical code of the described compact flash card of configuration.
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| CN200810130701A CN101620576A (en) | 2008-06-30 | 2008-06-30 | Expansion method and device for compact flash card |
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| CN200810130701A CN101620576A (en) | 2008-06-30 | 2008-06-30 | Expansion method and device for compact flash card |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN110109857A (en) * | 2019-04-29 | 2019-08-09 | 杭州迪普科技股份有限公司 | A kind of data transmission method and device |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN110109857A (en) * | 2019-04-29 | 2019-08-09 | 杭州迪普科技股份有限公司 | A kind of data transmission method and device |
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Open date: 20100106 |