CN101617298B - 用于dma、任务终止和同步操作的缓存一致保持 - Google Patents

用于dma、任务终止和同步操作的缓存一致保持 Download PDF

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Publication number
CN101617298B
CN101617298B CN2005800188791A CN200580018879A CN101617298B CN 101617298 B CN101617298 B CN 101617298B CN 2005800188791 A CN2005800188791 A CN 2005800188791A CN 200580018879 A CN200580018879 A CN 200580018879A CN 101617298 B CN101617298 B CN 101617298B
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China
Prior art keywords
memory
cache
address
main memory
coherent
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Expired - Fee Related
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CN2005800188791A
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Chinese (zh)
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CN101617298A (zh
Inventor
伊塔伊·佩莱德
摩西·安舍尔
雅各布·埃弗拉特
阿隆·埃尔达尔
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NXP USA Inc
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Freescale Semiconductor Inc
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0804—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with main memory updating
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0842—Multiuser, multiprocessor or multiprocessing cache systems for multiprocessing or multitasking
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0891—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using clearing, invalidating or resetting means

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Time-Division Multiplex Systems (AREA)
CN2005800188791A 2004-06-08 2005-05-31 用于dma、任务终止和同步操作的缓存一致保持 Expired - Fee Related CN101617298B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP04013507A EP1605360B1 (en) 2004-06-08 2004-06-08 Cache coherency maintenance for DMA, task termination and synchronisation operations
EP04013507.1 2004-06-08
PCT/IB2005/051774 WO2005121966A2 (en) 2004-06-08 2005-05-31 Cache coherency maintenance for dma, task termination and synchronisation operations

Publications (2)

Publication Number Publication Date
CN101617298A CN101617298A (zh) 2009-12-30
CN101617298B true CN101617298B (zh) 2012-03-21

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CN2005800188791A Expired - Fee Related CN101617298B (zh) 2004-06-08 2005-05-31 用于dma、任务终止和同步操作的缓存一致保持

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Country Link
US (1) US20080301371A1 (enExample)
EP (1) EP1605360B1 (enExample)
JP (1) JP2008502069A (enExample)
CN (1) CN101617298B (enExample)
AT (1) ATE458222T1 (enExample)
DE (1) DE602004025556D1 (enExample)
WO (1) WO2005121966A2 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI556110B (zh) * 2013-03-15 2016-11-01 英特爾股份有限公司 用於提供存取裝置函數的設備、系統及方法

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US8612757B2 (en) * 2003-12-30 2013-12-17 Entrust, Inc. Method and apparatus for securely providing identification information using translucent identification member
US8966579B2 (en) 2003-12-30 2015-02-24 Entrust, Inc. Method and apparatus for providing authentication between a sending unit and a recipient based on challenge usage data
US8060915B2 (en) 2003-12-30 2011-11-15 Entrust, Inc. Method and apparatus for providing electronic message authentication
US9281945B2 (en) * 2003-12-30 2016-03-08 Entrust, Inc. Offline methods for authentication in a client/server authentication system
US9191215B2 (en) 2003-12-30 2015-11-17 Entrust, Inc. Method and apparatus for providing authentication using policy-controlled authentication articles and techniques
US8230486B2 (en) * 2003-12-30 2012-07-24 Entrust, Inc. Method and apparatus for providing mutual authentication between a sending unit and a recipient
US20090210629A1 (en) * 2008-02-15 2009-08-20 International Business Machines Corporation Method, system and computer program product for selectively purging cache entries
JP5728982B2 (ja) * 2010-02-26 2015-06-03 株式会社Ｊｖｃケンウッド 処理装置および書込方法
CN102035733B (zh) * 2010-11-29 2013-04-10 武汉微创光电股份有限公司 通过以太网建立串行数据透明传输通道的方法
JP2016508650A (ja) * 2013-03-28 2016-03-22 ヒューレット−パッカード デベロップメント カンパニー エル．ピー．Ｈｅｗｌｅｔｔ‐Ｐａｃｋａｒｄ Ｄｅｖｅｌｏｐｍｅｎｔ Ｃｏｍｐａｎｙ， Ｌ．Ｐ． リフレクティブメモリとのコヒーレンシの実施
WO2015195076A1 (en) * 2014-06-16 2015-12-23 Hewlett-Packard Development Company, L.P. Cache coherency for direct memory access operations
CN106302374B (zh) * 2015-06-26 2019-08-16 深圳市中兴微电子技术有限公司 一种用于提高表项访问带宽和原子性操作的装置及方法
US20180054480A1 (en) * 2016-08-17 2018-02-22 Microsoft Technology Licensing, Llc Interrupt synchronization of content between client device and cloud-based storage service
US10157139B2 (en) * 2016-09-19 2018-12-18 Qualcomm Incorporated Asynchronous cache operations
CN109101439B (zh) * 2017-06-21 2024-01-09 深圳市中兴微电子技术有限公司 一种报文处理的方法及装置
CN114157621A (zh) * 2020-09-07 2022-03-08 华为技术有限公司 一种发送清除报文的方法及装置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1030243A1 (en) * 1999-02-18 2000-08-23 Texas Instruments France Optimized hardware cleaning function for virtual index virtual tag data cache
EP1182559A1 (en) * 2000-08-21 2002-02-27 Texas Instruments Incorporated Improved microprocessor
EP1182563A1 (en) * 2000-08-21 2002-02-27 Texas Instruments France Cache with DMA and dirty bits

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US4713755A (en) * 1985-06-28 1987-12-15 Hewlett-Packard Company Cache memory consistency control with explicit software instructions
JPH0816885B2 (ja) * 1993-04-27 1996-02-21 工業技術院長 キャッシュメモリ制御方法
JP3320562B2 (ja) * 1994-09-22 2002-09-03 株式会社東芝 キャッシュメモリを有する電子計算機
JP3176255B2 (ja) * 1995-06-09 2001-06-11 日本電気株式会社 キャッシュメモリ装置
US6378047B1 (en) * 1997-07-07 2002-04-23 Micron Technology, Inc. System and method for invalidating set-associative cache memory with simultaneous set validity determination
ATE548695T1 (de) * 2000-08-21 2012-03-15 Texas Instruments France Softwaregesteuerte cache-speicherkonfiguration
JP2004102825A (ja) * 2002-09-11 2004-04-02 Renesas Technology Corp キャッシュメモリ制御装置
US8010682B2 (en) * 2004-12-28 2011-08-30 International Business Machines Corporation Early coherency indication for return data in shared memory architecture

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1030243A1 (en) * 1999-02-18 2000-08-23 Texas Instruments France Optimized hardware cleaning function for virtual index virtual tag data cache
EP1182559A1 (en) * 2000-08-21 2002-02-27 Texas Instruments Incorporated Improved microprocessor
EP1182563A1 (en) * 2000-08-21 2002-02-27 Texas Instruments France Cache with DMA and dirty bits

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI556110B (zh) * 2013-03-15 2016-11-01 英特爾股份有限公司 用於提供存取裝置函數的設備、系統及方法

Also Published As

Publication number Publication date
EP1605360B1 (en) 2010-02-17
EP1605360A1 (en) 2005-12-14
ATE458222T1 (de) 2010-03-15
US20080301371A1 (en) 2008-12-04
CN101617298A (zh) 2009-12-30
WO2005121966A2 (en) 2005-12-22
WO2005121966A3 (en) 2006-06-22
DE602004025556D1 (de) 2010-04-01
JP2008502069A (ja) 2008-01-24

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