CN101611660B - Interlayer insulating film having carrier material, and multilayer printed circuit board using the interlayer insulating film - Google Patents

Interlayer insulating film having carrier material, and multilayer printed circuit board using the interlayer insulating film Download PDF

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Publication number
CN101611660B
CN101611660B CN2008800049171A CN200880004917A CN101611660B CN 101611660 B CN101611660 B CN 101611660B CN 2008800049171 A CN2008800049171 A CN 2008800049171A CN 200880004917 A CN200880004917 A CN 200880004917A CN 101611660 B CN101611660 B CN 101611660B
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CN
China
Prior art keywords
interlayer dielectric
resin
carrier material
circuit board
epoxy resin
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Expired - Fee Related
Application number
CN2008800049171A
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Chinese (zh)
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CN101611660A (en
Inventor
岸豊昭
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Bakelite Co Ltd
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Sumitomo Bakelite Co Ltd
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Publication of CN101611660A publication Critical patent/CN101611660A/en
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Expired - Fee Related legal-status Critical Current
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B15/00—Layered products comprising a layer of metal
    • B32B15/14—Layered products comprising a layer of metal next to a fibrous or filamentary layer
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B15/00—Layered products comprising a layer of metal
    • B32B15/18—Layered products comprising a layer of metal comprising iron or steel
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B15/00—Layered products comprising a layer of metal
    • B32B15/20—Layered products comprising a layer of metal comprising aluminium or copper
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B27/00—Layered products comprising a layer of synthetic resin
    • B32B27/12—Layered products comprising a layer of synthetic resin next to a fibrous or filamentary layer
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B27/00—Layered products comprising a layer of synthetic resin
    • B32B27/28—Layered products comprising a layer of synthetic resin comprising synthetic resins not wholly covered by any one of the sub-groups B32B27/30 - B32B27/42
    • B32B27/281—Layered products comprising a layer of synthetic resin comprising synthetic resins not wholly covered by any one of the sub-groups B32B27/30 - B32B27/42 comprising polyimides
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B27/00—Layered products comprising a layer of synthetic resin
    • B32B27/30—Layered products comprising a layer of synthetic resin comprising vinyl (co)polymers; comprising acrylic (co)polymers
    • B32B27/304—Layered products comprising a layer of synthetic resin comprising vinyl (co)polymers; comprising acrylic (co)polymers comprising vinyl halide (co)polymers, e.g. PVC, PVDC, PVF, PVDF
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B27/00—Layered products comprising a layer of synthetic resin
    • B32B27/36—Layered products comprising a layer of synthetic resin comprising polyesters
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B5/00—Layered products characterised by the non- homogeneity or physical structure, i.e. comprising a fibrous, filamentary, particulate or foam layer; Layered products characterised by having a layer differing constitutionally or physically in different parts
    • B32B5/02—Layered products characterised by the non- homogeneity or physical structure, i.e. comprising a fibrous, filamentary, particulate or foam layer; Layered products characterised by having a layer differing constitutionally or physically in different parts characterised by structural features of a fibrous or filamentary layer
    • B32B5/022—Non-woven fabric
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B5/00—Layered products characterised by the non- homogeneity or physical structure, i.e. comprising a fibrous, filamentary, particulate or foam layer; Layered products characterised by having a layer differing constitutionally or physically in different parts
    • B32B5/02—Layered products characterised by the non- homogeneity or physical structure, i.e. comprising a fibrous, filamentary, particulate or foam layer; Layered products characterised by having a layer differing constitutionally or physically in different parts characterised by structural features of a fibrous or filamentary layer
    • B32B5/024—Woven fabric
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
    • H05K3/4655—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern by using a laminate characterized by the insulating layer
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2260/00—Layered product comprising an impregnated, embedded, or bonded layer wherein the layer comprises an impregnation, embedding, or binder material
    • B32B2260/02—Composition of the impregnated, bonded or embedded layer
    • B32B2260/021—Fibrous or filamentary layer
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2260/00—Layered product comprising an impregnated, embedded, or bonded layer wherein the layer comprises an impregnation, embedding, or binder material
    • B32B2260/04—Impregnation, embedding, or binder material
    • B32B2260/046—Synthetic resin
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2262/00—Composition or structural features of fibres which form a fibrous or filamentary layer or are present as additives
    • B32B2262/02—Synthetic macromolecular fibres
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2262/00—Composition or structural features of fibres which form a fibrous or filamentary layer or are present as additives
    • B32B2262/02—Synthetic macromolecular fibres
    • B32B2262/0223—Vinyl resin fibres
    • B32B2262/0238—Vinyl halide, e.g. PVC, PVDC, PVF, PVDF
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2262/00—Composition or structural features of fibres which form a fibrous or filamentary layer or are present as additives
    • B32B2262/02—Synthetic macromolecular fibres
    • B32B2262/0261—Polyamide fibres
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2262/00—Composition or structural features of fibres which form a fibrous or filamentary layer or are present as additives
    • B32B2262/02—Synthetic macromolecular fibres
    • B32B2262/0261—Polyamide fibres
    • B32B2262/0269—Aromatic polyamide fibres
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2262/00—Composition or structural features of fibres which form a fibrous or filamentary layer or are present as additives
    • B32B2262/02—Synthetic macromolecular fibres
    • B32B2262/0276—Polyester fibres
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2262/00—Composition or structural features of fibres which form a fibrous or filamentary layer or are present as additives
    • B32B2262/10—Inorganic fibres
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2262/00—Composition or structural features of fibres which form a fibrous or filamentary layer or are present as additives
    • B32B2262/10—Inorganic fibres
    • B32B2262/101—Glass fibres
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2264/00—Composition or properties of particles which form a particulate layer or are present as additives
    • B32B2264/10—Inorganic particles
    • B32B2264/101—Glass
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2264/00—Composition or properties of particles which form a particulate layer or are present as additives
    • B32B2264/10—Inorganic particles
    • B32B2264/102—Oxide or hydroxide
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2264/00—Composition or properties of particles which form a particulate layer or are present as additives
    • B32B2264/10—Inorganic particles
    • B32B2264/104—Oxysalt, e.g. carbonate, sulfate, phosphate or nitrate particles
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2264/00—Composition or properties of particles which form a particulate layer or are present as additives
    • B32B2264/10—Inorganic particles
    • B32B2264/107—Ceramic
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2264/00—Composition or properties of particles which form a particulate layer or are present as additives
    • B32B2264/10—Inorganic particles
    • B32B2264/107—Ceramic
    • B32B2264/108—Carbon, e.g. graphite particles
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2307/00—Properties of the layers or laminate
    • B32B2307/30—Properties of the layers or laminate having particular thermal properties
    • B32B2307/304—Insulating
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2307/00—Properties of the layers or laminate
    • B32B2307/30—Properties of the layers or laminate having particular thermal properties
    • B32B2307/306—Resistant to heat
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2307/00—Properties of the layers or laminate
    • B32B2307/30—Properties of the layers or laminate having particular thermal properties
    • B32B2307/306—Resistant to heat
    • B32B2307/3065—Flame resistant or retardant, fire resistant or retardant
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2307/00—Properties of the layers or laminate
    • B32B2307/50—Properties of the layers or laminate having particular mechanical properties
    • B32B2307/54—Yield strength; Tensile strength
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2457/00—Electrical equipment
    • B32B2457/08—PCBs, i.e. printed circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/06—Lamination
    • H05K2203/066—Transfer laminating of insulating material, e.g. resist as a whole layer, not as a pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y10T428/24917—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/249921—Web or sheet containing structurally defined element or component
    • Y10T428/249924—Noninterengaged fiber-containing paper-free web or sheet which is not of specified porosity
    • Y10T428/24994—Fiber embedded in or on the surface of a polymeric matrix
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/26—Web or sheet containing structurally defined element or component, the element or component having a specified physical dimension
    • Y10T428/263—Coating layer not in excess of 5 mils thick or equivalent
    • Y10T428/264—Up to 3 mils
    • Y10T428/265—1 mil or less
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/28—Web or sheet containing structurally defined element or component and having an adhesive outermost layer
    • Y10T428/2839—Web or sheet containing structurally defined element or component and having an adhesive outermost layer with release or antistick coating
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/28—Web or sheet containing structurally defined element or component and having an adhesive outermost layer
    • Y10T428/2852—Adhesive compositions
    • Y10T428/2857—Adhesive compositions including metal or compound thereof or natural rubber
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/28—Web or sheet containing structurally defined element or component and having an adhesive outermost layer
    • Y10T428/2852—Adhesive compositions
    • Y10T428/287—Adhesive compositions including epoxy group or epoxy polymer
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T442/00—Fabric [woven, knitted, or nonwoven textile or cloth, etc.]
    • Y10T442/20—Coated or impregnated woven, knit, or nonwoven fabric which is not [a] associated with another preformed layer or fiber layer or, [b] with respect to woven and knit, characterized, respectively, by a particular or differential weave or knit, wherein the coating or impregnation is neither a foamed material nor a free metal or alloy layer
    • Y10T442/2926—Coated or impregnated inorganic fiber fabric
    • Y10T442/2992—Coated or impregnated glass fiber fabric
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T442/00—Fabric [woven, knitted, or nonwoven textile or cloth, etc.]
    • Y10T442/30—Woven fabric [i.e., woven strand or strip material]
    • Y10T442/3382—Including a free metal or alloy constituent
    • Y10T442/3415—Preformed metallic film or foil or sheet [film or foil or sheet had structural integrity prior to association with the woven fabric]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T442/00—Fabric [woven, knitted, or nonwoven textile or cloth, etc.]
    • Y10T442/30—Woven fabric [i.e., woven strand or strip material]
    • Y10T442/3854—Woven fabric with a preformed polymeric film or sheet
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T442/00—Fabric [woven, knitted, or nonwoven textile or cloth, etc.]
    • Y10T442/60—Nonwoven fabric [i.e., nonwoven strand or fiber material]
    • Y10T442/608—Including strand or fiber material which is of specific structural definition
    • Y10T442/614—Strand or fiber material specified as having microdimensions [i.e., microfiber]
    • Y10T442/623—Microfiber is glass

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  • Engineering & Computer Science (AREA)
  • Textile Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Laminated Bodies (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Reinforced Plastic Materials (AREA)

Abstract

An objective of this invention is to provide an interlayer dielectric film with a carrier material used in a multilayer printed circuit board, which exhibits sufficient rigidity for a thin multilayer printed circuit board. According to the present invention, there is provided an interlayer dielectric film with a carrier material comprising a carrier material comprised of a metal foil or resin film and an interlayer dielectric film formed on one side of the carrier material, wherein the interlayer dielectric film is comprised of a base material impregnated with a resin; the base material has a thickness of 8 [mu]m to 20 [mu]m; and when the resin is cured at 170 DEG C for one hour under a pressure of 30 kgf/cm<2> , an elongation percentage of the interlayer dielectric film in a planar direction is 0.05 % or less as determined by a TMA method.

Description

Interlayer dielectric and the multilayer board that uses this interlayer dielectric with carrier material
Technical field
The present invention relates to a kind of interlayer dielectric and multilayer board with this film with carrier material.
Background technology
In association area; Multilayer board makes through following operation: with epoxy resin impregnated glass cloth base material; The resin semi-solid preparation is prepared the preimpregnation flitch; One or more preimpregnation flitch are placed on the circuit board with circuit, on this preimpregnation flitch, place Copper Foil again, utilize hot plate press (hot-platepress) under pressure, product to be carried out integrated molding (integrally molding).In the method, repeat the range upon range of step several that contains the prepreg of glass cloth and Copper Foil.Like this, in each step, all may introduce exogenous impurity.
In recent years, in order to address the above problem, use a kind of material (being called resin coated copper foil (RCC)) that does not contain glass cloth to make multilayer board, in this material, insulating resin layer directly is layered on the Copper Foil.Said method can produce slim multilayer printed-wiring board, and therefore the demand to RCC significantly increases (seeing that for example patent document 1).Yet when not containing the material of base material (such as glass cloth) through range upon range of this type of of the pressurization operation of routine, resin may carry out flowing out when range upon range of under heating and pressurizing.Therefore, be difficult to accurately control the thickness of insulating resin layer.In addition, this material maybe be very thin, can not easily handle, and can cause low-yield such as defectives such as material breaks and bendings, and cause cost to improve thus.In addition; When on the printed circuit board (PCB) that makes through range upon range of this type of insulating resin layer, another parts being installed,, be difficult to keep the rigidity of printed circuit board (PCB) owing to lack base material (like glass cloth); Therefore warpage may appear in printed circuit board (PCB), makes the bad connection of appearance between parts and the printed circuit board (PCB).Patent document 1: day disclosure is examination of appeal 2000-244114 not.
Summary of the invention
The invention provides a kind of interlayer dielectric with carrier material, it comprises carrier material that is made up of metal forming or resin molding and the interlayer dielectric that is formed at the carrier material one side, and wherein this interlayer dielectric contains the base material through resin impregnation; The thickness of this base material is 8 μ m-20 μ m; When resin at 170 ℃ and 30kgf/cm 2When pressure down solidified 1 hour, the percentage elongation of the interlayer dielectric in-plane of measuring through the TMA method was 0.05% or still less.
The interlayer dielectric used thickness that the present invention has carrier material is the base material of 8 μ m-20 μ m.Therefore, (RCC) compares with the material that is only formed by resin, and this film has the rigidity of improvement, can improve the reliability that parts are installed.
One preferred embodiment in, when resin at 170 ℃ and 30kgf/cm 2When pressure solidified 1 hour down, interlayer dielectric was 2MPa-20MPa at 200 ℃ storage modulus of elasticity.
In a preferred execution mode, the 30%-80% of the storage modulus of elasticity of interlayer dielectric when 200 ℃ storage modulus of elasticity is this interlayer dielectric room temperature.When being installed to another parts on the slim printed circuit board (PCB) that makes through range upon range of this type of insulating resin layer, above-mentioned structure can reduce the distortion that is caused printed circuit board (PCB) by component weight.And, can reduce in the installation process by 260 ℃-300 ℃ high temperature and the printed circuit board (PCB) distortion that causes.
According to the present invention, the interlayer dielectric with carrier material is provided, it has superior stiffness, is applicable to make slim multilayer board.
Description of drawings
Fig. 1 illustrates the cross section view of the interlayer dielectric with carrier material of one embodiment of the present invention.Fig. 2 illustrates the cross section view of manufacturing approach of the interlayer dielectric with carrier material of one embodiment of the present invention.
Embodiment
To specify interlayer dielectric and multilayer board that the present invention has carrier material below with this film.
Fig. 1 is the cross section view of the interlayer dielectric with carrier material of one embodiment of the present invention.Interlayer dielectric 100 with carrier material has carrier material 110 that is made up of metal forming or resin molding and the interlayer dielectric 123 that is formed at carrier material 110 one sides.Interlayer dielectric 123 contains the base material 130 of useful resin 120 dippings, and the thickness of this base material 130 is 8 μ m-20 μ m.
The instance of the base material that uses among the present invention comprises glass fiber such as glass woven fabric and glass bonded fabric; Inorfil is as containing weaving cotton cloth and bonded fabric of glass inorganic compound in addition; With organic fiber such as aromatic polyamide, polyamide, aromatic polyester, polyester, polyimides and fluororesin.In these base materials, consider rigidity and intensity in the heating process, preferably be the fiberglass substrate of representative with the glass woven fabric.
Instance as the carrier material of metal forming or resin molding comprises that metal forming (like copper and copper alloy, aluminium and aluminium alloy, iron and ferroalloy and stainless steel) and resin molding are (like fluororesin, polyimides and polyester (for example, polybutylene terephthalate and PET) in the present invention.
The instance of the resin that uses among the present invention comprises epoxy resin and phenoxy resin.Use these resins can improve the thermal endurance of the interlayer dielectric of acquisition.
The instance of epoxy resin includes but not limited to the epoxy resin of bisphenol A epoxide resin, bisphenol F epoxy resin, phenol phenolic resin varnish, cresols phenolic resin varnish, bisphenol-A phenolic varnish epoxy resin, naphthalene modification, the epoxy resin of bicyclopentadiene modification, the epoxy resin of aralkyl modified and the epoxy resin of diaminodiphenyl-methane modification.Alternatively, also can the halogenated products of this based epoxy resin be used to improve the anti-flammability of the interlayer dielectric of gained.
These halogenated epoxy resin examples can be that for example weight average molecular weight is 10,000-30,000, the bromination rate is 20% or above brominated epoxy resin.Use these bromize phenoxy resins can reduce the outflow of resin when being applied to base material, thereby can keep the thickness of the interlayer dielectric of acquisition.In addition, these brominated epoxy resins can make the interlayer dielectric tool flexible and improve the anti-flammability of the multilayer board that makes through range upon range of interlayer dielectric.The instance of this type of halogenated epoxy resin or phenoxy resin comprises brominated bisphenol a type epoxy resin, brominated bisphenol F type epoxy resin and bromize phenoxy resin.Wherein, consider anti-flammability, preferred brominated bisphenol a type epoxy resin and bromize phenoxy resin.Use accounts for this type of halogenated epoxy resin or the phenoxy resin of resin total amount 10wt%-50wt%.When content during greater than 10wt%, can reduce resin and flow out, make the thickness of interlayer dielectric keep constant, and can guarantee thickness at pressure lower floor poststack interlayer dielectric.Simultaneously, when content is lower than 50wt%, can easily arrive base material 130, and can in the pressure lamination process, fill the concavo-convex place in the circuit resin-coated.
In order to improve the thermal endurance of interlayer dielectric, preferably use cresols phenolic resin varnish (cresol novolac epoxy resin).For the dielectric dissipation factor (dielectric tangent) that reduces interlayer dielectric, preferably use the epoxy resin of bicyclopentadiene modification.
The epoxy resin that uses among the present invention is not limited to these, and they can use separately or two or more combinations are used.
When this type of halogenated epoxy resin of independent use, the crosslink density after the curing is very low, causes flexible too high.In addition, when being dissolved in the solvent it with the preparation resin varnish, the viscosity of resin varnish can improve, and causes it to be applied to the operability worsens of base material.In order to solve these shortcomings, sneak into epoxide equivalent and be 3000 or following epoxy resin, its content is the 10-45wt% of resin total amount.
In brominated epoxy resin or bromize phenoxy resin, the bromination rate is preferably 20% or more.When the bromination rate greater than 20%, the multilayer board of gained has excellent flame, makes it reach V-0.When not using brominated epoxy resin, be 1 through mixing phenolic resin varnish type epoxy resin (novolac typeepoxy resin) and weight average molecular weight, 000-5,000 phosphorus resin can improve the anti-flammability of interlayer dielectric.In order further to improve anti-flammability, can in resin, introduce the anti-flammability inorganic filler.
The resin that uses among the present invention can further comprise epoxy curing agent.The instance of epoxy curing agent includes but not limited to amine, imidazoles, acid anhydrides and phenolic resin.The preferred amine that uses because even a spot of amine also is enough to epoxy resin cure, and makes it have anti-flammability.Preferred especially fusing point is 150 ℃ or higher amine, and this type of amine is at room temperature for solid and dissolve in the organic solvent, and its dissolubility in epoxy resin is low, and under 150 ℃ or above high temperature, can react rapidly with epoxy resin.Instantiation comprises dicyandiamide, diaminodiphenyl-methane and diamino diphenyl sulfone.This type of amine solvent and is evenly dispersed in the epoxy resin varnish in solvent.The compatibility of these amine and epoxy resin is low.When removing through evaporation when desolvating, these amine are evenly dispersed in the epoxy resin varnish, make under room temperature to the 100 ℃ temperature not react.Therefore, can provide bin stability excellent epoxy resin varnish.
Have in the interlayer dielectric of carrier in the present invention, when resin at 170 ℃ and 30kgf/cm 2Pressure solidified down after 1 hour, and the percentage elongation of the interlayer dielectric in-plane of measuring through the TMA method is 0.05% or still less.
In one of the present invention preferred embodiment, the resin in interlayer dielectric is at 170 ℃ and 30kgf/cm 2Pressure solidifies after 1 hour down, and interlayer dielectric is 2MPa-20MPa at 200 ℃ storage modulus of elasticity.When storing modulus of elasticity, because the depression that line engages in (wire bonding) reduces, so link reliably in above-mentioned scope.In addition, interlayer dielectric can remain on the 30%-80% of the storage modulus of elasticity under this interlayer dielectric room temperature at 200 ℃ storage modulus of elasticity.When conservation rate during in above-mentioned scope, even slim printed circuit board (PCB), also can be above that installing component reliably, and the circuit board distortion that can not cause causing because of 260 ℃-300 ℃ heating in the parts installation process by component weight.
Except above-mentioned material; The interpolation material of 1-45wt% that can add content and be the resin total amount is to improve modulus of elasticity, linear expansion coefficient, thermal endurance and anti-flammability etc., and said interpolation material for example is fused silica, crystalline silica, calcium carbonate, aluminium hydroxide, aluminium oxide, clay, barium sulfate, mica, talcum, white carbon black (white carbon), aluminium borate and E-glass micro mist.In the time of in content drops on above-mentioned scope, the viscosity of interlaminar insulating resin layer suits, and the ability of filling space between interior circuit (inner circuits) is improved.
Other additive be can also add, silane coupler such as epoxy silane or titanate coupling agent (to improve the adhesiveness between metal forming and the circuit board and to improve moisture-proof), antifoaming agent (to prevent the space) or liquid-type or micro powder type fire retardant comprised.
Selection is applied to base material with resin varnish, after 80 ℃ of-180 ℃ of following dryings, does not remain in the solvent in the resin then.The instance of this kind solvent comprises acetone, MEK, toluene, xylenes, n-hexane, methyl alcohol, ethanol, methyl cellosolve, ethyl cellosolve, methoxypropanol, cyclohexanone and N, dinethylformamide.
Next, with specifying the execution mode of manufacturing approach that the present invention has the interlayer dielectric of carrier.
Shown in the cross section view of Fig. 2, can make the interlayer dielectric with carrier material 100 as follows with carrier material 110 and interlayer dielectric 123.At first, resin Composition is dissolved in the solvent with predetermined concentration, to obtain resin varnish 121, with the glass woven fabric 130 of resin varnish 121 dippings as base material.Then, scrape off unnecessary resin, make base material 130 change directions, make itself and carrier material 110 (like metal forming) range upon range of, base material is supported through the supporting surface (anchor side) of carrier material through roller 140.Behind resin varnish 121 dipping base materials 130, base material 130 is supported by carrier material 110, can not cause any pressure to base material 130 like this.Like this, can provide distortion less interlayer dielectric 123.For the less interlayer dielectric of this type of distortion, the change in size that the heating and pressurizing in range upon range of and integrated (stackingand integration) step causes can reduce.Then, with resin drying, the amount of the volatile component in resin is the 1.5wt% of total resin weight or still less, makes the interlayer dielectric 100 with carrier material thus in the horizontal baking oven (horizontal oven) under 80 ℃-180 ℃.Alternatively; Continuous drying is with the glass woven fabric 130 of resin varnish 121 dippings in 80 ℃-180 ℃ vertical baking oven (vertical oven); Then glass woven fabric 130 is clipped between the matsurface and PET film of carrier material 110 (like metal forming), and can uses hot-rolling to carry out hot press (thermocompressionbonding) it is carried out integrated processing.Although can select above-mentioned any technology for use, because glass woven fabric is very thin and intensity is low, preferably use the technology of horizontal baking oven, in this horizontal baking oven, only there is minimum tension to be applied on the glass woven fabric.
When the carrier material in the interlayer dielectric with carrier material 100 is metal forming; Metal forming is processed; Make it have predetermined wiring pattern; And it is layered on the circuit board, use conventional vacuum press (vacuum press) with the product by heating pressurization to solidify the resin in the interlayer dielectric 123, easily form multilayer board thus with outer circuit.When the carrier material of the interlayer dielectric with carrier material 100 is resin molding, earlier resin molding to be peeled off, the interlayer dielectric 100 that will have carrier material then is layered on the circuit board.This interlayer dielectric and circuit board is range upon range of, through vacuum press product by heating is pressurizeed to solidify interlayer dielectric 123, can form multilayer board thus.Embodiment
To the present invention more specifically be described with reference to embodiment below, but the present invention is subject to these embodiment never in any form.
Embodiment 1 is in MEK (MEK), and (the bromination rate is 25%, mean molecule quantity: 25000-30000) (hereinafter to dissolve 10 weight portion bromize phenoxy resins; For mixed amount, term " part " means weight portion), 10 parts of bisphenol f type epoxy resins (epoxide equivalent: 175, Dainippon Ink And Chemicals; Incorporated, Epiclon 830), 20 parts of bisphenol A type epoxy resins (epoxide equivalent: 190, Japan Epoxy resins Co.; Ltd., 828), 25 parts of o-cresol phenolic epoxy varnish (epoxide equivalent: 220, Dainippon InkAnd Chemicals; Incorporated, Epiclon N-690) and 30 parts of naphthalene type epoxy resin (epoxide equivalent: 170, Dainippon Ink And Chemicals; Incorporated, HP-4700), that mixture is mixed.(Nippon Unicar Co., Ltd. is A-187) with 30 parts of aluminium hydroxides (HP-350, Showa Denko K.K.) preparation resin varnish as the dicyandiamide of curing agent, 0.3 weight portion epoxy silane coupling agent to add 5 weight portions to mixture.
Thus obtained resin varnish is applied to the matsurface that thickness is the Copper Foil of 12 μ m.In addition, using resin varnish dipping thickness is the glass woven fabric of 15 μ m.The copper foil surface (one side with resin varnish) that has been coated with resin varnish through scraper type coating machine (commacoater) above that is coated with the glass woven fabric with resin varnish; In horizontal baking oven with the product continuous drying; The thickness that makes the glass woven fabric with resin varnish thus is 30 μ m, is the interlayer dielectric with dielectric film and Copper Foil between B stratum of 30 μ m so that dry back thickness to be provided.In this article, to mean the reactivity of epoxy resin in the resin varnish of dipping interlayer dielectric be 10%-80% to term " B rank ".
Next, the glass epoxide doublesided copperclad laminate (base material thickness is that 0.1mm and copper thickness are 35 μ m) that contains glass cloth and epoxy resin is carried out Butut to obtain circuit board.The copper foil of circuit board surface is carried out after melanism (blackened) handles, the interlayer dielectric with Copper Foil of as above preparation is layered in the circuit board two sides, interlayer dielectric is contacted with circuit board.
Range upon range of product is clipped between two 1.6mm corrosion resistant plates (stainless-steel patches), at 3 ℃ of programming rates/min-10 ℃/min, pressure 10-30Kg/cm 2, under the vacuum degree-760 to-730mmHg condition, utilize vacuum press to be heated 150 ℃, then 150 ℃ down pressurization 15min or more than, thereby preparation thickness is the multilayer board of 0.2mm.
Embodiment 2 is like embodiment 1 said manufacturing multilayer board, and different is with silica (silica) (AdmatechsCo., Ltd., SO-25R) instead of hydrogen aluminium oxide.
Embodiment 3 is like embodiment 1 said manufacturing multilayer board, and different is, use be 10 parts of bisphenol A type epoxy resin (epoxide equivalents: 190; Japan Epoxy resins Co., Ltd., 828), 30 parts of o-cresol phenolic epoxy varnish (epoxide equivalents: 220; Dainippon Ink And Chemicals; Incorporated, Epiclon N-690) and 35 parts of naphthalene type epoxy resin (epoxide equivalent: 170, DainipponInk And Chemicals; Incorporated, HP-4700).
Embodiment 4 is like embodiment 1 said manufacturing multilayer board, and different is, use be 40 parts of bisphenol A type epoxy resin (epoxide equivalents: 190; Japan Epoxy resins Co., Ltd., 828), 10 parts of o-cresol phenolic epoxy varnish (epoxide equivalents: 220; Dainippon Ink And Chemicals; Incorporated, Epiclon N-690) and 5 parts of naphthalene type epoxy resin (epoxide equivalent: 170, DainipponInk And Chemicals; Incorporated, HP-4700).
Embodiment 5 is like embodiment 1 said manufacturing multilayer board, and different is, also added 20 parts of biphenyl type epoxy resin (epoxide equivalent: 166, Nippon Kayaku Co., Ltd., NC-3000H).
Embodiment 6 is like embodiment 1 said manufacturing multilayer board, and different is to add 60 parts of aluminium borates (YS-3A) as inorganic filler; Use be 30 weight portion bromize phenoxy resins (the bromination rate: 25%, mean molecule quantity: 25,000-30; 000) (hereinafter, for mixed amount, term " part " means weight portion) and 10 parts of bisphenol f type epoxy resin (epoxide equivalents: 175; Dainippon Ink And Chemicals; Incorporated, Epiclon 830), and used curing agent and hardening accelerator.
1 said manufacturing has the prepreg of Copper Foil to comparative example 1 like embodiment, and used thickness is the conventional prepreg (base material thickness: be the Copper Foil of 12 μ m with thickness 0.05mm) of 0.06mm.This prepreg and circuit board with Copper Foil is made multilayer board like embodiment 1 said use.
Estimate the distortion of multilayer board under percentage elongation and the load of the storage modulus of elasticity (200 ℃) of thus obtained interlayer dielectric, the conservation rate of storing modulus of elasticity and in-plane.The result is table 1 illustrate.Table 1
Embodiment 1 Embodiment 2 Embodiment 3 Embodiment 4
The storage modulus of elasticity of interlayer dielectric (200 ℃) 5MPa 12MPa 8MPa 5MPa
Interlayer dielectric is stored the conservation rate of modulus of elasticity 30％ 40％ 40％ 40％
The percentage elongation of interlayer dielectric on directions X 0.05％ 0.04％ - -
The percentage elongation of interlayer dielectric on the Y direction 0.05％ 0.04％ - -
The percentage elongation of interlayer dielectric on in-plane 0.05％ 0.04％ - -
The distortion of multilayer board under the load 0.5mm or still less 0.5mm or still less 0.5mm or still less 0.5mm or still less
Process of measurement 1. preparation interlayer dielectrics will as above make has a fritter that the interlayer dielectric that has Copper Foil of dielectric film between B stratum is cut into 350mm * 350mm (directions X * Y direction), then 170 ℃ with pressure 30kgf/cm 2Under heat and made dielectric film between C stratum in 1 hour.In this article, term " C rank " mean the epoxy resin in the resin varnish reactivity greater than 90%.This had the fritter that the interlayer dielectric of dielectric film and Copper Foil between C stratum is cut into 5mm * 20mm (directions X * Y direction).Then, the Copper Foil in the interlayer dielectric with Copper Foil is carried out etching, obtain the test block that thickness is the interlayer dielectric of 30 μ m.In this article, directions X is the length direction with interlayer dielectric of Copper Foil, and the Y direction is the Width with interlayer dielectric of Copper Foil.
2. the storage modulus of elasticity of interlayer dielectric is under 200 ℃, utilizes dynamic thermal analysis appearance (dynamic thermal analysis instrument) (TAInstruments Japan, DMA, 5 ℃/min) measure the interlayer dielectric test block that makes in above-mentioned " 1 ".
3. the conservation rate of the storage modulus of elasticity of interlayer dielectric utilizes dynamic thermal analysis appearance (TA Instruments Japan, DMA, 5 ℃/min) measure the interlayer dielectric test block that makes in above-mentioned " 1 " under 200 ℃ and room temperature (20-25 ℃).Storage modulus of elasticity (a) under 200 ℃ and the storage modulus of elasticity (b) under the room temperature calculate conservation rate with [(a)/(b)] * 100 (%).
4. the percentage elongation of interlayer dielectric in-plane is measured the percentage elongation of the interlayer dielectric test block that makes in above-mentioned " 1 " through the TMA method.Particularly, the thermal analyzer that uses TA Instruments Japan to make is measured 50 ℃-260 ℃ percentage elongation under the condition of tension load 10g and 10 ℃/min of programming rate.The percentage elongation of directions X calculates with [(size of directions X after the load)/(size of directions X before the load] * 100 (%).In an identical manner, measure the percentage elongation of Y direction.The percentage elongation of in-plane is with the mean value calculation of the percentage elongation of directions X and Y direction.
Under the load distortion of multilayer board under the condition of 200 ℃ of temperature, 10g load (constant), spacing (inter-chuck distance) 10mm and crosshead speed (cross-head rate) 0.5mm/min; (Orientec Co. Ltd.) measures the distortion of the above-mentioned multilayer board that makes under load to use 5t Tensilon.

Claims (7)

1. have the interlayer dielectric of carrier material, it comprises:
The carrier material that constitutes by metal forming or resin molding and
Be formed at the interlayer dielectric of said carrier material one side;
Wherein, said interlayer dielectric is made up of the glass woven fabric through the resin impregnation that comprises inorganic filler;
The thickness of said glass woven fabric is 8 μ m-20 μ m; And
When said resin at 170 ℃ and 30kgf/cm 2When pressure down solidified 1 hour, the percentage elongation of the interlayer dielectric in-plane of measuring through the TMA method was 0.05% or still less.
2. the interlayer dielectric with carrier material according to claim 1 is wherein worked as said resin at 170 ℃ and 30kgf/cm 2When pressure solidified 1 hour down, said interlayer dielectric was 2MPa-20MPa at 200 ℃ storage modulus of elasticity.
3. the interlayer dielectric with carrier material according to claim 2, wherein said interlayer dielectric is the 30%-80% of the storage modulus of elasticity under this interlayer dielectric room temperature at 200 ℃ storage modulus of elasticity.
4. the interlayer dielectric with carrier material according to claim 1, wherein said resin comprises epoxy resin.
5. the interlayer dielectric with carrier material according to claim 1, wherein said resin are in B scalariform attitude.
6. multilayer board, it makes through the described interlayer dielectric with carrier material of range upon range of claim 1, and wherein said carrier material is made up of metal forming.
7. multilayer board, it makes through interlayer dielectric and the circuit board in the described interlayer dielectric with carrier material of range upon range of claim 1, and wherein said carrier material is made up of resin molding.
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