CN101599435B - Method for doping single-layer polycrystalline silicon HBT extrinsic base region - Google Patents

Method for doping single-layer polycrystalline silicon HBT extrinsic base region Download PDF

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CN101599435B
CN101599435B CN2009100553672A CN200910055367A CN101599435B CN 101599435 B CN101599435 B CN 101599435B CN 2009100553672 A CN2009100553672 A CN 2009100553672A CN 200910055367 A CN200910055367 A CN 200910055367A CN 101599435 B CN101599435 B CN 101599435B
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base region
region
extrinsic base
doping
polycrystalline silicon
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CN101599435A (en
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吴小利
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Shanghai Huahong Grace Semiconductor Manufacturing Corp
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Shanghai Huahong Grace Semiconductor Manufacturing Corp
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Abstract

The invention discloses a method for doping a single-layer polycrystalline silicon HBT extrinsic base region, which comprises the following steps: (1) preparing a shallow slot isolation region on a substrate; (2) forming a collector region on the substrate through ion implantation; (3) forming the base region on the surface of the substrate through an epitaxial growth SiGe method; (4) preparing an emitter of which the expansion region width covers the extrinsic base region on the base region; (5) realizing high-concentration doping of polycrystalline silicon through ion implantation; and (6) using the high-concentration doped polycrystalline silicon region as an impurity source for doping the extrinsic base region, and realizing the doping of the extrinsic base region through thermal treatment. The method for doping the extrinsic base region effectively avoids lattice damage to the extrinsic base region so as to weaken the diffusion enhancing effect of the damage on an emitter region, reduces the diffusion of the extrinsic base region to the collector region, and is easier to control the transverse diffusion of the impurity of the base region.

Description

The doping method of single-layer polycrystalline silicon HBT extrinsic base region
Technical field
(Heterojunction BipolarTransistor, HBT) device preparing process are specifically related to a kind of doping method of single-layer polycrystalline silicon HBT extrinsic base region to the present invention relates to a kind of heterogenous dual-pole transistor.
Background technology
As shown in Figure 1; Existing single-layer polycrystalline silicon HBT device only adopts polysilicon structure at emitter; This device technology is simple, but owing to lack extra autoregistration base polysilicon structure, the doping of its extrinsic base region is met difficulty; The doping of common extrinsic base region realizes through the extrinsic base region high concentration ion is injected, specifically may further comprise the steps:
(1) preparation shallow trench isolation region 2 on substrate 1;
(2) on substrate 1, inject the formation collector region through ion;
(3) method through epitaxial growth SiGe forms the base on substrate 1 surface;
(4) the above-prepared emitter 5 (zones of extensibility 8 width of emitter are less than the scope of extrinsic base region 4) in the base;
(5) directly pass through the doping that high concentration ion injects 9 realization extrinsic base regions 4.
This doping method can produce damage to extrinsic zone, and these damages can strengthen the diffusion of impurities of intrinsic base region, makes the junction depth of emitter junction 6 be difficult to control; The longitudinal diffusion of the extrinsic base region impurity of high concentration has increased the junction capacitance that base-collecting region is collected knot 7; And, also difficult more to impurity to the control of the horizontal proliferation of emitter 5.
Summary of the invention
Technical problem to be solved by this invention provides a kind of doping method of single-layer polycrystalline silicon HBT extrinsic base region, and it can avoid the lattice damage to extrinsic base region, and then has weakened the diffusion enhancement effect of this damage to emitter region impurity.
In order to solve above technical problem, the invention provides a kind of doping method of single-layer polycrystalline silicon HBT extrinsic base region, may further comprise the steps:
(1) on substrate, prepares shallow trench isolation region;
(2) on substrate, inject the formation collector region through ion;
(3) in the method formation base of substrate surface through epitaxial growth SiGe;
(4) the above-prepared emitter in said base, the zones of extensibility width of said emitter covers extrinsic base region;
(5) inject the high-concentration dopant of realizing polysilicon through ion;
(6) with the multi-crystal silicon area of high-concentration dopant as the impurity source that said extrinsic base region is mixed, realize doping through heat treatment to said extrinsic base region.
The doping method of extrinsic base region of the present invention has effectively been avoided the lattice damage to extrinsic base region, and then has weakened the diffusion enhancement effect of this damage to emitter region impurity; Reduced the diffusion of extrinsic base region to collecting region; The horizontal proliferation of base impurity is more easy to control.And the present invention and existing technology have good compatibility.
Description of drawings
Below in conjunction with accompanying drawing and embodiment the present invention is done further explain.
Fig. 1 is the doping method of existing single-layer polycrystalline silicon HBT extrinsic base region;
Fig. 2 is the doping method of single-layer polycrystalline silicon HBT extrinsic base region of the present invention.
Reference numeral wherein is: 1, substrate; 2, shallow trench isolation region; 3, extension multi-crystal silicon area; 4, extrinsic base region; 5, emitter; 6, emitter junction; 7, collect knot; 8, emitter zones of extensibility; 9, high concentration ion injects.
Embodiment
As shown in Figure 2, the doping method of single-layer polycrystalline silicon HBT extrinsic base region of the present invention may further comprise the steps:
(1) preparation shallow trench isolation region 2 on substrate 1;
(2) on substrate 1, inject the formation collector region through ion;
(3) method through epitaxial growth SiGe forms the base on substrate 1 surface;
(4) the above-prepared emitter 5 in said base, the width of emitter zones of extensibility 8 covers extrinsic base region 4;
(5) deposit or growing epitaxial multi-crystal silicon area 3 on shallow trench isolation region 2, and pass through the high-concentration dopant that high concentration ion injects 9 realization polysilicons;
(6) with the extension multi-crystal silicon area 3 of high-concentration dopant as the impurity source that extrinsic base region 4 is mixed, realize doping through heat treatment to extrinsic base region 4.
Preferably, the impurity concentration scope of the high-concentration dopant of step (5) is 1e20cm -3~5e20cm -3
In the growth course of HBT epitaxial loayer; To form polysilicon at shallow trench isolation region; Width through control emitter zones of extensibility can be protected extrinsic base region; Inject and only multi-crystal silicon area is carried out ion, the multi-crystal silicon area of high-concentration dopant can be used as the impurity source that extrinsic base region is mixed, and realizes the doping of extrinsic region through heat treatment.
The present invention has effectively avoided the lattice damage to extrinsic base region, and then has weakened the diffusion enhancement effect of this damage to emitter region impurity; Reduced the diffusion of extrinsic base region to collecting region; The horizontal proliferation of base impurity is more easy to control.This technology will guarantee that except the making step of emitter zones of extensibility width covers the extrinsic base region, only need semiconductor integrated circuit process equipment and common process commonly used, and preparation technology is simple, helps reducing process complexity and manufacturing cost.

Claims (1)

1. the doping method of a single-layer polycrystalline silicon HBT extrinsic base region is characterized in that, comprises the steps:
(1) on substrate, prepares shallow trench isolation region;
(2) on substrate, inject the formation collector region through ion;
(3) in the method formation base of substrate surface through epitaxial growth SiGe;
(4) the above-prepared emitter in said base, the zones of extensibility width of said emitter covers extrinsic base region;
(5) deposit or growing epitaxial multi-crystal silicon area on shallow trench isolation region inject the high-concentration dopant of realizing polysilicon through ion;
(6) with the multi-crystal silicon area of high-concentration dopant as the impurity source that said extrinsic base region is mixed, realize doping through heat treatment to said extrinsic base region;
Wherein, the impurity concentration scope of the described high-concentration dopant of step (5) is 1e20cm -3~5e20cm -3
CN2009100553672A 2009-07-24 2009-07-24 Method for doping single-layer polycrystalline silicon HBT extrinsic base region Active CN101599435B (en)

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Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102129992B (en) * 2010-01-18 2013-02-13 上海华虹Nec电子有限公司 Method for improving impurity concentration distribution of impurity injection type polysilicon emitter
CN101834135A (en) * 2010-04-22 2010-09-15 上海宏力半导体制造有限公司 Bipolar transistor and manufacturing method thereof
CN102176464B (en) * 2011-03-29 2015-10-21 上海华虹宏力半导体制造有限公司 SiGe heterojunction bipolar device and preparation method thereof
CN103050516B (en) * 2011-10-13 2016-04-13 上海华虹宏力半导体制造有限公司 Accurate control EB ties the structure of position and EB knot reverse breakdown voltage
CN103066117B (en) * 2011-10-24 2015-06-03 上海华虹宏力半导体制造有限公司 Half self alignment bipolar transistor and manufacturing method thereof
CN103117299B (en) * 2011-11-16 2015-06-03 上海华虹宏力半导体制造有限公司 Self-alignment bipolar transistor and preparation method thereof
CN106601660B (en) * 2016-11-22 2020-07-24 中国电子科技集团公司第五十五研究所 Base polycrystalline silicon self-alignment registration structure and preparation method thereof

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6100152A (en) * 1998-08-31 2000-08-08 U.S. Philips Corporation Method of manufacturing a semiconductor device with a fast bipolar transistor
CN1627485A (en) * 2003-12-12 2005-06-15 联华电子股份有限公司 Method for producing ambipolar transistor of heterochronous contact surfaces
CN1791981A (en) * 2003-05-21 2006-06-21 杰斯半导体公司纽波特工厂 Method for fabricating a self-aligned bipolar transistor with planarizing layer and related structure
CN101087000A (en) * 2006-06-09 2007-12-12 国际商业机器公司 Porous silicon for isolation region formation and related structure

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6100152A (en) * 1998-08-31 2000-08-08 U.S. Philips Corporation Method of manufacturing a semiconductor device with a fast bipolar transistor
CN1791981A (en) * 2003-05-21 2006-06-21 杰斯半导体公司纽波特工厂 Method for fabricating a self-aligned bipolar transistor with planarizing layer and related structure
CN1627485A (en) * 2003-12-12 2005-06-15 联华电子股份有限公司 Method for producing ambipolar transistor of heterochronous contact surfaces
CN101087000A (en) * 2006-06-09 2007-12-12 国际商业机器公司 Porous silicon for isolation region formation and related structure

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