CN101582633B - Three-phase boosting and deboosting power factor correction circuit and control method thereof - Google Patents
Three-phase boosting and deboosting power factor correction circuit and control method thereof Download PDFInfo
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- CN101582633B CN101582633B CN2008100969908A CN200810096990A CN101582633B CN 101582633 B CN101582633 B CN 101582633B CN 2008100969908 A CN2008100969908 A CN 2008100969908A CN 200810096990 A CN200810096990 A CN 200810096990A CN 101582633 B CN101582633 B CN 101582633B
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Abstract
The invention discloses a three-phase boosting and deboosting power factor correction circuit and a control method thereof, comprising a first single-phase boosting and deboosting power factor correction circuit, a second single-phase boosting and deboosting power factor correction circuit, a third single-phase boosting and deboosting power factor correction circuit, a first output capacitor, a second output capacitor and a midline, wherein the first single-phase boosting and deboosting power factor correction circuit receives the first-phase voltage of three-phase voltage, is provided with a first output terminal, a midpoint and a second output terminal and is used for outputting first output voltage and second output voltage; the second single-phase boosting and deboosting power factor correction circuit receives the second-phase voltage of the three-phase voltage and is coupled with the first output terminal, the midpoint and the second output terminal; the third single-phase boosting and deboosting power factor correction circuit receives the third-phase voltage of the three-phase voltage and is coupled with the first output terminal, the midpoint and the second output terminal; the first output capacitor is coupled with the first output terminal and the midpoint; the second output capacitor is coupled with the midpoint and the second output terminal; and the midline is coupled with the midpoint. The invention has the advantages of reducing the number of elements, increasing the utilization ratio of the elements, improving the power density of a system, reducing the cost of the system, easily realizing a redundant system, and the like.
Description
Technical field
The present invention relates to a kind of three-phase boosting and deboosting power factor correction circuit (buck-boost PFC circuit) and control method thereof, refer in particular to a kind of three separate single-phase three level (single-phasethree-level) up-down voltage power factor correcting circuit that utilizes.
Background technology
Recent two decades comes power electronic technology to obtain development at full speed, has been widely applied to fields such as electric power, chemical industry, communication.The power electronic equipment majority is by rectifier and power network interface, the non-linear circuit that typical rectifier is made up of diode or thyristor (thyristor), in power network, produce a large amount of current harmonicss and fictitious power (reactive power), pollute power network, become the electric power public hazards.Power electronic equipment has become one of topmost harmonic source of power network.A kind of main method that suppresses power electronic equipment generation harmonic wave is exactly active method, promptly designs high-performance rectifier of new generation, and it has input current for sinusoidal wave, characteristics such as harmonic content is low, power factor height, promptly has power factor emendation function.Circuit of power factor correction has obtained very big development in recent years, becomes one of important directions of power electronics research.
The single-phase power factor correcting technology is reaching its maturity aspect circuit structure and the control at present, single phase power factor correcting circuit commonly used is booster circuit (boost circuit), it has framework simple, advantages such as the electromagnetic interference (EMI) filter that requires is little, but this framework can only be adapted to the occasion of output voltage greater than the input voltage peak value, and corresponding to the wide region input voltage, sometimes input voltage can be higher than output voltage, thereby promptly needs input voltage to be reduced and guarantee that input current can obtain lower total harmonic distortion (total harmonic distortion:THD) by fine tracking input voltage.And this moment, the boost circuit can't be finished this function, so step-down (buck) framework is used to this occasion, as shown in Figure 1, be known single-phase buck (buck-boost) structure that can be applicable to the relative broad range input voltage, it has diode B1-B4 and D1-D2, switch S 1-S2, inductance L 1, input power supply Vin and output capacitance C1, and exports a voltage Vo.
This kind translation circuit mode of operation is as follows:
Wherein Vo is an output voltage, and Vin is the voltage of coming in and going out.Under this service conditions, the oscillogram of input voltage vin and output voltage V o as shown in Figure 2, output voltage is higher than input voltage all the time, so converter has to operate under the boost pattern, switch S 1 is open-minded, and diode D1 turn-offs, and converter is exactly traditional Boost pfc circuit in such cases.
Be very easy to find from Fig. 3, as output voltage V o during less than the input voltage vin peak value, converter operates in buck and boost mode of operation.To between π+α, output voltage is greater than input voltage at interval π-α, the S1 normal open, and D1 often closes, and converter is operated in the boost pattern, and between π-α, output voltage is less than input voltage at interval α, and S2 often closes, and D2 normal open, converter are operated in the buck pattern.
This circuit only is appropriate to single-phase input condition, and we need use three-phase input voltage in some occasion, and therefore this uniline does not satisfy system requirements.And, had a lot of other some conventional methods to be used to reduce the total harmonic distortion (THD) of input current in the three-phase input voltage application scenario.Relatively Chang Yong a kind of method as shown in Figure 4.It comprises diode D1-D14, capacitor C 0, C1-C3, switch S 1-S4, inductance L 1-L5 and AC power Vi1-Vi3.
And the structure of Fig. 4 can be divided into 2 parts: previous section is an input BUCK part (step-down input stage), and the back is an output BOOST part (output stage of boosting).This pfc circuit can carry out rectification to three-phase three-wire system, and simple in structure, components and parts are less.But its shortcoming is arranged also: because the mid point of three-phase three-wire system system is to be formed by three electric capacity joint constructions by the three-phase alternating current out-put supply, it is not the absolute zero level point, and three-phase input coupling mutually under the three-phase three-wire system situation, so three-phase input current control is higher than difficulty and THD.Because thereby the component number that electric current flows through often causes the efficient of this structure lower.Particularly because the three-phase input is electric coupling, this system transformer isolation of no use will be difficult to parallel connection, if and joint conference causes the situation of the electric current backflow of a phase wherein to another phase, and then causes each phase circuit current unevenness situation, be difficult to make highly reliable redundant system.
Summary of the invention
Technical problem to be solved by this invention provides a kind of three-phase boosting and deboosting power factor correction circuit and control method thereof, it is to utilize three separate single-phase, three level up-down voltage power factor correcting circuits to form, owing to have a center line, so this first, this second with the 3rd single-phase up-down voltage power factor correcting circuit be independent of each other the running that is mutually independent; Can be used for improving the total harmonic distortion (total harmonic distortion:THD) and its efficient of raising of three-phase boosting and deboosting power factor correction circuit, so three-phase boosting and deboosting power factor correction circuit provided by the present invention relatively have efficient higher, reduce component number, improve the components and parts utilance, simultaneously also improve the power density of system, and reduced the cost of system; Other has every phase current and controls separately, is easy to realize redundant system, and integrated with PFC and DC/DC, and is specially adapted to UPS advantages such as (UPS).
In order to address the above problem, the invention provides a kind of three-phase boosting and deboosting power factor correction circuit, comprise:
One first single-phase up-down voltage power factor correcting circuit receives one of three-phase voltage first phase voltage, and has one first output, a mid point and one second output, is used to export one first and one second output voltage;
One second single-phase up-down voltage power factor correcting circuit receives one of described three-phase voltage second phase voltage, and is coupled in described first output, described mid point and described second output;
One the 3rd single-phase up-down voltage power factor correcting circuit receives one of described three-phase voltage third phase voltage, and is coupled in described first output, described mid point and described second output;
One first output capacitance is coupled in described first output and described mid point;
One second output capacitance is coupled in described mid point and described second output; And
One center line is coupled in described mid point.
Further, foregoing circuit also can comprise, described first phase voltage, described second phase voltage and described third phase voltage are respectively an A phase voltage, a B phase voltage and a C phase voltage, and described first with described second output voltage have a positive voltage value and a negative value respectively.
Further, foregoing circuit can comprise that also each of described first to the described the 3rd single-phase up-down voltage power factor correcting circuit is single-phase three level up-down voltage power factor correcting circuits, and these single-phase three level up-down voltage power factor correcting circuits more comprise:
One first to 1 the 6th diode, each this diode has an anode and a negative electrode, wherein this first with this second diode be used for rectification, the anode of this first diode is coupled in the negative electrode of this second diode, and the negative electrode of the 4th diode is coupled in the anode of the 3rd diode;
One first to 1 the 4th switch, each this switch has one first end and one second end, wherein this first end of this first switch is coupled in the negative electrode of the 3rd diode, this second end of this first switch is coupled in the negative electrode of first diode, this first end of this second switch is coupled in the anode of second diode, this second end of this second switch is coupled in the anode of the 4th diode, this first end of the 3rd switch is coupled in the negative electrode of the 4th diode, this second end of the 3rd switch is coupled in the anode of the 5th diode, this first end of the 4th switch is coupled in the negative electrode of the 6th diode, this second end of the 4th switch is coupled in this first end of the 3rd switch, the negative electrode of the 5th diode is coupled in described first output, the anode of the 6th diode is coupled in described second output, and described mid point is coupled in this first end of the 3rd switch; And
One first to 1 second inductance, each this inductance has one first and one second end, wherein this first end of this first inductance is coupled in the negative electrode of the 3rd diode, this second end of this first inductance is coupled in second end of the 3rd switch, this first end of this second inductance is coupled in the anode of the 4th diode, and this second end of this second inductance is coupled in first end of the 4th switch.
Further, foregoing circuit also can comprise, one first to 1 the 6th thyristor and one first and one second battery, wherein each this thyristor has an anode and a negative electrode, each this battery has an anodal and negative pole, described center line has one first end and one second end, this second end of this center line is coupled in this mid point, what this anode of this first to the 3rd thyristor all was coupled in this first battery should positive pole, this negative electrode of this first to the 3rd thyristor is coupled in the negative electrode of described first diode of described first to the described the 3rd single-phase up-down voltage power factor correcting circuit respectively, this positive pole of this second battery is coupled in this negative pole of this first battery, this negative electrode of the 4th to the 6th thyristor all is coupled in this negative pole of this second battery, this anode of the 4th to the 6th thyristor is coupled in the anode of described second diode of the described the 3rd to described first single-phase up-down voltage power factor correcting circuit respectively, and this positive pole of this second battery is coupled in this first end of this center line.
The present invention also provides a kind of three-phase boosting and deboosting power factor correction circuit, comprises:
One first single-phase up-down voltage power factor correcting circuit receives one of three-phase voltage first phase voltage, and has one first output, a mid point and one second output, is used to export one first and one second output voltage;
One second single-phase up-down voltage power factor correcting circuit receives one of described three-phase voltage third phase voltage, and is coupled in described first output, described mid point and described second output;
One first to 1 the 4th thyristor, each this thyristor has an anode and a negative electrode, wherein this negative electrode of this anode of this negative electrode of this anode of this first thyristor, this second thyristor, the 3rd thyristor and the 4th thyristor all is used to receive second phase voltage, this negative electrode of this first thyristor and this anode of this second thyristor are coupled in the described first single-phase up-down voltage power factor correcting circuit, and this anode of this negative electrode of the 3rd thyristor and the 4th thyristor also is coupled in the described second single-phase up-down voltage power factor correcting circuit;
One first output capacitance is coupled in described first output and described mid point;
One second output capacitance is coupled in described mid point and described second output; And
One center line is coupled in described mid point.
Further, foregoing circuit also can comprise, described first is single-phase three level up-down voltage power factor correcting circuits with each of the described second single-phase up-down voltage power factor correcting circuit, and these single-phase three level up-down voltage power factor correcting circuits more comprise:
One first to 1 the 6th diode, each this diode has an anode and a negative electrode, wherein this first with this second diode be used for rectification, this anode of this first diode is coupled in this negative electrode of this second diode, and this negative electrode of the 4th diode is coupled in this anode of the 3rd diode;
One first to 1 the 4th switch, each this switch has one first end and one second end, wherein this first end of this first switch is coupled in the negative electrode of the 3rd diode, this second end of this first switch is coupled in the negative electrode of first diode, this first end of this second switch is coupled in the anode of second diode, this second end of this second switch is coupled in the anode of the 4th diode, this first end of the 3rd switch is coupled in the negative electrode of the 4th diode, this second end of the 3rd switch is coupled in the anode of the 5th diode, this first end of the 4th switch is coupled in the negative electrode of the 6th diode, this second end of the 4th switch is coupled in this first end of the 3rd switch, the negative electrode of the 5th diode is coupled in described first output, the anode of the 6th diode is coupled in described second output, and described mid point is coupled in this first end of the 3rd switch; And
One first to 1 second inductance, each this inductance has one first and one second end, wherein this first end of this first inductance is coupled in the negative electrode of the 3rd diode, this second end of this first inductance is coupled in second end of the 3rd switch, this first end of this second inductance is coupled in the anode of the 4th diode, and this second end of this second inductance is coupled in first end of the 4th switch.
Further, foregoing circuit also can comprise, one first to 1 the 3rd input capacitance, wherein each this input capacitance and described center line all have one first end and one second end, this second end of this center line is coupled in this mid point, this first termination of this first input capacitance is received described first phase voltage, this second end of this first input capacitance is coupled in this first end of this center line, this first termination of this second input capacitance is received second phase voltage, this second end of this second input capacitance is coupled in this second end of this first input capacitance, this first termination of the 3rd input capacitance is received described third phase voltage, and this second end of the 3rd input capacitance is coupled in this second end of this second input capacitance.
Further, foregoing circuit also can comprise, one the 5th to 1 the 8th thyristor and one first and one second battery, wherein each this thyristor has an anode and a negative electrode, each this battery has an anodal and negative pole, described center line has one first end and one second end, this second end of this center line is coupled in described mid point, what this anode of the 5th to the 6th thyristor all was coupled in this first battery should positive pole, the 5th with this negative electrode of the 6th thyristor be coupled in respectively described first with the negative electrode of first diode of the described second single-phase up-down voltage power factor correcting circuit, this positive pole of this second battery is coupled in this negative pole of this first battery, the 7th all is coupled in this negative pole of this second battery with this negative electrode of the 8th thyristor, the 7th with this anode of the 8th thyristor be coupled in respectively this second with the anode of second diode of this first single-phase up-down voltage power factor correcting circuit, and this positive pole of this second battery is coupled in this first end of this center line.
The present invention also provides a kind of control method that is used for a three-phase boosting and deboosting power factor correction circuit,
Described circuit comprises one first single-phase up-down voltage power factor correcting circuit, receive one of three-phase voltage first phase voltage, have one first output, a mid point, one second output and a center line, this center line is coupled in this mid point, be used to export one first and one second output voltage, and described control method comprises following step:
When one of a positive half cycle of described first phase voltage amplitude during less than one of described first output voltage amplitude, make the described first single-phase up-down voltage power factor correcting circuit carry out one and boost, export this amplitude of this first output voltage according to this;
When one of a positive half cycle of described first phase voltage amplitude during greater than one of described first output voltage amplitude, make the described first single-phase up-down voltage power factor correcting circuit carry out a step-down, export this amplitude of this first output voltage according to this;
When an one of negative half period of described first phase voltage amplitude during less than one of described second output voltage amplitude, make the described first single-phase up-down voltage power factor correcting circuit carry out one and boost, export this amplitude of this second output voltage according to this; And
When an one of negative half period of described first phase voltage amplitude during greater than one of described second output voltage amplitude, make the described first single-phase up-down voltage power factor correcting circuit carry out a step-down, export this amplitude of this second output voltage according to this.
Further, above-mentioned control method also can comprise, described three-phase boosting and deboosting power factor correction circuit more comprises one second single-phase up-down voltage power factor correcting circuit, receive one of described three-phase voltage second phase voltage, and be coupled in described first output, described mid point, described second output and described center line, be used to export described first with described second output voltage, and described control method more comprises following step:
When one of a positive half cycle of described second phase voltage amplitude during less than one of described first output voltage amplitude, make the described second single-phase up-down voltage power factor correcting circuit carry out one and boost, export this amplitude of this first output voltage according to this;
When one of a positive half cycle of described second phase voltage amplitude during greater than one of described first output voltage amplitude, make the described second single-phase up-down voltage power factor correcting circuit carry out a step-down, export this amplitude of this first output voltage according to this;
When an one of negative half period of described second phase voltage amplitude during less than one of described second output voltage amplitude, make the described second single-phase up-down voltage power factor correcting circuit carry out one and boost, export this amplitude of this second output voltage according to this; And
When an one of negative half period of described second phase voltage amplitude during greater than one of described second output voltage amplitude, make the described second single-phase up-down voltage power factor correcting circuit carry out a step-down, export this amplitude of this second output voltage according to this.
The present invention also provides a kind of three-phase power factor correcting circuit, comprises,
One first electric capacity has one first voltage output end;
One second electric capacity has one second voltage output end, and is electrically connected in series described first electric capacity in a connection mid point;
One center line is electrically connected on described connection mid point;
Three power factor correction pfc converters receive a three-phase alternating current input voltage respectively, and export the direct current voltage with a setting voltage value, and this setting voltage value is less than a peak value of this three-phase alternating current input voltage;
Wherein each pfc converter comprises a rectifier bridge, is used for the described three-phase alternating current input voltage of rectification, and exports one first commutating voltage and one second commutating voltage by one first and one second rectification output end respectively:
One first step-up/step-down circuit is coupled in described first rectification output end and described center line, is used to regulate described first commutating voltage, and exports described first voltage output end of this setting voltage value to described first electric capacity; And
One second step-up/step-down circuit is coupled in described second rectification output end and described center line, is used to regulate described second commutating voltage, and exports second voltage output end of this setting voltage value to described second electric capacity.
Further, foregoing circuit also can comprise, a cell apparatus, and wherein each rectifier bridge comprises a gate-controlled switch, and this cell apparatus is connected to each rectifier bridge by corresponding gate-controlled switch, and when described three-phase alternating current input voltage is undesired, provide an electric energy.
The present invention also provides a kind of three-phase power factor correcting circuit, comprises:
One first electric capacity has one first voltage output end;
One second electric capacity has one second voltage output end, and is electrically connected in series described first electric capacity in a connection mid point;
One center line is electrically connected on described connection mid point;
One first and one second power factor correction pfc converter is connected respectively to one first mutually and one second cross streams input voltage, and exports a setting voltage respectively to described first and described second electric capacity;
Wherein each pfc converter comprises a rectifier bridge, be respectively applied for rectification this first with this second AC-input voltage, and export one first commutating voltage and one second commutating voltage by first and second rectification output ends of this rectifier bridge respectively;
One first step-up/step-down circuit is coupled in described first rectification output end and described center line, is used to regulate described first commutating voltage and exports described first voltage output end of described setting voltage value to described first electric capacity; And
One second step-up/step-down circuit is coupled in described second rectification output end and described center line, regulates described second commutating voltage, and exports described second voltage output end of described setting voltage value to described second electric capacity,
Wherein said first and each rectifier bridge of described second pfc converter comprise at least one controlled rectification switch, a third phase AC-input voltage by corresponding controlled rectification switch be connected to this first and this second pfc converter.
Compared with prior art, use the present invention, have following characteristics:
1. has three-phase Buck-Boost PFC function, low THD, high efficiency;
2. the Buck-Boost pfc circuit after improving only utilizes two single-phase Buck-Boost pfc circuits, can be to the three-phase input voltage rectification, thus significantly reduced the quantity of system's components and parts, improved the utilance of components and parts, also improve simultaneously the power density of system, reduced the cost of system;
3. every phase current is controlled separately, is easy to realize redundant system;
4. be easy to realize the integrated of PFC and DC/DC, be specially adapted to the occasion of UPS (UPS).
Description of drawings
Fig. 1 is the circuit diagram of a known single-phase up-down voltage power factor correcting circuit;
Fig. 2 is the oscillogram at next known input of booste operation pattern and output voltage;
Fig. 3 is in the oscillogram of boosting with next known input of brownout operation pattern and output voltage;
Fig. 4 is the circuit diagram of a known phase three-wire three up-down voltage power factor correcting circuit;
Fig. 5 is a circuit diagram according to the three-phase and four-line up-down voltage power factor correcting circuit of first better embodiment of the present invention's conception;
Fig. 6 is the oscillogram of a known three-phase input voltage;
Fig. 7 is a circuit diagram according to the mode of operation 1 of the three-phase and four-line up-down voltage power factor correcting circuit of first better embodiment of the present invention's conception;
Fig. 8 is a circuit diagram according to the three-phase and four-line up-down voltage power factor correcting circuit of second better embodiment of the present invention's conception;
Fig. 9 to Figure 20 is respectively one according to the mode of operation 1 of the three-phase and four-line up-down voltage power factor correcting circuit of second better embodiment of the present invention's conception circuit diagram to mode of operation 12;
Figure 21 is a circuit diagram according to the three-phase and four-line up-down voltage power factor correcting circuit of the 3rd better embodiment of the present invention's conception;
Figure 22 is a circuit diagram according to the three-phase and four-line up-down voltage power factor correcting circuit of the 4th better embodiment of the present invention's conception; And
Figure 23 is a circuit diagram according to the three-phase and four-line up-down voltage power factor correcting circuit of the 5th better embodiment of the present invention's conception.
Embodiment
The invention will be further described below in conjunction with the drawings and specific embodiments.
In order to overcome the shortcoming of traditional three-phase three-wire system Buck+Boost PFC, the present invention proposes a kind of three-phase four-wire system that utilizes three separate single-phase, three level Buck-Boost pfc circuits to combine to control three-phase input current (the input power supply comprises a natural mid point) Buck+Boost pfc circuit, as shown in Figure 5, it has diode Ba1-Ba2, Bb1-Bb2, Bc1-Bc2, Da1-Da2, Db1-Db2, Dc1-Dc2, Da3-Da4, Db3-Db4, Dc3-Dc4, switch S a1-Sa4, Sb1-Sb4, Sc1-Sc4, inductance L a1-La2, Lb1-Lb2, Lc1-Lc2 and capacitor C 1-C2 and a center line N make the mid point of power supply be connected in the mid point (neutral point) of pfc circuit, and the mid point of this pfc circuit is the connected node of this capacitor C 1-C2.And this three-phase four-wire system Buck+Boost pfc circuit receives a three-phase input voltage, and it has one first phase voltage Va, one second phase voltage Vb and a third phase voltage Vc, and produces first output voltage+Vo and second output voltage-Vo.
Sort circuit is because the existence of center line makes three single-phase buck-boost pfc circuits be independent of each other, and is separate, i.e. A, and B, the C three-phase voltage can pass through three module independent operatings.Therefore control method is fairly simple, and the THD of circuit can accomplish satisfied effect, and it is higher relatively that efficient also can be done.Owing to the clamping of interface bus (bus) electric capacity intermediate point, therefore also be easy to accomplish the Parallel Control of several modules.Its concrete operation principle is seen following analysis:
Figure 6 shows that the waveform of a known three-phase input voltage, the amplitude of supposing output voltage V o here just in time is half of peak value of input voltage vin.We are divided into 12 intervals to last figure:
Following elder generation at length analyzes first interval operation principle.
(1)
The service area
Mode of operation in first service area is seen Fig. 7.The A phase voltage in first interval greater than zero and amplitude less than output voltage, so the Ba1 conducting, the A phase voltage enters the boost pattern, Sa1 is open-minded, Da1 turn-offs, Sa3 carries out copped wave to the A phase voltage, La1 is used for discharging and recharging of A phase voltage.When Sa3 opened, the A phase current charged to La1 by Va-＞Ba1-＞Sa1-＞La1-＞Sa3-＞N branch road.When Sa3 disconnected, the A phase current charged to capacitor C 1 by Va-＞Ba1-＞Sa1-＞La1-＞Da3-＞C1-＞N branch road.The C phase voltage in first interval greater than zero and amplitude greater than output voltage, so the BC1 conducting, the C phase voltage enters the buck pattern, Sc3 turn-offs, Dc3 is open-minded, Sc1 carries out copped wave to the C phase voltage, Lc1 is used for discharging and recharging of C phase voltage.When Sc1 opened, the C phase current charged to Lc1 by Vc-＞Bc1-＞Sc1-＞Lc1-＞Dc3-＞C1-＞N branch road.When Sc1 disconnected, the C phase current flow through Dc1-＞Lc1-＞Dc3-＞C1-＞N branch road, and Lc1 releases energy.And the B phase voltage is less than zero in interval 1, and amplitude is greater than output voltage; So the B phase current is the BUCK pattern as can be known, the Bb2 conducting; The B phase current charges to Lb2 by N-＞C2-＞Db4-＞Lb2-＞Sb2-＞Bb2-＞Vb when Sb2 opens, and the B phase current is by C2-＞Db4-＞Lb2-＞Db2 branch road when Sb2 turn-offs, and Lb2 releases energy.
All the other each interval operation principles are with interval one, so no longer describe in detail at this.
By last surface analysis as can be known: the present invention can carry out rectification to three-phase input voltage, and entire circuit has only a switch to make switch to switch when the buck pattern or during the boost pattern, and prior art has significantly reduced switching loss relatively.And because so output voltage requires lower than the voltage stress on the lower switch of traditional output voltage, can select the electronic device of low specification for use, voltage stress requires low switch conduction simultaneously, the very big raising of the less final efficient that can obtain overall operation of its conducting resistance and lower input current THD.Sort circuit is because the existence of center line makes three single-phase Buck-Boost pfc circuits be independent of each other, and is separate, so its control method is simpler relatively.
(2) a kind of improvement of the present invention
But the circuit that above-mentioned Fig. 5 proposed also has its shortcoming unavoidably: that is the utilance of components and parts is low.With A is example mutually, when the A phase voltage is timing Sa2, and Da2, Sa4 and Da4 do not use, and as A phase voltage Sa1 when negative, Da1, Sa3 and Da3 do not use.And sort circuit is made up of three single-phase Buck-Boost pfc circuits, so the component number that uses is many, system cost is higher, and system power density is lower.
Be utilance that improves element and component number and the cost that reduces system, the present invention has further proposed a kind of new three-phase Buck-Boost pfc circuit, as shown in Figure 8:
From Fig. 8 we as can be seen three-phase input voltage change by two single-phase Buck-Boost PFC modules.D1A, D2A, D1C, D2C are diode, and wherein D1A, D2A are used for the rectification of A phase current, and D1C, D2C are used for the rectification of C phase current.D1B, D2B, D3B, D4B are thyristor, are used for the rectification of B phase current.S11, S12, S13, S14, S21, S22, S23, S24 are power switch, and (duty ratio) carries out copped wave according to required duty ratio, make the required voltage of system's output.In this integrated circuit, thyristor accomplishes that rectification function also reaches the function of switch.Concrete operation principle is surface analysis as follows:
(1)
The service area
Mode of operation 1 in first service area is seen shown in Figure 9.The A phase voltage in first interval greater than zero and amplitude less than output voltage, so the D1A conducting, the A phase voltage enters the boost pattern, S11 is open-minded, D11 turn-offs, S13 carries out copped wave to the A phase voltage, L11 is used for discharging and recharging of A phase voltage.When S13 opened, the A phase current charged to L11 by Va-＞D1A-＞S11-＞L11-＞S13-＞N branch road.When S13 disconnected, the A phase current charged to capacitor C 1 by Va-＞D1A-＞L11-＞D13-＞C1-＞N branch road.The C phase voltage in first interval greater than zero and amplitude greater than output voltage, so the D1C conducting, the C phase voltage enters the buck pattern, S23 turn-offs, D23 is open-minded, S21 carries out copped wave to the C phase voltage, L21 is used for discharging and recharging of C phase voltage.When S21 opened, the C phase current charged to L21 by Vc-＞D1C-＞S21-＞L21-＞D23-＞C1-＞N branch road.When S21 disconnected, the C phase current flow through D21-＞L21-＞D23-＞C1-＞N branch road and L21 releases energy.And in interval 1 the B phase voltage less than zero and amplitude greater than output voltage, so the B phase current is the BUCK pattern as can be known, and S12 is inoperative with the C phase voltage mutually to A with S22 as can be known by last surface analysis, so we can carry out the control of BUCK pattern to the B phase current with S12 and S22, this moment, S14 and S24 turn-offed, D23 and D24 conducting.L12 and L22 are used for discharging and recharging of B phase voltage.Need to prove especially in this interval, we can only carry out copped wave with S12 to the B phase voltage, D2B conducting this moment, D4B turn-offs, the B phase current charges to L12 by N-＞C2-＞D14-＞L12-＞S12-＞D2B-＞Vb when S12 opens, the B phase current is by C2-＞D14-＞L12-＞D12 branch road when S12 turn-offs, and L12 releases energy.Also can only carry out copped wave to the B phase voltage with S22.D4B conducting this moment, D2B turn-offs.When S22 opened, the B phase current carried out towards energy L22 by N-＞C2-＞D24-＞L22-＞S22-＞D4B-＞Vb.When S4 turn-offed, the B phase current released energy by C2-＞D24-＞L22-＞D22 branch road and L12.Also can carry out copped wave to the B phase current with S12 and S22 acting in conjunction, this moment thyristor D2B and all conductings of D4B, the B phase current divides two branch road streams.
All the other each interval operation principles do not elaborate here with interval (1), and the mode of operation simplified structure of each space transformer is as follows shown in the face:
(2)
The service area
In like manner, see shown in Figure 10 in the mode of operation 2 of secondary service area.
(3)
The service area
Be in the mode of operation 3 of the 3rd service area, then as shown in figure 11.
(4)
The service area
And in the mode of operation 4 of the 4th service area, then as shown in figure 12.
(5)
The service area
Mode of operation 5 in the 5th service area is shown in Figure 13.
(6)
The service area
Similarly, see shown in Figure 14 in the mode of operation 6 of the 6th service area.
(7)
The service area
Then, the mode of operation 7 in the 7th service area, as shown in figure 15.
(8)
The service area
As for the mode of operation 8 of the 8th service area, as shown in figure 16.
(9)
The service area
The position is in the mode of operation 9 of the 9th service area, for shown in Figure 17.
(10)
The service area
The mode of operation 10 of its tenth service area, as shown in Figure 18.
(11)
The service area
And in the mode of operation 11 of the 11 service area, it is shown in Figure 19.
(12)
The service area
The mode of operation 12 of relevant the 12 service area, then as shown in figure 20.
According to above analysis as can be seen the present invention have following characteristics:
1. has three-phase Buck-Boost PFC function, low THD, high efficiency;
2. the Buck-Boost pfc circuit after improving only utilizes two single-phase Buck-Boost pfc circuits, can be to the three-phase input voltage rectification, thus significantly reduced the quantity of system's components and parts, improved the utilance of components and parts, also improve simultaneously the power density of system, reduced the cost of system;
3. every phase current is controlled separately, is easy to realize redundant system;
4 are easy to realize the integrated of PFC and DC/DC, are specially adapted to the occasion of UPS (UPS), see execution mode what follows for details.
The present invention's narration of the 3rd to the 6th better embodiment as back:
(1) front is an example with circuit shown in Figure 8 all to the analysis of this circuit, and the three-phase alternating current potential source is the three-phase and four-line formula among Fig. 8.And if the three-phase alternating current potential source is a phase three-wire three in actual applications, then can construct unsteady mid point with the capacitor C 3-C5 of three wye connections at input, thereby phase three-wire three is become three-phase and four-line, as shown in figure 21, the N here is exactly the mid point that constructs, and this belongs to the scope of the present invention's the 3rd better embodiment.
(2) when input voltage cuts off the power supply, we need continue normally to move to power supply assurance system of system with battery, Figure 22 is two Battery pack Bi1 and Bi2 are connected to three single-phase three level up-down voltage power factor correcting circuits by six thyristor D1I-D6I and center line N module, and power for respectively the positive-negative half-cycle of three-phase and four-line module by two Battery pack Bi1 and Bi2, this belongs to the scope of the present invention's the 4th better embodiment.
(3) Figure 23 is two Battery packs are connected to two single-phase three level up-down voltage power factor correcting circuits by four thyristor D1I-D2I and D4I-D5I and center line N module, power for respectively the positive-negative half-cycle of three-phase and four-line module by two Battery pack Bi1 and Bi2, this belongs to the scope of the present invention's the 5th better embodiment.
Therefore, above Figure 21 also belongs to the scope of better embodiment of the present invention to several structures shown in Figure 23.
In sum, the invention discloses a kind of three-phase boosting and deboosting power factor correction circuit and control method thereof, it is to utilize three separate single-phase, three level up-down voltage power factor correcting circuits to form, owing to have a center line, so this first, this second with the 3rd single-phase up-down voltage power factor correcting circuit be independent of each other the running that is mutually independent; Can be used for improving the total harmonic distortion and its efficient of raising of three-phase boosting and deboosting power factor correction circuit, so three-phase boosting and deboosting power factor correction circuit provided by the present invention relatively have efficient higher, reduce component number, improve the components and parts utilance, simultaneously also improve the power density of system, and reduced the cost of system; Other has every phase current and controls separately, is easy to realize redundant system, and integrated with PFC and DC/DC, and is specially adapted to UPS advantages such as (UPS); Thereby have its progressive and novelty really.
The above; only for the preferable embodiment of the present invention, but protection scope of the present invention is not limited thereto, and anyly is familiar with the people of this technology in technical scope disclosed in this invention; the variation that can expect easily or replacement all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection range of claim.
Claims (11)
1. a three-phase boosting and deboosting power factor correction circuit is characterized in that, comprises:
One first single-phase up-down voltage power factor correcting circuit receives one of three-phase voltage first phase voltage, and has one first output, a mid point and one second output, is used to export one first and one second output voltage;
One second single-phase up-down voltage power factor correcting circuit receives one of described three-phase voltage second phase voltage, and is coupled in described first output, described mid point and described second output;
One the 3rd single-phase up-down voltage power factor correcting circuit receives one of described three-phase voltage third phase voltage, and is coupled in described first output, described mid point and described second output;
One first output capacitance is coupled in described first output and described mid point;
One second output capacitance is coupled in described mid point and described second output; And
One center line is coupled in described mid point,
Each of wherein said first to the described the 3rd single-phase up-down voltage power factor correcting circuit is single-phase three level up-down voltage power factor correcting circuits, and these single-phase three level up-down voltage power factor correcting circuits more comprise:
One first to 1 the 6th diode, each this diode has an anode and a negative electrode, wherein this first with this second diode be used for rectification, the anode of this first diode is coupled in the negative electrode of this second diode, and the negative electrode of the 4th diode is coupled in the anode of the 3rd diode;
One first to 1 the 4th switch, each this switch has one first end and one second end, wherein this first end of this first switch is coupled in the negative electrode of the 3rd diode, this second end of this first switch is coupled in the negative electrode of first diode, this first end of this second switch is coupled in the anode of second diode, this second end of this second switch is coupled in the anode of the 4th diode, this first end of the 3rd switch is coupled in the negative electrode of the 4th diode, this second end of the 3rd switch is coupled in the anode of the 5th diode, this first end of the 4th switch is coupled in the negative electrode of the 6th diode, this second end of the 4th switch is coupled in this first end of the 3rd switch, the negative electrode of the 5th diode is coupled in described first output, the anode of the 6th diode is coupled in described second output, and described mid point is coupled in this first end of the 3rd switch; And
One first to 1 second inductance, each this inductance has one first and one second end, wherein this first end of this first inductance is coupled in the negative electrode of the 3rd diode, this second end of this first inductance is coupled in second end of the 3rd switch, this first end of this second inductance is coupled in the anode of the 4th diode, and this second end of this second inductance is coupled in first end of the 4th switch.
2. three-phase boosting and deboosting power factor correction circuit as claimed in claim 1 is characterized in that,
Described first phase voltage, described second phase voltage and described third phase voltage are respectively an A phase voltage, a B phase voltage and a C phase voltage, and described first with described second output voltage have a positive voltage value and a negative value respectively.
3. three-phase boosting and deboosting power factor correction circuit as claimed in claim 1 is characterized in that,
More comprise one first to 1 the 6th thyristor and one first and one second battery, wherein each this thyristor has an anode and a negative electrode, each this battery has an anodal and negative pole, described center line has one first end and one second end, this second end of this center line is coupled in this mid point, what this anode of this first to the 3rd thyristor all was coupled in this first battery should positive pole, this negative electrode of this first to the 3rd thyristor is coupled in the negative electrode of described first diode of described first to the described the 3rd single-phase up-down voltage power factor correcting circuit respectively, this positive pole of this second battery is coupled in this negative pole of this first battery, this negative electrode of the 4th to the 6th thyristor all is coupled in this negative pole of this second battery, this anode of the 4th to the 6th thyristor is coupled in the anode of described second diode of the described the 3rd to described first single-phase up-down voltage power factor correcting circuit respectively, and this positive pole of this second battery is coupled in this first end of this center line.
4. a three-phase boosting and deboosting power factor correction circuit is characterized in that, comprises:
One first single-phase up-down voltage power factor correcting circuit receives one of three-phase voltage first phase voltage, and has one first and one second input, one first output, a mid point and one second output, is used to export one first and one second output voltage;
One second single-phase up-down voltage power factor correcting circuit receives one of described three-phase voltage third phase voltage, has one first and one second input, and is coupled in described first output, described mid point and described second output;
One first to 1 the 4th thyristor, each this thyristor has an anode and a negative electrode, this anode of this first thyristor wherein, this negative electrode of this second thyristor, this anode of the 3rd thyristor and this negative electrode of the 4th thyristor all are used to receive second phase voltage, this negative electrode of this first thyristor and this anode of this second thyristor are coupled in described first and second input of the described first single-phase up-down voltage power factor correcting circuit respectively, and this anode of this negative electrode of the 3rd thyristor and the 4th thyristor also is coupled in described first and second input of the described second single-phase up-down voltage power factor correcting circuit respectively;
One first output capacitance is coupled in described first output and described mid point;
One second output capacitance is coupled in described mid point and described second output; And
One center line is coupled in described mid point,
Wherein said first is single-phase three level up-down voltage power factor correcting circuits with each of the described second single-phase up-down voltage power factor correcting circuit, and these single-phase three level up-down voltage power factor correcting circuits more comprise:
One first to 1 the 6th diode, each this diode has an anode and a negative electrode, wherein this first with this second diode be used for rectification, this anode of this first diode is coupled in this negative electrode of this second diode, and this negative electrode of the 4th diode is coupled in this anode of the 3rd diode;
One first to 1 the 4th switch, each this switch has one first end and one second end, wherein this first end of this first switch is coupled in the negative electrode of the 3rd diode, this second end of this first switch is coupled in the negative electrode of first diode, this first end of this second switch is coupled in the anode of second diode, this second end of this second switch is coupled in the anode of the 4th diode, this first end of the 3rd switch is coupled in the negative electrode of the 4th diode, this second end of the 3rd switch is coupled in the anode of the 5th diode, this first end of the 4th switch is coupled in the negative electrode of the 6th diode, this second end of the 4th switch is coupled in this first end of the 3rd switch, the negative electrode of the 5th diode is coupled in described first output, the anode of the 6th diode is coupled in described second output, and described mid point is coupled in this first end of the 3rd switch; And
One first to 1 second inductance, each this inductance has one first and one second end, wherein this first end of this first inductance is coupled in the negative electrode of the 3rd diode, this second end of this first inductance is coupled in second end of the 3rd switch, this first end of this second inductance is coupled in the anode of the 4th diode, and this second end of this second inductance is coupled in first end of the 4th switch.
5. three-phase boosting and deboosting power factor correction circuit as claimed in claim 4 is characterized in that,
More comprise one first to 1 the 3rd input capacitance, wherein each this input capacitance and described center line all have one first end and one second end, this second end of this center line is coupled in this mid point, this first termination of this first input capacitance is received described first phase voltage, this second end of this first input capacitance is coupled in this first end of this center line, this first termination of this second input capacitance is received second phase voltage, this second end of this second input capacitance is coupled in this second end of this first input capacitance, this first termination of the 3rd input capacitance is received described third phase voltage, and this second end of the 3rd input capacitance is coupled in this second end of this second input capacitance.
6. three-phase boosting and deboosting power factor correction circuit as claimed in claim 4 is characterized in that,
More comprise one the 5th to 1 the 8th thyristor and one first and one second battery, wherein each this thyristor has an anode and a negative electrode, each this battery has an anodal and negative pole, described center line has one first end and one second end, this second end of this center line is coupled in described mid point, what this anode of the 5th to the 6th thyristor all was coupled in this first battery should positive pole, the 5th with this negative electrode of the 6th thyristor be coupled in respectively described first with the negative electrode of first diode of the described second single-phase up-down voltage power factor correcting circuit, this positive pole of this second battery is coupled in this negative pole of this first battery, the 7th all is coupled in this negative pole of this second battery with this negative electrode of the 8th thyristor, the 7th with this anode of the 8th thyristor be coupled in respectively this second with the anode of second diode of this first single-phase up-down voltage power factor correcting circuit, and this positive pole of this second battery is coupled in this first end of this center line.
7. a control method that is used for a three-phase boosting and deboosting power factor correction circuit is characterized in that,
Described circuit comprises one first single-phase up-down voltage power factor correcting circuit, receive one of three-phase voltage first phase voltage, have one first output, a mid point, one second output and a center line, this center line is coupled in this mid point, be used to export one first and one second output voltage, and described control method comprises following step:
When one of a positive half cycle of described first phase voltage amplitude during less than one of described first output voltage amplitude, make the described first single-phase up-down voltage power factor correcting circuit carry out one and boost, export this amplitude of this first output voltage according to this;
When one of a positive half cycle of described first phase voltage amplitude during greater than one of described first output voltage amplitude, make the described first single-phase up-down voltage power factor correcting circuit carry out a step-down, export this amplitude of this first output voltage according to this;
When an one of negative half period of described first phase voltage amplitude during less than one of described second output voltage amplitude, make the described first single-phase up-down voltage power factor correcting circuit carry out one and boost, export this amplitude of this second output voltage according to this; And
When an one of negative half period of described first phase voltage amplitude during greater than one of described second output voltage amplitude, make the described first single-phase up-down voltage power factor correcting circuit carry out a step-down, export this amplitude of this second output voltage according to this.
8. control method as claimed in claim 7 is characterized in that,
Described three-phase boosting and deboosting power factor correction circuit more comprises one second single-phase up-down voltage power factor correcting circuit, receive one of described three-phase voltage second phase voltage, and be coupled in described first output, described mid point, described second output and described center line, be used to export described first with described second output voltage, and described control method more comprises following step:
When one of a positive half cycle of described second phase voltage amplitude during less than one of described first output voltage amplitude, make the described second single-phase up-down voltage power factor correcting circuit carry out one and boost, export this amplitude of this first output voltage according to this;
When one of a positive half cycle of described second phase voltage amplitude during greater than one of described first output voltage amplitude, make the described second single-phase up-down voltage power factor correcting circuit carry out a step-down, export this amplitude of this first output voltage according to this;
When an one of negative half period of described second phase voltage amplitude during less than one of described second output voltage amplitude, make the described second single-phase up-down voltage power factor correcting circuit carry out one and boost, export this amplitude of this second output voltage according to this; And
When an one of negative half period of described second phase voltage amplitude during greater than one of described second output voltage amplitude, make the described second single-phase up-down voltage power factor correcting circuit carry out a step-down, export this amplitude of this second output voltage according to this.
9. a three-phase power factor correcting circuit is characterized in that, comprise,
One first electric capacity has one first voltage output end;
One second electric capacity has one second voltage output end, and is electrically connected in series described first electric capacity in a connection mid point;
One center line is electrically connected on described connection mid point;
One first to 1 the 3rd single-phase power factor correcting pfc converter receives a three-phase alternating current input voltage respectively, and exports the direct current voltage with a setting voltage value, and this setting voltage value is less than a peak value of this three-phase alternating current input voltage;
Wherein each pfc converter comprises one first and one second input and a rectifier bridge, is used for the described three-phase alternating current input voltage of rectification, and exports one first commutating voltage and one second commutating voltage by one first and one second rectification output end respectively;
One first step-up/step-down circuit is coupled in described first rectification output end and described center line, is used to regulate described first commutating voltage, and exports described first voltage output end of this setting voltage value to described first electric capacity; And
One second step-up/step-down circuit is coupled in described second rectification output end and described center line, is used to regulate described second commutating voltage, and exports second voltage output end of this setting voltage value to described second electric capacity; And
One first to 1 the 6th thyristor and one first and one second battery, wherein each this thyristor has an anode and a negative electrode, each this battery has an anodal and negative pole, described center line has one first end and one second end, this second end of this center line is coupled in described mid point, what this anode of this first to the 3rd thyristor all was coupled in described first battery should positive pole, this negative electrode of this first to the 3rd thyristor is coupled in the described first described first input end to described the 3rd pfc converter respectively, this positive pole of this second battery is coupled in this negative pole of this first battery, this negative electrode of the 4th to the 6th thyristor all is coupled in this negative pole of this second battery, this anode of the 4th to the 6th thyristor is coupled in the described the 3rd described second input to described first pfc converter respectively, and this positive pole of this second battery is coupled in this first end of this center line.
10. three-phase power factor correcting circuit as claimed in claim 9 is characterized in that,
Each rectifier bridge comprises a gate-controlled switch, and described first and second battery is connected to described first to described the 3rd pfc converter by described first to described the 6th thyristor, and provides an electric energy when described three-phase alternating current input voltage is undesired.
11. a three-phase power factor correcting circuit is characterized in that, comprises:
One first electric capacity has one first voltage output end;
One second electric capacity has one second voltage output end, and is electrically connected in series described first electric capacity in a connection mid point;
One center line is electrically connected on described connection mid point;
One first and one second power factor correction pfc converter is connected respectively to one first mutually and one second cross streams input voltage, and exports a setting voltage respectively to described first and described second electric capacity;
Wherein each pfc converter comprises one first and one second input and a rectifier bridge, be respectively applied for rectification this first with this second AC-input voltage, and export one first commutating voltage and one second commutating voltage by first and second rectification output ends of this rectifier bridge respectively;
One first step-up/step-down circuit is coupled in described first rectification output end and described center line, is used to regulate described first commutating voltage and exports described first voltage output end of described setting voltage value to described first electric capacity; And
One second step-up/step-down circuit is coupled in described second rectification output end and described center line, regulates described second commutating voltage, and exports described second voltage output end of described setting voltage value to described second electric capacity; And
One first to 1 the 8th thyristor and one first and one second battery, wherein each this thyristor has an anode and a negative electrode, each this battery has an anodal and negative pole, described center line has one first end and one second end, this second end of this center line is coupled in described mid point, this anode of this first thyristor, this negative electrode of this second thyristor, this anode of the 3rd thyristor and this negative electrode of the 4th thyristor all are used to receive second phase voltage of described three-phase alternating current input voltage, this negative electrode of this first thyristor and this anode of this second thyristor are coupled in described first and second input of described first pfc converter respectively, and this negative electrode of the 3rd thyristor and this anode of the 4th thyristor also are coupled in described first and second input of described second pfc converter respectively, what this anode of the 5th to the 6th thyristor all was coupled in this first battery should positive pole, the 5th is coupled in the described first input end of described first pfc converter and the described first input end of described second pfc converter respectively with this negative electrode of the 6th thyristor, this positive pole of this second battery is coupled in this negative pole of this first battery, the 7th all is coupled in this negative pole of this second battery with this negative electrode of the 8th thyristor, the 7th is coupled in described second input of described second pfc converter and described second input of described first pfc converter respectively with this anode of the 8th thyristor, and this positive pole of this second battery is coupled in this first end of this center line
Wherein said first and each rectifier bridge of described second pfc converter comprise at least one controlled rectification switch, one third phase AC-input voltage by described first pfc converter at least one controlled rectification switch and at least one controlled rectification switch of described second pfc converter be connected respectively to this first and this second pfc converter, described first is single-phase three level up-down voltage power factor correcting circuits with each of described second pfc converter, and these single-phase three level up-down voltage power factor correcting circuits more comprise:
One first to 1 the 6th diode, each this diode has an anode and a negative electrode, wherein this first with this second diode be used for rectification, this anode of this first diode is coupled in this negative electrode of this second diode, and this negative electrode of the 4th diode is coupled in this anode of the 3rd diode;
One first to 1 the 4th switch, each this switch has one first end and one second end, wherein this first end of this first switch is coupled in the negative electrode of the 3rd diode, this second end of this first switch is coupled in the negative electrode of first diode, this first end of this second switch is coupled in the anode of second diode, this second end of this second switch is coupled in the anode of the 4th diode, this first end of the 3rd switch is coupled in the negative electrode of the 4th diode, this second end of the 3rd switch is coupled in the anode of the 5th diode, this first end of the 4th switch is coupled in the negative electrode of the 6th diode, this second end of the 4th switch is coupled in this first end of the 3rd switch, the negative electrode of the 5th diode is coupled in described first output, the anode of the 6th diode is coupled in described second output, and described mid point is coupled in this first end of the 3rd switch; And
One first to 1 second inductance, each this inductance has one first and one second end, wherein this first end of this first inductance is coupled in the negative electrode of the 3rd diode, this second end of this first inductance is coupled in second end of the 3rd switch, this first end of this second inductance is coupled in the anode of the 4th diode, and this second end of this second inductance is coupled in first end of the 4th switch.
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| CN112821774A (en) * | 2021-02-02 | 2021-05-18 | 深圳弘德智能有限公司 | Converter |
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