CN101566641A - Power system transmission line parameter synchronic measurement and recording device - Google Patents
Power system transmission line parameter synchronic measurement and recording device Download PDFInfo
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Abstract
The invention provides a power system transmission line parameter synchronic measurement and recording device. An IEC61850 model is uniformly established on a server end according to IEC61850 standard and a fault wave-recording logic model and a transmission line parameter measurement logic module with the same hardware platform are set on the server end and the system configuration is realized according to IEC61850-6 and an independent used configuration tool is formed. The fault wave-recording and transmission line parameter measurements respectively model different logic devices according to IEC61850 standard, namely the data record is realized when the power system is in failure and the synchro measurement of the power system transmission line parameters is realized, thereby solving the problem that the data, parameter read by manpower out-of-step for many times are not accurate in power failure. The accuracy of the line parameter is increased. The power system transmission line parameter synchronic measurement and recording device can be widely used for various application fields such as line wave recording, main-change wave recording, set wave recording, and transmission line parameter synchro measurement.
Description
Technical field
The present invention relates to monitoring and record, especially relate to a kind of power system transmission line parameter synchronic measurement and pen recorder.
Background technology
China formal employing IEC 61850 was a power industry standard in 2007, set about changing secondary device data repeated acquisition, lacked data integration and processing, the present situation that lacks message exchange and share.Existing oscillograph can be for the user makes a strategic decision in time, accurately provides safeguard in the data integration of IED equipment room and message exchange, but just sends data analysis to main website under failure condition, can not carry out synchro measure to power system transmission line parameter.Existing line parameter circuit value measuring method is for have a power failure measuring, and promptly institute survey line road must have a power failure, and breaks away from electrical network, and the positive sequence of circuit, Zero sequence parameter are to record by different experiment with measuring.By circuit is applied experiment power supply, utilize various table instrumentations such as voltage table, reometer, power meter, frequency meter to measure each state of circuit, through the artificial repeatedly asynchronous measurement data that reads, utilize corresponding formulas to calculate each corresponding line parameter circuit value then.Labor workload is big, and the optimization distribution of normal load power supply of influence and trend has also that measuring equipment is heavy, complex operation, drawback such as waste time and energy.Especially the potential safety hazard that before and after measuring, has staff and electrical equipment in all multioperations in the cut-offfing of circuit, ground connection, closure and the measuring process, and, in the measurement circuit two ends and the scheduling between generally by wireless link, reliability is relatively poor, easily causes the error of cooperation aspect.Have not yet to see failure wave-recording and the transmission line parameter synchronic measurement that to have identical hardware platform and carry out unified Modeling, realize the transmission line parameter synchronic measurement and the pen recorder of interconnected network according to IEC 61850 standards.
Summary of the invention
Technical matters to be solved by this invention is the defective that remedies above-mentioned prior art, a kind of power system transmission line parameter synchronic measurement and pen recorder based on IEC 61850 proposed, failure wave-recording and transmission line parameter synchronic measurement are integrated in same device under IEC 61850 frameworks, with convenient power system transmission line parameter synchronic measurement and the failure logging realized.
Technical matters of the present invention is solved by the following technical programs.
This power system transmission line parameter synchronic measurement and pen recorder adopt client-server architectures, and supervisor is a client.
The characteristics of this power system transmission line parameter synchronic measurement and pen recorder are:
Set up IEC 61850 models at server end according to IEC 61850 standard-required unifications, be provided with failure wave-recording logic module and transmission line parameter synchronic measurement logic module with same hardware platform, the failure wave-recording logic module starts judgement according to result of calculation, then generate the fault file if any starting, record transient state fault, dynamic data are finished the off-line analysis to recorder data; The transmission line parameter synchronic measurement logic module is passed through system voltage, electric current phasor phase angle and frequency, power on-line measurement, and to measurement result mark gps clock, by to analytical calculations single-ended and the both-end data, realize transmission line parameter synchronic measurement.Both record electricity system failure data also realized transmission line parameter synchronic measurement under non-failure conditions, met synchronous on-line measurement of power system transmission line parameter and transient state record and the integrated requirement of dynamically recording under IEC 61850 frameworks.
Described transmission line parameter comprises positive sequence impedance, zero sequence impedance, positive sequence electric capacity, zero sequence electric capacity, mutual inductive impedance, coupling capacitance.
The communication simultaneously of described server via Ethernet and a plurality of client, collecting part receives simulating signal or digital signal, carries out real-time operation.The described client pair model relevant with client requests shines upon.Described server end can both be connected with protection information substation with described client, and communications protocol meets IEC 61850-8, is mapped as the MMS service, realizes system configuration according to IEC61850-6, and forms the independent configuration tool of using.
Technical matters of the present invention is solved by following further technical scheme.
Be provided with the acquired signal multiplex circuit that comprises collection plate, simulating signal tablet and digital signal tablet.
Also be provided with comprise GPS to the time plate the systematic unity synchronous clock circuit.
Described failure wave-recording logic module, its composition comprise the following compliance logic node according to IEC 61850-7-4 standard definition:
1) LPHD physical unit infologic node is used to describe the physical message of this device;
2) LLN0 logic node is used for the common information that access fault is recorded the ripple logical device;
3) a RDRE disturbance writing function logic node is used to describe the failure wave-recording function;
4) at least one RADR disturbance record analog quantity channel logic node, corresponding one of each analog quantity channel is used to describe the analog quantity channel of failure logging;
5) at least one RBDR disturbance recording status amount channel logic node, corresponding one of each quantity of state passage is used to describe the quantity of state passage of failure logging;
6) at least one RFLO localization of fault logic node, corresponding one of each bar circuit is used for the trouble spot of location line fault under the situation of breaking down.
Described failure wave-recording logic module, it is formed and also comprises following IEC 61850 expansion logic nodes:
1) perturbographic system frequency quantity logic node is used for the generation systems frequency upper limit more, the processing when lower limit, mutation failure more takes place;
2) at least one perturbographic system voltage logic node, corresponding one of each system voltage amount, the processing when being used for generation systems electric voltage exception fault;
3) at least one disturbance record electricity flows logic node, corresponding one of each magnitude of current, the processing when being used for generation systems current anomaly fault;
4) at least one disturbance record transformer logic node, corresponding one of each main-transformer, the processing when being used to the transformation abnormal failure takes place.
Described transmission line parameter synchronic measurement logic module, its composition comprise the following compliance logic node according to the IEC61850-7-4 standard definition:
1) LPHD physical unit infologic node is used to describe the physical message of this device;
2) LLN0 logic node is used to visit the common information of transmission line parameter synchronic measurement logical device;
Described transmission line parameter synchronic measurement logic module, it is formed and also comprises following IEC61850 expansion logic node:
At least one transmission line parameter is measured logic node, and corresponding one of each bar circuit is used to write down the transmission line parameter of synchro measure.
The external input signal of described server is gps clock and voltage, current signal, and input pattern signal comprises:
1) simulating signal:, reach by the switching value signal of parallel cable with the form access of idle contact through traditional sampling voltage, the current analog signal that the mutual inductor progress of disease is come;
2) IEC 61850-9-1 digital signal and GOOSE signal: the GOOSE signal that meets point-to-point digital signal of the unidirectional multichannel of IEC 61850-9-1 serial and GOOSE Information Network;
3) IEC 61850-9-2 digital signal and GOOSE signal: meet digital signal and the GOOSE message of IEC 61850-9-2, by the process bus comprehensive transmission.
Technical matters of the present invention is solved by following further technical scheme.
Described collection plate comprises the DSP module, FPGA-1 acquisition control module and the FPGA-2 time control module that have SDRAM, FLASH.Wherein FPGA is the english abbreviation of field programmable gate array (Field Programmable Gate Array).The collection of FPGA-1 acquisition control module gauge tap amount, analog quantity; The realization sampled point is beaten markers, is started calculating, identified event and measurement synchronization phasor; And pass through the HPI bus transfer data to monitor board; The FPGA-1 acquisition control module directly connects backboard and gathers bus, all analog quantitys and switching value are carried out synchronized sampling, and image data added that markers is kept in the internal buffer, and putting when the internal buffer and send interruption to DSP after full, notice DSP takes image data away.The FPGA-2 time control module is decoded to the time signal that receives, and to the time filtering of receiving and punctual, the time after handling is issued the FPGA-1 acquisition control module by 8 bit data bus.
Described simulating signal tablet comprises analog signal detection module, AD sampling module, the FPGA-3 of cascade and the power supply detection module that power supply is provided.
Described digital signal tablet comprises network processing unit, optical fiber transceiver module, PCI network interface card, FPGA-4, FLASH BOOT ROM, DDRRAM and RS232 driver.
Described GPS to the time plate comprise FPGA-5, CPU and OCXO, the synchronous clock of systematic unity is provided.Be used to receive 1PPS, IRIG-B, serial time message, utilize the taming local clock of signal input time, generate high-precision 1PPS, IRIG-B (DC), 10kHz reference clock signal, 1MHz reference clock signal.
Described supervisor is any PC or industrial computer.
The beneficial effect that the present invention is compared with the prior art is:
Apparatus of the present invention respectively are modeled as different logical device with failure wave-recording with transmission line parameter synchronic measurement according to IEC 61850 standards, both realized the data recording under the electric power system fault situation, also realized power system transmission line parameter synchronic measurement.Solved existing power failure and measured the manually repeatedly asynchronous measurement data that reads, difficult parameters is with the problem of accurate measurement.Improve the accuracy of line parameter circuit value.Apparatus of the present invention can be widely used in circuit record ripple, main transformer record ripple, and unit record ripple reaches various application scenarios such as power system transmission line parameter synchronic measurement.Only need as required software to be carried out simple configuration and get final product when engineering is used, need not any complicated operations, engineering is used very convenient flexible.Can produce the high-precise synchronization clock, to the time precision less than 1 μ s, punctual precision is less than 10ms/24h; The networking and the data remote mode that possess flexibility and reliability adopt standard IEC 61850-8 or 103 stipulations.
Description of drawings
Fig. 1 is the system construction drawing of the specific embodiment of the invention;
Fig. 2 is the theory diagram of the collection plate among Fig. 1;
Fig. 3 is the theory diagram of the simulating signal tablet among Fig. 1;
Fig. 4 is the theory diagram of the digital signal tablet among Fig. 1;
Fig. 5 be among Fig. 1 GPS to the time plate theory diagram;
Fig. 6 is the monitor board theory diagram among Fig. 1;
Fig. 7 is the course of work synoptic diagram of the specific embodiment of the invention.
Embodiment
Below the contrast accompanying drawing and in conjunction with embodiment the present invention is further illustrated.
Fig. 1 is the system construction drawing of the specific embodiment of the invention, provides two kinds of input pattern signals among the figure: merge cells+GOOSE net, or the signal of the conventional P T/CT progress of disease+switching value rhabdion point.
This embodiment is set up IEC 61850 models at server end according to IEC 61850 standard-required unifications, be provided with failure wave-recording logic module and transmission line parameter synchronic measurement logic module with same hardware platform, the failure wave-recording logic module starts judgement according to result of calculation, then generate the fault file if any starting, record transient state fault, dynamic data are finished the off-line analysis to recorder data; The transmission line parameter synchronic measurement logic module uses the line related parameter algorithm to realize single-ended and both-end transmission line parameter synchronic measurement by to system voltage, electric current phasor phase angle and frequency, power on-line measurement and to measurement result mark gps clock then.Both record electricity system failure data also realized transmission line parameter synchronic measurement under non-failure conditions, met synchronous on-line measurement of power system transmission line parameter and transient state record and the integrated requirement of dynamically recording under IEC 61850 frameworks.
The communication simultaneously of described server via Ethernet and a plurality of client, collecting part receives simulating signal or digital signal, carries out real-time operation.The described client pair model relevant with client requests shines upon.Described server end can both be connected with protection information substation with described client, and communications protocol meets IEC 61850-8, is mapped as the MMS service, realizes system configuration according to IEC61850-6, and forms the independent configuration tool of using.
Be provided with the acquired signal multiplex circuit that comprises collection plate, simulating signal tablet and digital signal tablet.
Also be provided with comprise GPS to the time plate the systematic unity synchronous clock circuit.
Collection plate as shown in Figure 2 comprises the DSP module, FPGA-1 acquisition control module and the FPGA-2 time control module that have SDRAM, FLASH.The collection of FPGA acquisition control module gauge tap amount, analog quantity; The realization sampled point is beaten markers, is started calculating, identified event and measurement synchronization phasor; And pass through the HPI bus transfer data to monitor board; The FPGA-1 acquisition control module directly connects backboard and gathers bus, all analog quantitys and switching value are carried out synchronized sampling, and image data added that markers is kept in the internal buffer, and putting when the internal buffer and send interruption to DSP after full, notice DSP takes image data away.The FPGA-2 time control module is decoded to the time signal that receives, and to the time filtering of receiving and punctual, the time after handling is issued the FPGA-1 acquisition control module by 8 bit data bus.
Simulating signal tablet as shown in Figure 3 comprises analog signal detection module, AD sampling module, the FPGA-3 of cascade and the power supply detection module that power supply is provided.Analog signal detection module receives after 32 tunnel the simulating signal, take current simulating signal by sampling switch, by sampling holder signal is kept, FPGA-3 control AD sampling module is 16 digital signal with each road analog signal conversion, and after image data gathered, the FPGA-3 that is uploaded to by 16 bit data bus handled.
Digital signal tablet as shown in Figure 4 comprises network processing unit, optical fiber transceiver module, PCI network interface card, FPGA-4, FLASH BOOT ROM, DDRRAM and RS232 driver.Collection plate will meet IEC 61850-9-1 by the backboard parallel bus, the configuration data of IEC 61850-9-2 digital signal and GOOSE signal writes in the dual port RAM of FPGA-4 inside, the digital signal tablet detect configuration data effectively after, receive two-way according to configuration information indication simultaneously by two network interfaces of integrated two network interfaces of network processing unit and pci bus expansion and meet IEC 61850-9-1, IEC 61850-9-2 digital signal and GOOSE signal-GOOSE message and merge cells data, put in order after from message, extracting the data of system's needs according to configuration data again, data are put into the dual port RAM buffer zone, wait for that collection plate reads.Corresponding dual port RAM unit feedback digital signal tablet can be set after collection plate reads take data away, by the CPU release dual port RAM buffer zone of FPGA-4.Even when having one road signal to make mistakes, owing to be to receive two-way simultaneously, data acquisition still can true(-)running.
GPS as shown in Figure 5 to the time plate comprise FPGA-5, CPU and OCXO, the synchronous clock of systematic unity is provided.Be used to receive 1PPS, IRIG-B, serial time message, utilize the taming local clock of signal input time, generate high-precision 1PPS, IRIG-B (DC), 10kHz reference clock signal, 1MHz reference clock signal.Satellite-signal can accurately be kept time after disappearing; After satellite-signal recovers, can automatically switch to GPS to the time mode.Utilize the taming local clock of signal input time, export the high precision time frequency signal by the logical operation of FPGA-5 again.
FPGA-5 adopts the EP2C8 of altera corp, utilize digital phase-locked loop and backoff algorithm to produce accurate 1PPS, IRIG-B (DC), 10kHz reference clock signal, 1MHz reference clock signal, and carry out exchanges data by spi bus and CPU algoritic module.
CPU adopts the auspicious LM3S1601 of lumen promise, be used for receiving the data of external series message signals and FPGA-5 exchange, CPU tames the phase deviation that algoritic module measures according to FPGA-5, control OCXO obtains a high precision standard 10MHz frequency, to 100MHz, can to produce resolution be the 10ns frequency reference to PLL among the FPGA-5 in FPGA-5 inside like this with 10MHz standard frequency frequency multiplication then.FPGA-5 utilizes this frequency reference can generate high-precision 1PPS, IRIG-B (DC), 10kHz reference clock signal, 1MHz reference clock signal.
Monitor board as shown in Figure 6 comprises PC104 Plus processor module, and the two network interfaces of configuration are supported CF card, hard disk, uses PCI to finish the HPI visit to the special-purpose bridging chip of HPI.Decipher by CPLD by isa bus, expand the output of No. 8 relays.The PC104plus processor module is by the HPI interface of pci bus visit DSP, and the bridging chip between pci bus and the HPI bus is selected PCI2040 for use.Be used to accept the data that collection plate transmits, finish record ripple format conversion, recorder data preservation and start the analysis of causes; And with the supervisor communication, communications protocol is user-defined proprietary protocol or IEC 61850-8-1; Realize record dynamic data, sign transmission line parameter synchronic measurement incident simultaneously, search dynamic data and data and supervisor real-time Communication for Power function.
Supervisor adopts embedded computer EmCORE-i8524 (600M), mainly disposes as follows: Intel type CPU, and dominant frequency can reach 600MHz; 256MB DDR SDRAM; 3 100M Ethernet cards independently; Support PCI, PC/104, buses such as PC/104+; Support 6 232 serial ports.Be used to realize that ACSI processing, monitoring in real time, off-line analysis, definite value are set, operation is controlled, record ripple file management, fact retrieval and transmission line parameter synchronic measurement and recorder data and main website real-time Communication for Power.
The course of work of the specific embodiment of the invention is seen Fig. 7.Concrete steps are as follows:
1) processing of input signal
If input signal is a simulating signal, then carry out the Signal Spacing conversion with little PT/CT, then simulating signal is carried out filtering, A/D conversion, generate digital quantity and be placed on 16 bit data bus;
If input signal is the optical fiber and digital signal, then the network interface Data Receiving is got off, and be placed on 16 bit data bus according to the data layout that has defined.
2) beat markers
Collection plate reading of data on 16 bit data bus, and each sampled point is stamped absolute time mark according to gps time.
3) data computation
Sampled data whenever expires a cycle, then calculates effective value, the harmonic wave of each passage, and quantity of states such as positive sequence, negative phase-sequence, zero sequence, power, and result of calculation is kept in the predefine structure.
4) starting judgement and transmission line parameter synchronic measurement event identifier generates
Whether DSP compares according to result of calculation and definite value, have to start to take place, and fill in the log-on message structure.Simultaneously required according to the transmission line parameter synchronic measurement incident, fill in the identified event structure.
5) data send
Collection plate sends to monitor board with result of calculation, sampled data, log-on message structure, identified event structure by the HPI bus of DSP, and ripple sends once weekly.
6) monitor board is handled the data that receive
According to whether starting generation transient state record ripple file and flag event file, generate according to sampled data simultaneously and dynamically record the ripple file, and file is write hard disk.
7) supervisor work
As analyzing and man-machine conversation operation such as definite value down, then need supervisor to finish to record ripple file.Supervisor is mainly finished work such as off-line analysis, Configuration Online, operation control, monitoring in real time, fact retrieval, correspondence with foreign country.
The performance index of this embodiment device are as follows:
1) analog channel drift self-adaptation, range self-adapting;
2) voltage measurement scope: 0~1000V, current measuring range: 0~60A;
3) voltage, current measurement amplitude precision 1 ‰, phase accuracy is 0.3 ° between each amount;
4) drift:<0.02;
5) synchronism:<0.1ms;
6) frequency error measurement:<0.01Hz;
7) frequency starts time-delay:<100ms;
8) sudden change starts time-delay:<20ms;
9) out-of-limit startup time-delay:<60ms;
10) concussion starts time-delay:<3s;
11) switching value starts time-delay:<1ms;
12) sudden change starts error:<2%;
13) the out-of-limit startup error of passage:<1%;
14) harmonic wave starts error (below 10 times):<2%;
15) positive sequence, the out-of-limit startup error of negative phase-sequence:<2%;
16) generator's power and angle measuring error: under rated frequency, be not more than 1 °;
17) transfer rate between main website: 25,50,100 times/second optional transfer rate;
18) record ripple recording capacity: 1G CF card, 80G hard disk, can preserve record ripple file more than 20,000;
19) dynamically recording capacity: the 200G hard disk, can preserve dynamically recording data more than 15 days;
20) absolute time error (no GPS):<± 10ms/ days;
21) absolute time error (GPS is arranged):<± 1 μ s;
22) device power consumption:<80W;
23) maximum alarm delay time: 3min;
24) the event identifier recorded and stored time: 30 days;
25) metallic short circuit range error:<2%;
26) maximum configured is: 96 tunnel analog quantitys, 192 way switch amounts.
27) power measurement:
Measurement range: 15W-10kW
Active power precision: 0.2% (power factor>0.5), 0.5% (power factor>0.1)
Reactive power precision: 0.5% (power factor>0.5)
Applied power precision: 0.5%
Power-factor measurement scope: 0.000-± 1.000
The power factor capacitive load :+be leading power factor
Power factor the inductive load :-power factor that promptly lags behind
Power factor basic accuracy: 0.5%;
28) modulus of impedance value precision is better than 1 ‰, and phase accuracy is better than 0.5 °;
29) electric capacity, inductance measurement precision are better than 1%;
30) insert signal type:
Simulating signal: three-phase voltage, three-phase current, DC voltage or electric current and high-frequency signal;
Switching value signal: protection tripping operation information and circuit-breaker status information.
Above content be in conjunction with concrete preferred implementation to further describing that the present invention did, can not assert that concrete enforcement of the present invention is confined to these explanations.For the general technical staff of the technical field of the invention; make some alternative or obvious modification that are equal to without departing from the inventive concept of the premise; and performance or purposes are identical, then should be considered as belonging to the protection domain that the present invention is determined by claims of being submitted to.
Claims (10)
1. power system transmission line parameter synchronic measurement and pen recorder adopt client-server architectures, and supervisor is a client, it is characterized in that:
Set up IEC 61850 models at server end according to IEC 61850 standard-required unifications, according to the IEC61850-7 modeling, be provided with failure wave-recording logic module and transmission line parameter synchronic measurement logic module with same hardware platform, the failure wave-recording logic module starts judgement according to result of calculation, then generate the fault file if any starting, record transient state fault, dynamic data are finished the off-line analysis to recorder data; The transmission line parameter synchronic measurement logic module is by to system voltage, electric current, frequency, power on-line measurement, to measurement result mark gps clock, and to the analytical calculation of data, realizes transmission line parameter synchronic measurement;
The communication simultaneously of described server via Ethernet and a plurality of client, collecting part receives simulating signal or digital signal, carries out real-time operation;
The described client pair model relevant with client requests shines upon;
Described server end can both be connected with protection information substation with described client, and communications protocol meets IEC 61850-8, is mapped as the MMS service, realizes system configuration according to IEC61850-6, and forms the independent configuration tool of using.
2. power system transmission line parameter synchronic measurement according to claim 1 and pen recorder is characterized in that:
Be provided with the acquired signal multiplex circuit that comprises collection plate, simulating signal tablet and digital signal tablet.
3. power system transmission line parameter synchronic measurement according to claim 1 and 2 and pen recorder is characterized in that:
Be provided with comprise GPS to the time plate the systematic unity synchronous clock circuit.
4. power system transmission line parameter synchronic measurement according to claim 3 and pen recorder is characterized in that:
Described failure wave-recording logic module, its composition comprise the following compliance logic node according to IEC 61850-7-4 standard definition:
1) LPHD physical unit infologic node, described logic node is used to describe the physical message of this device;
2) LLN0 logic node, described logic node are used for the common information of access fault record ripple logical device;
3) RDRE disturbance writing function logic node, described logic node is used to describe the failure wave-recording function;
4) at least one RADR disturbance record analog quantity channel logic node, corresponding one of each analog quantity channel, described logic node is used to describe the analog quantity channel of failure logging;
5) at least one RBDR disturbance recording status amount channel logic node, corresponding one of each quantity of state passage, described logic node is used to describe the quantity of state passage of failure logging;
6) at least one RFLO localization of fault logic node, corresponding one of each bar circuit, described logic node are used for the trouble spot of location line fault under the situation of breaking down.
5. power system transmission line parameter synchronic measurement according to claim 4 and pen recorder is characterized in that:
Described failure wave-recording logic module, it is formed and also comprises following IEC 61850 expansion logic nodes:
1) perturbographic system frequency quantity logic node is used for the generation systems frequency upper limit more, the processing when lower limit, mutation failure more takes place, and realizes the function of frequency failure logging;
2) at least one perturbographic system voltage logic node, corresponding one of each system voltage amount, the processing when being used for generation systems electric voltage exception fault realizes the function that voltage failure writes down;
3) at least one disturbance record electricity flows logic node, corresponding one of each magnitude of current, the processing when being used for generation systems current anomaly fault realizes the function that current failure writes down;
4) at least one disturbance record transformer logic node, corresponding one of each main-transformer, the processing when being used to the transformation abnormal failure takes place realizes the function that transformer fault writes down.
6. power system transmission line parameter synchronic measurement according to claim 5 and pen recorder is characterized in that:
Described transmission line parameter synchronic measurement logic module, its composition comprise the following compliance logic node according to the IEC61850-7-4 standard definition:
1) LPHD physical unit infologic node, described logic node is used to describe the physical message of this device;
2) LLN0 logic node, described logic node is used to visit the common information of transmission line parameter synchronic measurement logical device;
Described transmission line parameter synchronic measurement logic module, it is formed and also comprises following IEC61850 expansion logic node:
At least one transmission line parameter is measured logic node, and corresponding one of each bar circuit is used to write down the transmission line parameter of synchro measure.
7. power system transmission line parameter synchronic measurement according to claim 6 and pen recorder is characterized in that:
The external input signal of described server is gps clock and voltage, current signal, and input pattern signal comprises:
1) simulating signal:, reach by the switching value signal of parallel cable with the form access of idle contact through traditional sampling voltage, the current analog signal that the mutual inductor progress of disease is come;
2) IEC 61850-9-1 digital signal and GOOSE signal: the GOOSE signal that meets point-to-point digital signal of the unidirectional multichannel of IEC 61850-9-1 serial and GOOSE Information Network;
3) IEC 61850-9-2 digital signal and GOOSE signal: meet digital signal and the GOOSE message of IEC 61850-9-2, by the process bus comprehensive transmission.
8. power system transmission line parameter synchronic measurement according to claim 7 and pen recorder is characterized in that:
Described collection plate comprises the DSP module, FPGA-1 acquisition control module and the FPGA-2 time control module that have SDRAM, FLASH.
9. power system transmission line parameter synchronic measurement according to claim 8 and pen recorder is characterized in that:
Described simulating signal tablet comprises analog signal detection module, AD sampling module, the FPGA-3 of cascade and the power supply detection module that power supply is provided;
Described digital signal tablet comprises network processing unit, optical fiber transceiver module, PCI network interface card, FPGA-4, FLASH BOOT ROM, DDRRAM and RS232 driver.
Described supervisor is any PC or industrial computer.
10. power system transmission line parameter synchronic measurement according to claim 9 and pen recorder is characterized in that:
Described GPS to the time plate comprise FPGA-5, CPU and OCXO, the synchronous clock of systematic unity is provided.
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