The utility model content
Technical problem to be solved in the utility model is the defective that remedies above-mentioned prior art, a kind of electric power quality monitoring and synchronized phasor monitoring device based on IEC 61850 proposed, electric energy quality monitoring and synchronized phasor monitoring are integrated in same device under IEC 61850 frameworks, monitor and the synchronized phasor monitoring with the convenient electric power quality of realizing.
Technical matters of the present utility model is solved by the following technical programs.
Client-server architectures is adopted in this electric power quality monitoring and synchronized phasor monitoring device, and supervisor is a client.
This electric power quality monitoring with the characteristics of synchronized phasor monitoring is:
Comprise the server that establishes IEC 61850 models according to IEC 61850 standard-required unifications; Be provided with fluctuation, the flickering that can realize voltage, tri-phase unbalance factor, frequency, harmonic wave and voltage, fall temporarily, on-line measurements such as liter, interruption in short-term temporarily, and to the quality of power supply logical block of measurement result mark gps clock; Be provided with feasible system voltage, electric current phasor phase angle and frequency, power on-line measurement and synchronous phasor measurement, and to the PMU logical block of measurement result mark gps clock;
Described PMU logical block is continuous coverage and transformer station of record electricity system and electricity consumption user's the quality of power supply both, also the synchronized phasor of continuous coverage and transformer station of record electricity system and generating plant meets electric power quality monitoring and the integrated requirement of synchronized phasor monitoring under IEC 61850 frameworks;
The communication simultaneously of described server via Ethernet and a plurality of client, collecting part receives simulating signal or digital signal, carries out real-time operation;
The described client pair model relevant with client requests shines upon;
Described server end can both be connected with protection information substation with described client, and communications protocol meets IEC 61850-8, is mapped as the MMS service, realizes system configuration according to IEC61850-6, and forms the independent configuration tool of using.
Technical matters of the present utility model is solved by following further technical scheme.
Be provided with the acquired signal multiplex circuit that comprises collection plate, simulating signal tablet and digital signal tablet.
Also be provided with comprise GPS to the time plate the systematic unity synchronous clock circuit.
Described quality of power supply logic module, its composition comprise the following compliance logic node according to IEC 61850-7-4 standard definition:
1) LPHD physical unit infologic node is used to describe the physical message of this device;
2) LLN0 logic node is used to visit the common information of quality of power supply logical device;
3) at least one MMXU measures logic node, is used for measuring voltage, electric current and frequency values;
4) at least one MSQI phase sequence and uneven logic node are used to measure preface component and degree of unbalancedness;
5) at least one MSTA quantitative statistics logic node, mean value, maximal value and minimum value in during being used for analytic statistics and setting;
6) at least one a MHAI harmonic wave and a harmonic wave logic node are used to measure a harmonic wave and a harmonic wave.
Described PMU logic module, its composition comprise the following compliance logic node according to IEC 61850-7-4 standard definition:
1) LPHD physical unit infologic node is used to describe the physical message of this device;
2) LLN0 logic node is used for the common information that access fault is recorded the ripple logical device;
3) MMXU measures logic node, is used to write down voltage, electric current, the frequency of PMU, quantity of states such as merit angle;
4) a MSQI phase sequence and uneven logic node are used to write down preface component and degree of unbalancedness;
5) a MSTA quantitative statistics logic node is used to write down the PMU flag event.
The external input signal of described server is gps clock and voltage, current signal, and input pattern signal comprises:
1) simulating signal:, reach by the switching value signal of parallel cable with the form access of idle contact through traditional sampling voltage, the current analog signal that the mutual inductor progress of disease is come;
2) IEC 61850-9-1 digital signal and general OO transformer substation case (Generic object oriented substation event is called for short GOOSE) signal: the GOOSE signal that meets point-to-point digital signal of the unidirectional multichannel of IEC 61850-9-1 serial and GOOSE Information Network;
3) IEC 61850-9-2 digital signal and GOOSE signal: meet digital signal and the GOOSE message of IEC 61850-9-2, by the process bus comprehensive transmission.
Technical matters of the present utility model is solved by following further technical scheme.
Described collection plate comprises the DSP module, FPGA-1 acquisition control module and the FPGA-2 time control module that have SDRAM, FLASH.Wherein FPGA is the english abbreviation of field programmable gate array (Field Programmable Gate Array).The FPGA-1 acquisition control module is carried out synchronized sampling to all analog quantitys and switching value, and image data is added markers, is transferred to DSP then.The FPGA-2 time control module is decoded to the time signal that receives, and the time after handling is issued the FPGA-1 acquisition control module by 8 bit data bus.
Described simulating signal tablet comprises analog signal detection module, AD sampling module, the FPGA-3 of cascade and the power supply detection module that power supply is provided.
Described digital signal tablet comprises network processing unit, optical fiber transceiver module, PCI network interface card, FPGA-4, FLASH BOOT ROM, DDRRAM and RS232 driver.
Described GPS to the time plate comprise FPGA-5, CPU and OCXO, the synchronous clock of systematic unity is provided.Be used to receive 1PPS, IRIG-B, serial time message, utilize the taming local clock of signal input time, generate high-precision 1PPS, IRIG-B (DC), 10kHz reference clock signal, 1MHz reference clock signal.
Described supervisor is any PC or industrial computer.
The beneficial effect that the utility model is compared with the prior art is:
The utility model device respectively is modeled as different logical device with the quality of power supply with PMU according to IEC 61850 standards, both realized electric system important transformer station and electricity consumption user are carried out electric energy quality monitoring, also realized electric system important transformer station and generating plant are carried out synchronous phasor measurement, and then structure electric system real-time dynamic monitoring system, to strengthen monitoring, improve the ability that scheduling mechanism accurately holds system running state to the Electrical Power System Dynamic safety and stability.The utility model device can be widely used in circuit record ripple, main transformer record ripple, unit record ripple, and various application scenarios such as important factory station electric energy quality monitoring and synchronous phasor measurement.Only need as required software to be carried out simple configuration and get final product when engineering is used, need not any complicated operations, engineering is used very convenient flexible.
Embodiment
Contrast accompanying drawing and the utility model is further described below in conjunction with embodiment.
Fig. 1 is the system construction drawing of the utility model embodiment, provides two kinds of input pattern signals among the figure: merge cells+GOOSE net, or the signal of the conventional P T/CT progress of disease+switching value rhabdion point.
This embodiment is set up IEC 61850 models at server end according to IEC 61850 standard-required unifications, be provided with quality of power supply logical block and PMU logical block with same hardware platform, quality of power supply logical block realize voltage, tri-phase unbalance factor, frequency, harmonic wave and voltage fluctuation, flickering, fall temporarily, on-line measurements such as liter, interruption in short-term temporarily, and to measurement result mark gps clock; The PMU logical block realizes system voltage, electric current phasor phase angle and frequency, power on-line measurement and synchronous phasor measurement, and to measurement result mark gps clock.Both continuous coverage and transformer station of record electricity system and electricity consumption user's the quality of power supply, also the synchronized phasor of continuous coverage and transformer station of record electricity system and generating plant meets electric power quality monitoring and the integrated requirement of synchronized phasor monitoring under IEC 61850 frameworks.
The communication simultaneously of server via Ethernet and a plurality of client, collecting part receives simulating signal or digital signal, carries out real-time operation.The client pair model relevant with client requests shines upon.Server end can both be connected with protection information substation with client, and communications protocol meets IEC 61850-8, is mapped as the MMS service, realizes system configuration according to IEC61850-6, and forms the independent configuration tool of using.
Be provided with the acquired signal multiplex circuit that comprises collection plate, simulating signal tablet and digital signal tablet.
Also be provided with comprise GPS to the time plate the systematic unity synchronous clock circuit.
Collection plate as shown in Figure 2 comprises the DSP module, FPGA-1 acquisition control module and the FPGA-2 time control module that have SDRAM, FLASH.The FPGA-1 acquisition control module is carried out synchronized sampling to all analog quantitys and switching value, and image data is added markers, is transferred to DSP then.The FPGA-2 time control module is decoded to the time signal that receives, and the time after handling is issued the FPGA-1 acquisition control module by 8 bit data bus.
Simulating signal tablet as shown in Figure 3 comprises analog signal detection module, AD sampling module, the FPGA-3 of cascade and the power supply detection module that power supply is provided.Analog signal detection module receives after 32 tunnel the simulating signal, take current simulating signal by sampling switch, by sampling holder signal is kept, FPGA-3 control AD sampling module is 16 digital signal with each road analog signal conversion, and after image data gathered, the FPGA-3 that is uploaded to by 16 bit data bus handled.
Digital signal tablet as shown in Figure 4 comprises network processing unit, optical fiber transceiver module, PCI network interface card, FPGA-4, FLASH BOOT ROM, DDRRAM and RS232 driver.Collection plate will meet IEC 61850-9-1 by the backboard parallel bus, the configuration data of IEC 61850-9-2 digital signal and GOOSE signal writes in the dual port RAM of FPGA-4 inside, the digital signal tablet detect configuration data effectively after, receive two-way according to configuration information indication simultaneously by two network interfaces of integrated two network interfaces of network processing unit and pci bus expansion and meet IEC 61850-9-1, IEC 61850-9-2 digital signal and GOOSE signal-GOOSE message and merge cells data, put in order after from message, extracting the data of system's needs according to configuration data again, data are put into the dual port RAM buffer zone, wait for that collection plate reads.Corresponding dual port RAM unit feedback digital signal tablet can be set after collection plate reads take data away, by the CPU release dual port RAM buffer zone of FPGA-4.Even when having one road signal to make mistakes, owing to be to receive two-way simultaneously, data acquisition still can true(-)running.
GPS as shown in Figure 5 to the time plate comprise FPGA-5, CPU and OCXO, it is the synchronous clock circuit of systematic unity, be used to receive 1PPS, IRIG-B, serial time message, utilize the taming local clock of signal input time, generate high-precision 1PPS, IRIG-B (DC), 10kHz reference clock signal, 1MHz reference clock signal.Satellite-signal can accurately be kept time after disappearing; After satellite-signal recovers, can automatically switch to GPS to the time mode.Utilize the taming local clock of signal input time, export the high precision time frequency signal by the logical operation of FPGA-5 again.
FPGA-5 adopts the EP2C8 of altera corp, utilize digital phase-locked loop and backoff algorithm to produce accurate 1PPS, IRIG-B (DC), 10kHz reference clock signal, 1MHz reference clock signal, and carry out exchanges data by spi bus and CPU algoritic module.
CPU adopts the auspicious LM3S1601 of lumen promise, be used for receiving the data of external series message signals and FPGA-5 exchange, CPU tames the phase deviation that algoritic module measures according to FPGA-5, control OCXO obtains a high precision standard 10MHz frequency, to 100MHz, can to produce resolution be the 10ns frequency reference to PLL among the FPGA-5 in FPGA-5 inside like this with 10MHz standard frequency frequency multiplication then.FPGA-5 utilizes this frequency reference can generate high-precision 1PPS, IRIG-B (DC), 10kHz reference clock signal, 1MHz reference clock signal.
Monitor board as shown in Figure 6 comprises PC104 Plus processor module, and the two network interfaces of configuration are supported CF card, hard disk, uses PCI to finish the HPI visit to the special-purpose bridging chip of HPI.Decipher by CPLD by isa bus, expand the output of No. 8 relays.The PC104plus processor module is by the HPI interface of pci bus visit DSP, and the bridging chip between pci bus and the HPI bus is selected PCI2040 for use.Be used to accept the data that collection plate transmits, finish record ripple format conversion, data preservation; And with the supervisor communication, communications protocol is user-defined proprietary protocol or IEC 61850-8-1; The storage of realization power quality data realizes record dynamic data, sign PMU incident simultaneously, searches dynamic data and PMU data and supervisor real-time Communication for Power function.
Supervisor adopts embedded computer EmCORE-i8524 (600M), mainly disposes as follows: Intel type CPU, and dominant frequency can reach 600MHz; 256MB DDR SDRAM; 3 100M Ethernet cards independently; Support PCI, PC/104, buses such as PC/104+; Support 6 232 serial ports.Be used to realize ACSI processing, monitoring in real time, definite value setting, operation control, file management, fact retrieval, the quality of power supply and PMU data and main website real-time Communication for Power.
The utility model embodiment input signal is that the simulating signal or the course of work of optical fiber and digital signal are seen Fig. 7, and input signal is that the digital signal or the GOOSE signal course of work are seen Fig. 8.Concrete steps are as follows:
1) processing of input signal
If input signal is a simulating signal, then carry out the Signal Spacing conversion with little PT/CT, then simulating signal is carried out filtering, A/D conversion, generate digital quantity and be placed on 16 bit data bus;
If input signal is optical fiber and digital signal, digital signal or GOOSE signal, then the network interface Data Receiving is got off, and be placed on 16 bit data bus according to the data layout that has defined.
2) beat markers
Collection plate reading of data on 16 bit data bus, and each sampled point is stamped absolute time mark according to gps time.
3) data computation
Sampled data whenever expires a cycle, then calculates effective value, the harmonic wave of each passage, and quantity of states such as positive sequence, negative phase-sequence, zero sequence, power, and result of calculation is kept in the predefine structure.
4) quality of power supply and PMU event identifier generate
DSP relatively judges have the quality of power supply or PMU incident to take place according to result of calculation and definite value, and fills in the identified event structure.
5) data send
Collection plate sends to monitor board with result of calculation, sampled data, log-on message structure, identified event structure by the HPI bus of DSP, and ripple sends once weekly.
6) monitor board is handled the data that receive
According to whether producing event flag generation flag event file, generate dynamically record ripple file according to sampled data simultaneously, and file is write hard disk.
7) supervisor work
As analyzing and down man-machine conversation operation such as definite value, then need supervisor to finish to dynamic data.Supervisor is mainly finished work such as off-line analysis, Configuration Online, operation control, monitoring in real time, fact retrieval, correspondence with foreign country.
The performance index of this embodiment device are as follows:
1) the alternating voltage range of linearity: 0~3Un; The alternating current range of linearity: 0.1~40In;
2) amplitude measurement error: 0.2%;
3) drift:<0.02;
4) synchronism:<0.1ms;
5) frequency error measurement:<0.01Hz;
6) supply voltage and deviation calculation:<0.5%;
7) imbalance of three-phase voltage degree and negative phase-sequence amount are calculated:<0.2%;
8) the three-phase current unbalance degree calculates:<1%;
9) Harmonics Calculation;
Voltage: U
h〉=3%U
N, 5%U
hU
h≤ 3%U
N, 0.15%U
N
Electric current: I
h〉=10%I
N, 5%I
hI
h≤ 10%I
N, 0.5%I
N
10) voltage fluctuation is calculated:<5%;
11) flickering is calculated:<5%;
12) generator's power and angle measuring error: under rated frequency, be not more than 1 °;
13) measuring error of active power and reactive power:<0.5%;
14) transfer rate between main website: 25,50,100 times/second optional transfer rate;
15) absolute time error:<± 10ms/ days (no GPS);<± 1 μ s (GPS is arranged);
16) device power consumption:<80W;
17) the event identifier recorded and stored time: 30 days;
18) dynamically recording capacity: the 200G hard disk, can preserve the quality of power supply and PMU dynamically recording data more than 15 days;
19) maximum configured is: 96 tunnel analog quantitys, 192 way switch amounts.
20) insert signal type:
Simulating signal: three-phase voltage, three-phase current, DC voltage or electric current and high-frequency signal;
Switching value signal: protection tripping operation information and circuit-breaker status information.
Above content be in conjunction with concrete preferred implementation to further describing that the utility model is done, can not assert that concrete enforcement of the present utility model is confined to these explanations.For the utility model person of an ordinary skill in the technical field; under the prerequisite that does not break away from the utility model design, make some alternative or obvious modification that are equal to; and performance or purposes are identical, then should be considered as belonging to the protection domain that the utility model is determined by claims of being submitted to.