CN101515015B - Power quality monitoring and recording device of power system - Google Patents
Power quality monitoring and recording device of power system Download PDFInfo
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Abstract
The present invention provides a power quality monitoring and recording device of power system. An IEC61850 model is unitedly established at the server end according to an IEC61850 standard requirement. A fault recording logic module and a power quality logic module which have a same hardware platform are provided. The system configuration is realized according to IEC61850-6 and a configuration tool which is used independently is formed. The fault recording and power quality are respectively executed with model building to different logic devices according to IEC61850 standard. Not only is the data recording of power system under fault realized, but also the power quality monitoring to the important transformer substation and power consumer of power system is realized. Powerful support isprovided for increasing the supplement of high-quality power to the consumer by the power system. The power quality monitoring and recording device of power system according to the invention can be widely used for various occasions of power quality. The software only requires simple configuration according to requirement in project application. The complicated operation is not required. The project application is extraordinary convenient and flexible.
Description
Technical field
The present invention relates to monitoring and record, especially relate to a kind of electric power quality monitoring and pen recorder.
Background technology
China formal employing IEC 61850 was a power industry standard in 2007, set about changing secondary device data repeated acquisition, lacked data integration and processing, the present situation that lacks message exchange and share.Oscillograph in the existing transformer station can be for the user makes a strategic decision in time, accurately provides safeguard in the data integration of IED equipment room and message exchange, but be under failure condition to main website transmission data, can not monitor the electric power quality state; Quality of power supply device can real-time monitor the system power quality state, but the data of record are steady-state quantity also, and recording frequency is low, and reflection line fault truth is not good enough.Have not yet to see the failure wave-recording and the quality of power supply with identical hardware platform are carried out unified Modeling according to IEC 61850 standards, realize the electric energy quality monitoring of interconnected network and the device of record.
Summary of the invention
Technical matters to be solved by this invention is the defective that remedies above-mentioned prior art, a kind of electric power quality monitoring and pen recorder based on IEC 61850 proposed, the failure wave-recording and the quality of power supply are integrated in same device under IEC 61850 frameworks, with convenient electric power quality monitoring and the record realized.
Technical matters of the present invention is solved by the following technical programs.
This electric power quality monitoring and pen recorder adopt client-server architectures, and supervisor is a client.
This electric power quality monitoring with the characteristics of pen recorder is:
Set up IEC 61850 models at server end according to IEC 61850 standard-required unifications, according to the IEC61850-7 modeling, be provided with failure wave-recording logic module and quality of power supply logic module with same hardware platform, the failure wave-recording logic module starts judgement according to result of calculation, then generate the fault file if any starting, record transient state fault, dynamic data are finished the off-line analysis to recorder data; Quality of power supply logic module realize voltage, tri-phase unbalance factor, frequency, harmonic wave and voltage fluctuation, flickering, fall temporarily, on-line measurements such as liter, interruption in short-term temporarily, and to measurement result mark gps clock.Both record electricity system failure data, also continuous coverage and transformer station of record electricity system and electricity consumption user's the quality of power supply under non-failure conditions meets electric system monitoring in real time and transient state record and the integrated requirement of dynamically recording under IEC 61850 frameworks.
The communication simultaneously of described server via Ethernet and a plurality of client, the server end collecting part receives simulating signal or digital signal, carries out real-time operation.The described client pair model relevant with client requests shines upon.Described server end can both be connected with protection information substation with described client, and communications protocol meets IEC 61850-8, is mapped as the MMS service, realizes system configuration according to IEC61850-6, and forms the independent configuration tool of using.
Technical matters of the present invention is solved by following further technical scheme.
Server end is provided with the acquired signal multiplex circuit that comprises collection plate, simulating signal tablet and digital signal tablet.
Server end also be provided with comprise GPS to the time plate the systematic unity synchronous clock circuit.
Described failure wave-recording logic module, its composition comprise the following compliance logic node according to IEC 61850-7-4 standard definition:
1) LPHD physical unit infologic node is used to describe the physical message of this device;
2) LLN0 logic node is used for the common information that access fault is recorded the ripple logical device;
3) a RDRE disturbance writing function logic node is used to describe the failure wave-recording function;
4) at least one RADR disturbance record analog quantity channel logic node, corresponding one of each analog quantity channel is used to describe the analog quantity channel of failure logging;
5) at least one RBDR disturbance recording status amount channel logic node, corresponding one of each quantity of state passage is used to describe the quantity of state passage of failure logging;
6) at least one RFLO localization of fault logic node, corresponding one of each bar circuit is used for the trouble spot of location line fault under the situation of breaking down.
Described failure wave-recording logic module, it is formed and also comprises following IEC 61850 expansion logic nodes:
1) perturbographic system frequency quantity logic node is used for system frequency the upper limit more, the processing when lower limit, mutation failure more takes place;
2) at least one perturbographic system voltage logic node, corresponding one of each system voltage amount, the processing when being used for system voltage generation abnormal failure;
3) at least one disturbance record electricity flows logic node, corresponding one of each magnitude of current, the processing when being used for system power generation abnormal failure;
4) at least one disturbance record transformer logic node, corresponding one of each main-transformer, the processing when being used for transformer generation abnormal failure.
Described quality of power supply logic module, its composition comprise the following compliance logic node according to IEC 61850-7-4 standard definition:
1) LPHD physical unit infologic node is used to describe the physical message of this device;
2) LLN0 logic node is used to visit the common information of quality of power supply logical device;
3) at least one MMXU measures logic node, is used for measuring voltage, electric current and frequency values;
4) at least one MSQI phase sequence and uneven logic node are used to measure preface component and degree of unbalancedness;
5) at least one MSTA quantitative statistics logic node, mean value, maximal value and minimum value in during being used for analytic statistics and setting;
6) at least one a MHAI harmonic wave and a harmonic wave logic node are used to measure a harmonic wave and a harmonic wave.
The external input signal of described server is gps clock and voltage, current signal, and input pattern signal comprises
1) simulating signal:, reach by the switching value signal of parallel cable with the form access of idle contact through traditional sampling voltage, the current analog signal that the mutual inductor progress of disease is come;
2) IEC 61850-9-1 digital signal and GOOSE signal: the GOOSE signal that meets point-to-point digital signal of the unidirectional multichannel of IEC 61850-9-1 serial and GOOSE Information Network;
3) IEC 61850-9-2 digital signal and GOOSE signal: meet digital signal and the GOOSE message of IEC 61850-9-2, by the process bus comprehensive transmission.
Technical matters of the present invention is solved by following further technical scheme.
Described collection plate comprises the DSP module, FPGA-1 acquisition control module and the FPGA-2 time control module that have SDRAM, FLASH.Wherein FPGA is the english abbreviation of field programmable gate array (Field Programmable Gate Array).The FPGA-1 acquisition control module is carried out synchronized sampling to all analog quantitys and switching value, and image data is added markers, is transferred to DSP then.The FPGA-2 time control module is decoded to the time signal that receives, and the time after handling is issued the FPGA-1 acquisition control module by 8 bit data bus.
Described simulating signal tablet comprises analog signal detection module, AD sampling module, the FPGA-3 of cascade and the power supply detection module that power supply is provided.
Described digital signal tablet comprises network processing unit, optical fiber transceiver module, PCI network interface card, FPGA-4, FLASH BOOT ROM, DDRRAM and RS232 driver.
Described GPS to the time plate comprise FPGA-5, CPU and OCXO, the synchronous clock of systematic unity is provided.Be used to receive 1PPS, IRIG-B, serial time message, utilize the taming local clock of signal input time, generate high-precision 1PPS, IRIG-B (DC), 10kHz reference clock signal, 1MHz reference clock signal.
Described supervisor is any PC or industrial computer.
The beneficial effect that the present invention is compared with the prior art is:
Apparatus of the present invention respectively are modeled as different logical device with failure wave-recording with the quality of power supply according to IEC 61850 standards, both realized the data recording under the electric power system fault situation, also realized electric system important transformer station and electricity consumption user are carried out electric energy quality monitoring, the strong support that provides of quality power is provided for the user for the raising electric system.Apparatus of the present invention can be widely used in various quality of power supply occasions.Only need as required software to be carried out simple configuration and get final product when engineering is used, need not any complicated operations, engineering is used very convenient flexible.
Description of drawings
Fig. 1 is the system construction drawing of the specific embodiment of the invention;
Fig. 2 is the theory diagram of the collection plate among Fig. 1;
Fig. 3 is the theory diagram of the simulating signal tablet among Fig. 1;
Fig. 4 is the theory diagram of the digital signal tablet among Fig. 1;
Fig. 5 be among Fig. 1 GPS to the time plate theory diagram;
Fig. 6 is the monitor board theory diagram among Fig. 1;
Fig. 7 is the course of work synoptic diagram of the specific embodiment of the invention.
Embodiment
Below the contrast accompanying drawing and in conjunction with embodiment the present invention is further illustrated.
Fig. 1 is the system construction drawing of the specific embodiment of the invention, provides two kinds of input pattern signals among the figure: merge cells+GOOSE net, or the signal of the conventional P T/CT progress of disease+switching value rhabdion point.
This embodiment is set up IEC 61850 models at server end according to IEC 61850 standard-required unifications, be provided with failure wave-recording logic module and quality of power supply logic module with same hardware platform, the failure wave-recording logic module starts judgement according to result of calculation, then generate the fault file if any starting, record transient state fault, dynamic data are finished the off-line analysis to recorder data; Quality of power supply logic module realize voltage, tri-phase unbalance factor, frequency, harmonic wave and voltage fluctuation, flickering, fall temporarily, on-line measurements such as liter, interruption in short-term temporarily, and to measurement result mark gps clock.Both record electricity system failure data, also continuous coverage and transformer station of record electricity system and electricity consumption user's the quality of power supply under non-failure conditions meets electric power quality monitoring and transient state record and the integrated requirement of dynamically recording under IEC 61850 frameworks.
The communication simultaneously of described server via Ethernet and a plurality of client, the server end collecting part receives simulating signal or digital signal, carries out real-time operation.The described client pair model relevant with client requests shines upon.Described server end can both be connected with protection information substation with described client, and communications protocol meets IEC 61850-8, is mapped as the MMS service, realizes system configuration according to IEC61850-6, and forms the independent configuration tool of using.
Server end is provided with the acquired signal multiplex circuit that comprises collection plate, simulating signal tablet and digital signal tablet.
Server end also be provided with comprise GPS to the time plate the systematic unity synchronous clock circuit.
Collection plate as shown in Figure 2 comprises the DSP module, FPGA-1 acquisition control module and the FPGA-2 time control module that have SDRAM, FLASH.The FPGA-1 acquisition control module is carried out synchronized sampling to all analog quantitys and switching value, and image data is added markers, is transferred to DSP then.The FPGA-2 time control module is decoded to the time signal that receives, and the time after handling is issued the FPGA-1 acquisition control module by 8 bit data bus.
Simulating signal tablet as shown in Figure 3 comprises analog signal detection module, AD sampling module, the FPGA-3 of cascade and the power supply detection module that power supply is provided.Analog signal detection module receives after 32 tunnel the simulating signal, take current simulating signal by sampling switch, by sampling holder signal is kept, FPGA-3 control AD sampling module is 16 digital signal with each road analog signal conversion, and after image data gathered, the FPGA-3 that is uploaded to by 16 bit data bus handled.
Digital signal tablet as shown in Figure 4 comprises network processing unit, optical fiber transceiver module, PCI network interface card, FPGA-4, FLASH BOOT ROM, DDRRAM and RS232 driver.Collection plate will meet IEC 61850-9-1 by the backboard parallel bus, the configuration data of IEC 61850-9-2 digital signal and GOOSE signal writes in the dual port RAM of FPGA-4 inside, the digital signal tablet detect configuration data effectively after, receive two-way according to configuration information indication simultaneously by two network interfaces of integrated two network interfaces of network processing unit and pci bus expansion and meet IEC 61850-9-1, IEC 61850-9-2 digital signal and GOOSE signal-GOOSE message and merge cells data, put in order after from message, extracting the data of system's needs according to configuration data again, data are put into the dual port RAM buffer zone, wait for that collection plate reads.Corresponding dual port RAM unit feedback digital signal tablet can be set after collection plate reads take data away, by the CPU release dual port RAM buffer zone of FPGA-4.Even when having one road signal to make mistakes, owing to be to receive two-way simultaneously, data acquisition still can true(-)running.
GPS as shown in Figure 5 to the time plate comprise FPGA-5, CPU and OCXO, it is the synchronous clock circuit of systematic unity, be used to receive 1PPS, IRIG-B, serial time message, utilize the taming local clock of signal input time, generate high-precision 1PPS, IRIG-B (DC), 10kHz reference clock signal, 1MHz reference clock signal.Satellite-signal can accurately be kept time after disappearing; After satellite-signal recovers, can automatically switch to GPS to the time mode.Utilize the taming local clock of signal input time, export the high precision time frequency signal by the logical operation of FPGA-5 again.
FPGA-5 adopts the EP2C8 of altera corp, utilize digital phase-locked loop and backoff algorithm to produce accurate 1PPS, IRIG-B (DC), 10kHz reference clock signal, 1MHz reference clock signal, and carry out exchanges data by spi bus and CPU algoritic module.
CPU adopts the auspicious LM3S1601 of lumen promise, be used for receiving the data of external series message signals and FPGA-5 exchange, CPU tames the phase deviation that algoritic module measures according to FPGA-5, control OCXO obtains a high precision standard 10MHz frequency, to 100MHz, can to produce resolution be the 10ns frequency reference to PLL among the FPGA-5 in FPGA-5 inside like this with 10MHz standard frequency frequency multiplication then.FPGA-5 utilizes this frequency reference can generate high-precision 1PPS, IRIG-B (DC), 10kHz reference clock signal, 1MHz reference clock signal.
Monitor board as shown in Figure 6 comprises the PC104Plus processor module, and the two network interfaces of configuration are supported CF card, hard disk, uses PCI to finish the HPI visit to the special-purpose bridging chip of HPI.Decipher by CPLD by isa bus, expand the output of No. 8 relays.The PC104plus processor module is by the HPI interface of pci bus visit DSP, and the bridging chip between pci bus and the HPI bus is selected PCI2040 for use.Be used to accept the data that collection plate transmits, finish record ripple format conversion, recorder data preservation and start the analysis of causes; And with the supervisor communication, communications protocol is user-defined proprietary protocol or IEC 61850-8-1; Realize power quality data storage simultaneously, retrieval and with supervisor real-time Communication for Power function.
Supervisor adopts embedded computer EmCORE-i8524 (600M), mainly disposes as follows: Intel type CPU, and dominant frequency can reach 600MHz; 256MB DDR SDRAM; 3 100M Ethernet cards independently; Support PCI, PC/104, buses such as PC/104+; Support 6 232 serial ports.Be used to realize that ACSI processing, monitoring in real time, off-line analysis, definite value are set, operation is controlled, record ripple file management, fact retrieval and power quality data and recorder data and main website real-time Communication for Power.
The course of work of the specific embodiment of the invention is seen Fig. 7.Concrete steps are as follows:
1) processing of input signal
If input signal is a simulating signal, then carry out the Signal Spacing conversion with little PT/CT, then simulating signal is carried out filtering, A/D conversion, generate digital quantity and be placed on 16 bit data bus;
If input signal is the optical fiber and digital signal, then the network interface Data Receiving is got off, and be placed on 16 bit data bus according to the data layout that has defined.
2) beat markers
Collection plate reading of data on 16 bit data bus, and each sampled point is stamped absolute time mark according to gps time.
3) data computation
Sampled data whenever expires a cycle, then calculates effective value, the harmonic wave of each passage, and quantity of states such as positive sequence, negative phase-sequence, zero sequence, power, and result of calculation is kept in the predefine structure.
4) starting judgement and quality of power supply event identifier generates
Whether DSP compares according to result of calculation and definite value, have to start to take place, and fill in the log-on message structure.Judge have quality of power supply incident to take place according to quality of power supply definite value simultaneously, and fill in the identified event structure.
5) data send
Collection plate sends to monitor board with result of calculation, sampled data, log-on message structure, identified event structure by the HPI bus of DSP, and ripple sends once weekly.
6) monitor board is handled the data that receive
According to whether starting generation transient state record ripple file and flag event file, generate according to sampled data simultaneously and dynamically record the ripple file, and file is write hard disk.
7) supervisor work
As analyzing and man-machine conversation operation such as definite value down, then need supervisor to finish to record ripple file.Supervisor is mainly finished work such as off-line analysis, Configuration Online, operation control, monitoring in real time, fact retrieval, correspondence with foreign country.
The performance index of this embodiment device are as follows:
1) the alternating voltage range of linearity: 0～3Un; The alternating current range of linearity: 0.1～40In; Amplitude measurement error: 0.2%;
2) drift:＜0.02;
3) frequency error measurement:＜0.01Hz;
4) supply voltage and deviation calculation:＜0.5%;
5) imbalance of three-phase voltage degree and negative phase-sequence amount are calculated:＜0.2%;
6) the three-phase current unbalance degree calculates:＜1%;
7) Harmonics Calculation;
Voltage: U
h〉=3%U
N, 5%U
hU
h≤ 3%U
N, 0.15%U
N
Electric current: I
h〉=10%I
N, 5%I
hI
h≤ 10%I
N, 0.5%I
N
8) voltage fluctuation is calculated:＜5%;
9) flickering is calculated:＜5%;
10) sudden change starts error:＜2%;
11) the out-of-limit startup error of passage:＜1%;
12) harmonic wave starts error (below 10 times):＜2%;
13) positive sequence, the out-of-limit startup error of negative phase-sequence:＜2%;
14) transfer rate between main website: 25,50,100 times/second optional transfer rate;
15) record ripple recording capacity: the 80G hard disk, can preserve record ripple file more than 20,000;
16) absolute time error:＜± 10ms/ days (no GPS);＜± 1 μ s (GPS is arranged);
17) device power consumption:＜80W;
18) the event identifier recorded and stored time: 30 days;
19) dynamically recording capacity: the 200G hard disk, can preserve quality of power supply dynamically recording data more than 15 days;
20) metallic short circuit range error:＜2%;
21) maximum configured is: 96 tunnel analog quantitys, 192 way switch amounts.
22) insert signal type:
Simulating signal: three-phase voltage, three-phase current, DC voltage or electric current and high-frequency signal; Switching value signal: protection tripping operation information and circuit-breaker status information.
Above content be in conjunction with concrete preferred implementation to further describing that the present invention did, can not assert that concrete enforcement of the present invention is confined to these explanations.For the general technical staff of the technical field of the invention; make some alternative or obvious modification that are equal to without departing from the inventive concept of the premise; and performance or purposes are identical, then should be considered as belonging to the protection domain that the present invention is determined by claims of being submitted to.
Claims (10)
1. an electric power quality is monitored and pen recorder, adopts client-server architectures, and supervisor is a client, it is characterized in that:
Set up IEC 61850 models at server end according to IEC 61850 standard-required unifications, according to the IEC61850-7 modeling, be provided with failure wave-recording logic module and quality of power supply logic module with same hardware platform, the failure wave-recording logic module starts judgement according to result of calculation, then generate the fault file if any starting, record transient state fault, dynamic data are finished the off-line analysis to recorder data; Quality of power supply logic module realize voltage, tri-phase unbalance factor, frequency, harmonic wave and voltage fluctuation, flickering, fall temporarily, on-line measurements such as liter, interruption in short-term temporarily, and to measurement result mark gps clock;
The communication simultaneously of described server via Ethernet and a plurality of client, the server end collecting part receives simulating signal or digital signal, carries out real-time operation;
The described client pair model relevant with client requests shines upon;
Described server end can both be connected with protection information substation with described client, and communications protocol meets IEC 61850-8, is mapped as the MMS service, realizes system configuration according to IEC61850-6, and forms the independent configuration tool of using.
2. electric power quality monitoring according to claim 1 and pen recorder is characterized in that:
Server end is provided with the acquired signal multiplex circuit that comprises collection plate, simulating signal tablet and digital signal tablet.
3. electric power quality monitoring according to claim 1 and 2 and pen recorder is characterized in that:
Server end be provided with comprise GPS to the time plate the systematic unity synchronous clock circuit.
4. electric power quality monitoring according to claim 3 and pen recorder is characterized in that:
Described failure wave-recording logic module, its composition comprise the following compliance logic node according to IEC 61850-7-4 standard definition:
1) LPHD physical unit infologic node is used to describe the physical message of this device;
2) LLN0 logic node is used for the common information that access fault is recorded the ripple logical device;
3) a RDRE disturbance writing function logic node is used to describe the failure wave-recording function;
4) at least one RADR disturbance record analog quantity channel logic node, corresponding one of each analog quantity channel is used to describe the analog quantity channel of failure logging;
5) at least one RBDR disturbance recording status amount channel logic node, corresponding one of each quantity of state passage is used to describe the quantity of state passage of failure logging;
6) at least one RFLO localization of fault logic node, corresponding one of each bar circuit is used for the trouble spot of location line fault under the situation of breaking down.
5. electric power quality monitoring according to claim 4 and pen recorder is characterized in that:
Described failure wave-recording logic module, it is formed and also comprises following IEC 61850 expansion logic nodes:
1) perturbographic system frequency quantity logic node is used for system frequency the upper limit more, the processing when lower limit, mutation failure more takes place;
2) at least one perturbographic system voltage logic node, corresponding one of each system voltage amount, the processing when being used for system voltage generation abnormal failure;
3) at least one disturbance record electricity flows logic node, corresponding one of each magnitude of current, the processing when being used for system power generation abnormal failure;
4) at least one disturbance record transformer logic node, corresponding one of each main-transformer, the processing when being used for transformer generation abnormal failure.
6. electric power quality monitoring according to claim 5 and pen recorder is characterized in that:
Described quality of power supply logic module, its composition comprise the following compliance logic node according to IEC 61850-7-4 standard definition:
1) LPHD physical unit infologic node is used to describe the physical message of this device;
2) LLN0 logic node is used to visit the common information of quality of power supply logical device;
3) at least one MMXU measures logic node, is used for measuring voltage, electric current and frequency values;
4) at least one MSQI phase sequence and uneven logic node are used to measure preface component and degree of unbalancedness;
5) at least one MSTA quantitative statistics logic node, mean value, maximal value and minimum value in during being used for analytic statistics and setting;
6) at least one a MHAI harmonic wave and a harmonic wave logic node are used to measure a harmonic wave and a harmonic wave.
7. electric power quality monitoring according to claim 6 and pen recorder is characterized in that:
The external input signal of described server is gps clock and voltage, current signal, and input pattern signal comprises:
1) simulating signal:, reach by the switching value signal of parallel cable with the form access of idle contact through traditional sampling voltage, the current analog signal that the mutual inductor progress of disease is come;
2) IEC 61850-9-1 digital signal and GOOSE signal: the GOOSE signal that meets point-to-point digital signal of the unidirectional multichannel of IEC 61850-9-1 serial and GOOSE Information Network;
3) IEC 61850-9-2 digital signal and GOOSE signal: meet digital signal and the GOOSE message of IEC 61850-9-2, by the process bus comprehensive transmission.
8. electric power quality monitoring according to claim 7 and pen recorder is characterized in that:
Described collection plate comprises the DSP module, FPGA-1 acquisition control module and the FPGA-2 time control module that have SDRAM, FLASH.
9. electric power quality monitoring according to claim 8 and pen recorder is characterized in that:
Described simulating signal tablet comprises analog signal detection module, AD sampling module, the FPGA-3 of cascade and the power supply detection module that power supply is provided;
Described digital signal tablet comprises network processing unit, optical fiber transceiver module, PCI network interface card, FPGA-4, FLASH BOOT ROM, DDRRAM and RS232 driver.
Described supervisor is any PC or industrial computer.
10. electric power quality monitoring according to claim 9 and pen recorder is characterized in that:
Described GPS to the time plate comprise FPGA-5, CPU and OCXO, the synchronous clock of systematic unity is provided.
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| CN102778605B (en) * | 2012-08-13 | 2014-07-23 | 广东电网公司中山供电局 | Method and device for carrying out online determination on given and appended electric quantity of three-phase four-wire system in process of one-phase current losing |
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