CN101540298A - TFT-LCD array substrate and manufacturing method thereof - Google Patents
TFT-LCD array substrate and manufacturing method thereof Download PDFInfo
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- CN101540298A CN101540298A CN200810102426A CN200810102426A CN101540298A CN 101540298 A CN101540298 A CN 101540298A CN 200810102426 A CN200810102426 A CN 200810102426A CN 200810102426 A CN200810102426 A CN 200810102426A CN 101540298 A CN101540298 A CN 101540298A
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Abstract
The invention relates to a TFT-LCD array substrate and a manufacturing method thereof. The manufacturing method comprises the following steps: a gate metallic layer is deposited on the substrate to form a gate electrode and a grid line pattern through a first composition process; a gate insulating layer, a semiconductor layer, a doped semiconductor layer and a source drain metal layer are conditionally deposited to form a source electrode, a drain electrode, a data line and a doped semiconductor layer pattern through a second composition process and a TFT groove is formed; a passivation layer is deposited, a passivation layer and a semiconductor layer pattern are formed through a third composition process and a passivation layer through hole is formed; and a transparent conducting layer is deposited, a pixel electrode is formed through a fourth composition process, and the pixel electrode is connected with the drain electrode through the passivation layer through hole. Compared with the fourth composition process of the slit photoetching technology adopted in the prior art, the invention can remarkably reduce various defective pixels caused by the slit photoetching technology and improves the rate of finished products and the product quality of the TFT-LCD array substrate.
Description
Technical field
The present invention relates to a kind of Thin Film Transistor-LCD and manufacture method thereof, particularly a kind of TFT-LCD array base palte and manufacture method thereof.
Background technology
Thin Film Transistor-LCD (Thin Film Transistor Liquid CrystalDisplay is called for short TFT-LCD) has characteristics such as volume is little, low in energy consumption, radiationless, has occupied leading position in current flat panel display market.For TFT-LCD, the manufacturing process of array base palte has determined its properties of product, rate of finished products and price.
For price, the raising rate of finished products that reduces TFT-LCD effectively, the manufacturing process of TFT-LCD array base-plate structure (active driving TFT array) progressively obtains simplifying, and has developed into present four compositions (4mask) technology based on the slit photoetching technique from seven compositions (7mask) technology that begins.The core of four composition technologies is to adopt the slit photoetching process to replace the composition second time (active layer photoetching) and composition (source-drain electrode photoetching) for the third time in 5 composition technologies of tradition.Its technical process is specially: at first, and by the first time composition formation grid line and gate electrode; Metal level is leaked in successive sedimentation gate insulation layer, semiconductor layer, doping semiconductor layer (ohmic contact layer) and source on grid line and gate electrode subsequently; Then carry out the composition second time, form data wire, active layer, source-drain electrode and TFT raceway groove figure by wet etching, multistep etching (semiconductor layer etching → ashing → dry etching → doping semiconductor layer etching); Deposit passivation layer forms via hole by being patterned at for the third time on the passivation layer then; Last deposit transparent conductive layer forms pixel electrode by the 4th composition.Wherein, need to adopt the slit photoetching process to form active layer, source-drain electrode and TFT raceway groove figure in the composition for the second time.The principle of slit photoetching process is the slit that specific dimensions is set on mask plate, control the transmitance of light by producing optical diffraction, thereby control the thickness of photoresist selectively, and the thickness of photoresist will directly determine the breadth length ratio of TFT raceway groove, i.e. the electrology characteristic of TFT.
Actual production shows, prior art adopt the slit photoetching process four composition technologies defective of still existing some to be difficult to avoid, for example: certain limitation is arranged owing to have the making precision of narrow slit structure mask plate, cause the transmitance of zones of different that certain difference is arranged, and that these difference can cause channel region to take place is various bad, reduced the uniformity of TFT electrology characteristic on the whole base plate, influenced the display quality of TFT-LCD, even also may cause the bad generation of various pixels, reduced rate of finished products and product quality to a certain extent.And for example, the multistep etching technics is one of core process of slit photoetching process, its objective is and both formed active layer and source-drain electrode figure in the second time in the composition, also to form the TFT raceway groove simultaneously, main flow process comprises the etching of semiconductor layer, the ashing of raceway groove place photoresist, the etching of raceway groove place source-drain electrode and the etching of doping semiconductor layer, these etching technics are all finished in same equipment continuously, complex process not only, and the process exploitation difficulty is big, requirement to equipment is very high, and rate of finished products and product quality can not effectively be ensured.
Summary of the invention
The purpose of this invention is to provide a kind of TFT-LCD array base palte and manufacture method thereof, effective technological deficiency that solves four composition technologies of existing employing slit photoetching technique in the existence of aspects such as product quality, production construction cycle and production cost.
To achieve these goals, the invention provides a kind of TFT-LCD manufacturing method of array base plate, comprising:
Described step 1 is specially: adopt the method for sputter or thermal evaporation, deposition one deck grid metal level on substrate, by the first time composition technology on described substrate, form gate electrode and grid line figure.
Described step 2 is specially:
Step 21, on the substrate of completing steps 1 by PECVD method successive sedimentation gate insulation layer, doping semiconductor layer and semiconductor layer;
Step 22, the method sedimentary origin by sputter or thermal evaporation on the substrate of completing steps 21 leak metal level;
Step 23, by the second time composition technology metal level leaked in described source carry out etching, form drain electrode, source electrode and data wire figure;
Step 24, reservation photoresist adopt dry etching method etching doping semiconductor layer, form doped semiconductor layer pattern and TFT raceway groove.
Described step 3 is specially:
Step 31, the PECVD method deposit passivation layer of on the substrate of completing steps 2, passing through;
Step 32, by composition technology for the third time, carry out gate insulation layer, passivation layer and semiconductor layer etching, form passivation layer and semiconductor layer figure, and form passivation layer via hole in described drain electrode position.
Described step 4 is specially:
Step 41, method by sputter or thermal evaporation on the substrate of completing steps 3, the deposit transparent conductive layer;
Step 42, form pixel electrode, described pixel electrode is connected with described drain electrode by described passivation layer via hole by the 4th composition technology.
To achieve these goals, the present invention also provides a kind of TFT-LCD array base palte, comprising:
Gate electrode and grid line are formed on the substrate;
Gate insulation layer is formed on described gate electrode and the grid line;
Semiconductor layer is formed on the described gate insulation layer, and is positioned at described gate electrode top;
Doping semiconductor layer is formed on the described semiconductor layer;
Source electrode, drain electrode and data wire, wherein source electrode and drain electrode are formed on the described doping semiconductor layer, and form the TFT raceway groove that exposes semiconductor layer between source electrode and drain electrode;
Passivation layer is formed on described gate electrode, grid line, source electrode, drain electrode, data wire and the TFT raceway groove, and forms passivation layer via hole in the drain electrode position;
Pixel electrode is formed on the described substrate, and is connected with described drain electrode by described passivation layer via hole.
The present invention proposes a kind of TFT-LCD array base palte and manufacture method thereof, is a kind of four composition technologies that do not adopt the slit photoetching process to realize the preparation of TFT-LCD array base palte.The present invention is at first by the first time composition technology formation grid line and gate electrode figure, by the second time composition technology form source electrode, drain electrode, data wire, doped semiconductor layer pattern and TFT raceway groove, form passivation layer and semiconductor layer figure by composition technology for the third time, form pixel electrode by the 4th composition technology.Do not adopt five composition technologies of slit photoetching process to compare with prior art, composition technology is few, the production efficiency height, and production cost is low.Adopt four composition technologies of slit photoetching process to compare with prior art, technical advantage of the present invention is embodied in:
(1) owing to do not use the slit photoetching process, not only reduced lithography layout and made the requirement of precision, reduced the difficulty of photoetching process, reduced production cost, and the manufacturing process of TFT-LCD array base palte is developed to simplification and cost degradation direction;
(2) owing to do not use the slit photoetching process, reduce the development difficulty of photoetching process and etching technics greatly, obviously shortened the production construction cycle;
(3) owing to do not use the slit photoetching process, it is bad significantly to reduce the various pixels of being brought by the slit photoetching process, has improved the rate that manufactures a finished product and the product quality of TFT-LCD array base palte.
Below by drawings and Examples, technical scheme of the present invention is described in further detail.
Description of drawings
Fig. 1 is the flow chart of TFT-LCD manufacturing method of array base plate of the present invention;
Fig. 2 a is the plane graph after the present invention's composition technology first time forms grid line and gate electrode;
Fig. 2 b be among Fig. 2 a A-A to sectional view;
Fig. 3 a is the plane graph behind the present invention's composition technology formation for the second time drain electrode, source electrode, data wire, doped semiconductor layer pattern and the TFT raceway groove;
Fig. 3 b be among Fig. 3 a B-B to sectional view;
Fig. 4 a for the present invention for the third time composition technology form plane graph behind passivation layer and the semiconductor layer figure;
Fig. 4 b be among Fig. 4 a C-C to sectional view;
Fig. 5 a is the plane graph behind the formation pixel electrode in the 4th composition technology of the present invention;
Fig. 5 b be among Fig. 5 a D-D to sectional view.
Description of reference numerals:
The 1-substrate; The 2a-gate electrode; The 2b-grid line;
The 3-gate insulation layer; The 4a-semiconductor layer; The 4b-doping semiconductor layer;
The 5a-drain electrode; 5b-source electrode; The 5c-data wire;
The 6-TFT raceway groove; The 7-passivation layer; The 7a-passivation layer via hole;
The 8-pixel electrode.
Embodiment
Fig. 1 is the flow chart of TFT-LCD manufacturing method of array base plate of the present invention, is specially:
The present invention proposes a kind of TFT-LCD manufacturing method of array base plate that does not adopt traditional slit photoetching process, efficiently solve the existing technological deficiency that adopts four composition technologies of slit photoetching process in the existence of aspects such as product quality, production cycle and production cost on the one hand, the manufacturing process of TFT-LCD array base palte is developed to simplification and cost degradation direction.Fig. 2 a～Fig. 5 b is the manufacturing schematic diagram of TFT-LCD manufacturing method of array base plate of the present invention, manufacture process below by the TFT-LCD array base palte further specifies technical scheme of the present invention, in the following description, the alleged composition technology of the present invention comprises technologies such as photoresist coating, mask, exposure, etching.
Fig. 2 a for the present invention for the first time composition technology form plane graph behind grid line and the gate electrode, Fig. 2 b be among Fig. 2 a A-A to sectional view.Adopt the method for sputter or thermal evaporation, be at the last deposition of substrate 1 (as glass substrate or quartz base plate) one layer thickness
The grid metal level.The grid metal level can use metal and alloys thereof such as Cr, W, Ti, Ta, Mo, Al, Cu, and the grid metal level also can be made up of the multiple layer metal film.By the first time composition technology on substrate 1, form gate electrode 2a and grid line 2b figure, shown in Fig. 2 a, Fig. 2 b.
Fig. 3 a for the present invention for the second time composition technology form plane graph behind drain electrode, source electrode, data wire, doped semiconductor layer pattern and the TFT raceway groove, Fig. 3 b be among Fig. 3 a B-B to sectional view.On the substrate of finishing gate electrode and grid line figure, be by plasma enhanced chemical vapor deposition (being called for short PECVD) method successive sedimentation thickness
Gate insulation layer 3, thickness be
Semiconductor layer 4a and doping semiconductor layer 4b, gate insulation layer 3 can be selected oxide, nitride or oxynitrides for use, corresponding reacting gas can be SiH
4, NH
3, N
2Mist or SiH
2Cl
2, NH
3, N
2Mist.Afterwards, by the method for sputter or thermal evaporation, deposit thickness is on doping semiconductor layer 4b
The source leak metal level, metal level is leaked in the source can select metal and alloys thereof such as Cr, W, Ti, Ta, Mo, Al, Cu for use.After metal level is leaked in the source that deposited, by the second time composition technology metal level leaked in the source carry out etching, form drain electrode 5a, source electrode 5b and data wire 5c figure, shown in Fig. 3 a.Next keep photoresist, adopt dry etching method etching doping semiconductor layer 4b, guarantee that doping semiconductor layer (ohmic contact layer) 4b between drain electrode 5a and the source electrode 5b is etched away fully, form doped semiconductor layer pattern and TFT raceway groove 6, shown in Fig. 3 b.
Fig. 4 a for the present invention for the third time composition technology form plane graph behind passivation layer and the semiconductor layer figure, Fig. 4 b be among Fig. 4 a C-C to sectional view.After above-mentioned flow process, by PECVD method deposit thickness be again
Passivation layer 7, passivation layer can adopt oxide, nitride or oxynitrides, corresponding reacting gas can be SiH
4, NH
3, N
2Mist or SiH
2Cl
2, NH
3, N
2Mist.Pass through composition technology for the third time then, carry out gate insulation layer, passivation layer and semiconductor layer etching, etching gas can be selected SF for use
6/ Cl
2, SF
6/ O
2, Cl
2/ O
2Or H Cl/O
2, when forming passivation layer and semiconductor layer figure, form passivation layer via hole 7a in drain electrode 5a position, shown in Fig. 4 a, Fig. 4 b.
Fig. 5 a is for forming the plane graph behind the pixel electrode in the 4th composition technology of the present invention, Fig. 5 b be among Fig. 5 a D-D to sectional view.After forming passivation layer via hole 7a, by the method for sputter or thermal evaporation, deposit thickness is
Transparency conducting layer, transparency conducting layer can be tin indium oxide (IndiumTin Oxide is called for short ITO), forms pixel electrode 8 by the 4th composition technology, pixel electrode 8 is connected with drain electrode 5a by passivation layer via hole 7a, shown in Fig. 5 a, Fig. 5 b.
By the manufacture process of the invention described above TFT-LCD array base palte as can be seen, though the present invention still is four composition technologies, but adopt four composition technologies of slit photoetching process different with prior art, the present invention is at first by the first time composition technology formation grid line and gate electrode figure, by the second time composition technology form source electrode, drain electrode, data wire figure, doping semiconductor layer and TFT raceway groove, form passivation layer and semiconductor layer figure by composition technology for the third time, form pixel electrode by the 4th composition technology.This shows, adopt four composition technologies of slit photoetching process to compare with prior art, the present invention only forms source electrode, drain electrode, data wire, doped semiconductor layer pattern and TFT raceway groove in the composition technology in the second time, but do not form the semiconductor layer figure, the present invention is simultaneously forming semiconductor layer and passivation layer figure in the composition technology for the third time simultaneously, secondary composition technology all adopts conventional lithography process, avoid use slit photoetching process, thereby helped the raising of rate of finished products and product quality.Specifically, adopt in four composition technologies of slit photoetching process in prior art, the TFT raceway groove is to adopt the slit photoetching process to form in the second time in the composition technology, owing to have the making precision of narrow slit structure mask plate certain limitation is arranged, cause the transmitance of zones of different that certain difference is arranged, influence the uniformity of photoresist, in follow-up multistep etching technics (semiconductor layer etching → ashing → dry etching → doping semiconductor layer etching), can cause channel region take place by the slit photoetching process bring various bad.For example, if the channel region place does not have photoresist, it is bad that raceway groove disconnection (Channel Open) then takes place easily, if the photoresist at channel region place is thick partially, it is bad that raceway groove bridging (Channel Bridge) then takes place easily.In technical solution of the present invention, form the TFT raceway groove for the second time in the composition technology and adopt conventional lithography process, rather than employing is based on the multistep etching technics of slit photoetching process, technology is simple, stable, realize High Accuracy Control easily, it is bad not only can to avoid TFT raceway groove place to take place, and improves the uniformity of TFT electrology characteristic on the whole base plate, and rate of finished products and product quality can effectively be ensured.TFT-LCD manufacturing method of array base plate technology of the present invention is simple, stable, realizes process exploitation easily, has reduced equipment configratioin requirement, has not only shortened the production cycle, and has reduced production cost.
In addition, in above-mentioned manufacture process,, need etch away gate insulation layer 3, doping semiconductor layer 4b, semiconductor layer 4a and passivation layer 7, expose grid line for pixel region and peripheral grid line PAD zone.Grid line PAD zone is meant the lead portion of grid line, is actually the via hole that some come out grid line, and its effect is to be loaded on each bar grid line by the input signal of these via holes with the outside, thereby controls closing of TFT on each bar grid line.Grid line PAD zone is covered by transparency conducting layer, because transparency conducting layer is a conductive layer, therefore can not influence the loading of external signal, and this transparency conducting layer can also play the protection grid line.
The structural representation of TFT-LCD array base palte of the present invention is referring to Fig. 5 a, shown in Fig. 5 b, comprise the gate electrode 2a that is respectively formed on the substrate 1 (as glass substrate or quartz base plate), grid line 2b, gate insulation layer 3, semiconductor layer 4a, doping semiconductor layer 4b, drain electrode 5a, source electrode 5b, data wire 5c, passivation layer 7 and pixel electrode 8, wherein gate electrode 2a is connected with grid line 2b and is formed on the substrate 1, gate insulation layer 3 is formed on gate electrode 2a and the grid line 2b, semiconductor layer 4a is formed on gate insulation layer 3, and be positioned at the top of gate electrode 2a, doping semiconductor layer 4b is formed on the semiconductor layer 4a, drain electrode 5a and source electrode 5b are formed on the semiconductor layer 4a, between drain electrode 5a and source electrode 5b, form the TFT raceway groove 6 that exposes semiconductor layer 4a, data wire 5c and drain electrode 5a and source electrode 5b form simultaneously, electrode 5b is connected with the source, and insulate with grid line 2b square crossing, passivation layer 7 is formed on gate electrode 2a, grid line 2b, drain electrode 5a, source electrode 5b, on data wire 5c and the TFT raceway groove 6, and at drain electrode 5a position formation passivation layer via hole 7a, pixel electrode 8 is formed on the substrate 1, and is connected with drain electrode 5a by passivation layer via hole 7a.
Fig. 2 a～Fig. 5 b is the manufacture process schematic diagram of TFT-LCD array base palte of the present invention, and above stated specification can further to define the technical scheme of TFT-LCD array base palte of the present invention, repeats no more here.
It should be noted that at last: above embodiment is only unrestricted in order to technical scheme of the present invention to be described, although the present invention is had been described in detail with reference to preferred embodiment, those of ordinary skill in the art is to be understood that, can make amendment or be equal to replacement technical scheme of the present invention, and not break away from the spirit and scope of technical solution of the present invention.
Claims (6)
1. a TFT-LCD manufacturing method of array base plate is characterized in that, comprising:
Step 1, on substrate deposition grid metal level, by the first time composition technology form gate electrode and grid line figure;
Step 2, metal level is leaked in successive sedimentation gate insulation layer, semiconductor layer, doping semiconductor layer and source on the substrate of completing steps 1, by the second time composition technology form source electrode, drain electrode, data wire and doped semiconductor layer pattern, and form the TFT raceway groove;
Step 3, on the substrate of completing steps 2 deposit passivation layer, form passivation layer and semiconductor layer figure by composition technology for the third time, and form passivation layer via hole;
Step 4, on the substrate of completing steps 3 the deposit transparent conductive layer, form pixel electrode by the 4th composition technology, and pixel electrode is connected with described drain electrode by described passivation layer via hole.
2. TFT-LCD manufacturing method of array base plate according to claim 1, it is characterized in that, described step 1 is specially: adopt the method for sputter or thermal evaporation, deposition one deck grid metal level on substrate, by the first time composition technology on described substrate, form gate electrode and grid line figure.
3. TFT-LCD manufacturing method of array base plate according to claim 1 is characterized in that, described step 2 is specially:
Step 21, on the substrate of completing steps 1 by PECVD method successive sedimentation gate insulation layer, doping semiconductor layer and semiconductor layer;
Step 22, the method sedimentary origin by sputter or thermal evaporation on the substrate of completing steps 21 leak metal level;
Step 23, by the second time composition technology metal level leaked in described source carry out etching, form drain electrode, source electrode and data wire figure;
Step 24, reservation photoresist adopt dry etching method etching doping semiconductor layer, form doped semiconductor layer pattern and TFT raceway groove.
4. TFT-LCD manufacturing method of array base plate according to claim 1 is characterized in that, described step 3 is specially:
Step 31, the PECVD method deposit passivation layer of on the substrate of completing steps 2, passing through;
Step 32, by composition technology for the third time, carry out gate insulation layer, passivation layer and semiconductor layer etching, form passivation layer and semiconductor layer figure, and form passivation layer via hole in described drain electrode position.
5. TFT-LCD manufacturing method of array base plate according to claim 1 is characterized in that, described step 4 is specially:
Step 41, method by sputter or thermal evaporation on the substrate of completing steps 3, the deposit transparent conductive layer;
Step 42, form pixel electrode, described pixel electrode is connected with described drain electrode by described passivation layer via hole by the 4th composition technology.
6. a TFT-LCD array base palte of being made by the described TFT-LCD manufacturing method of array base plate of arbitrary claim in the claim 1～5 is characterized in that, comprising:
Gate electrode and grid line are formed on the substrate;
Gate insulation layer is formed on described gate electrode and the grid line;
Semiconductor layer is formed on the described gate insulation layer, and is positioned at described gate electrode top;
Doping semiconductor layer is formed on the described semiconductor layer;
Source electrode, drain electrode and data wire, wherein source electrode and drain electrode are formed on the described doping semiconductor layer, and form the TFT raceway groove that exposes semiconductor layer between source electrode and drain electrode;
Passivation layer is formed on described gate electrode, grid line, source electrode, drain electrode, data wire and the TFT raceway groove, and forms passivation layer via hole in the drain electrode position;
Pixel electrode is formed on the described substrate, and is connected with described drain electrode by described passivation layer via hole.
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| CN2008101024262A CN101540298B (en) | 2008-03-21 | 2008-03-21 | TFT-LCD array substrate and manufacturing method thereof |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102169852A (en) * | 2011-02-24 | 2011-08-31 | 华映视讯（吴江）有限公司 | Manufacturing method of pixel structure and pixel structure |
| CN102629569A (en) * | 2011-05-03 | 2012-08-08 | 京东方科技集团股份有限公司 | TFT array substrate and method for manufacturing the same |
| WO2019041552A1 (en) * | 2017-08-28 | 2019-03-07 | 武汉华星光电半导体显示技术有限公司 | Manufacturing method for tft substrate and manufacturing method for tft display device |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3617800B2 (en) * | 1999-12-28 | 2005-02-09 | 松下電器産業株式会社 | TFT array substrate and its manufacturing method Liquid crystal display device using the same |
| KR101050292B1 (en) * | 2003-12-27 | 2011-07-19 | 엘지디스플레이 주식회사 | Method of manufacturing thin film transistor array substrate |
-
2008
- 2008-03-21 CN CN2008101024262A patent/CN101540298B/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102169852A (en) * | 2011-02-24 | 2011-08-31 | 华映视讯（吴江）有限公司 | Manufacturing method of pixel structure and pixel structure |
| CN102169852B (en) * | 2011-02-24 | 2013-08-07 | 华映视讯（吴江）有限公司 | Manufacturing method of pixel structure and pixel structure |
| CN102629569A (en) * | 2011-05-03 | 2012-08-08 | 京东方科技集团股份有限公司 | TFT array substrate and method for manufacturing the same |
| WO2019041552A1 (en) * | 2017-08-28 | 2019-03-07 | 武汉华星光电半导体显示技术有限公司 | Manufacturing method for tft substrate and manufacturing method for tft display device |
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| CN101540298B (en) | 2012-02-29 |
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Owner name: BEIJING BOE PHOTOELECTRICITY SCIENCE + TECHNOLOGY Effective date: 20150630 Owner name: JINGDONGFANG SCIENCE AND TECHNOLOGY GROUP CO., LTD Free format text: FORMER OWNER: BEIJING BOE PHOTOELECTRICITY SCIENCE + TECHNOLOGY CO., LTD. Effective date: 20150630 |
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Effective date of registration: 20150630 Address after: 100015 Jiuxianqiao Road, Beijing, No. 10, No. Patentee after: BOE Technology Group Co., Ltd. Patentee after: Beijing BOE Photoelectricity Science & Technology Co., Ltd. Address before: 100176 Beijing economic and Technological Development Zone, West Central Road, No. 8 Patentee before: Beijing BOE Photoelectricity Science & Technology Co., Ltd. |