CN101536108B - 用于存储单元的自适应读写系统和方法 - Google Patents
用于存储单元的自适应读写系统和方法 Download PDFInfo
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- CN101536108B CN101536108B CN2007800410254A CN200780041025A CN101536108B CN 101536108 B CN101536108 B CN 101536108B CN 2007800410254 A CN2007800410254 A CN 2007800410254A CN 200780041025 A CN200780041025 A CN 200780041025A CN 101536108 B CN101536108 B CN 101536108B
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- 230000015654 memory Effects 0.000 title claims abstract description 181
- 238000000034 method Methods 0.000 title claims abstract description 34
- 230000003044 adaptive effect Effects 0.000 title claims abstract description 15
- 238000001514 detection method Methods 0.000 claims abstract description 82
- 238000009826 distribution Methods 0.000 claims abstract description 62
- 238000004364 calculation method Methods 0.000 claims description 27
- 230000001351 cycling effect Effects 0.000 abstract description 5
- 230000001627 detrimental effect Effects 0.000 abstract 1
- 230000006978 adaptation Effects 0.000 description 4
- 230000006870 function Effects 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 1
- 238000013500 data storage Methods 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 230000002939 deleterious effect Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000005315 distribution function Methods 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 230000003252 repetitive effect Effects 0.000 description 1
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Classifications
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/26—Sensing or reading circuits; Data output circuits
- G11C16/28—Sensing or reading circuits; Data output circuits using differential sensing or reference cells, e.g. dummy cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5628—Programming or writing circuits; Data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5642—Sensing or reading circuits; Data output circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/26—Sensing or reading circuits; Data output circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
- G11C2211/563—Multilevel memory reading aspects
- G11C2211/5634—Reference cells
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Read Only Memory (AREA)
Abstract
Description
Claims (23)
Applications Claiming Priority (7)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US86446806P | 2006-11-06 | 2006-11-06 | |
US60/864,468 | 2006-11-06 | ||
US91032507P | 2007-04-05 | 2007-04-05 | |
US60/910,325 | 2007-04-05 | ||
US11/932,829 US7941590B2 (en) | 2006-11-06 | 2007-10-31 | Adaptive read and write systems and methods for memory cells |
US11/932,829 | 2007-10-31 | ||
PCT/US2007/083649 WO2008058082A2 (en) | 2006-11-06 | 2007-11-05 | Adaptive read and write systems and methods for memory cells |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101536108A CN101536108A (zh) | 2009-09-16 |
CN101536108B true CN101536108B (zh) | 2013-02-27 |
Family
ID=39359581
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2007800410254A Active CN101536108B (zh) | 2006-11-06 | 2007-11-05 | 用于存储单元的自适应读写系统和方法 |
Country Status (5)
Country | Link |
---|---|
US (2) | US7941590B2 (zh) |
KR (1) | KR101058568B1 (zh) |
CN (1) | CN101536108B (zh) |
TW (1) | TWI380309B (zh) |
WO (1) | WO2008058082A2 (zh) |
Families Citing this family (45)
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US8645793B2 (en) | 2008-06-03 | 2014-02-04 | Marvell International Ltd. | Statistical tracking for flash memory |
US8725929B1 (en) | 2006-11-06 | 2014-05-13 | Marvell World Trade Ltd. | Adaptive read and write systems and methods for memory cells |
US7941590B2 (en) * | 2006-11-06 | 2011-05-10 | Marvell World Trade Ltd. | Adaptive read and write systems and methods for memory cells |
US7808834B1 (en) | 2007-04-13 | 2010-10-05 | Marvell International Ltd. | Incremental memory refresh |
US8031526B1 (en) | 2007-08-23 | 2011-10-04 | Marvell International Ltd. | Write pre-compensation for nonvolatile memory |
US8189381B1 (en) | 2007-08-28 | 2012-05-29 | Marvell International Ltd. | System and method for reading flash memory cells |
US8085605B2 (en) | 2007-08-29 | 2011-12-27 | Marvell World Trade Ltd. | Sequence detection for flash memory with inter-cell interference |
US8131915B1 (en) | 2008-04-11 | 2012-03-06 | Marvell Intentional Ltd. | Modifying or overwriting data stored in flash memory |
US8683085B1 (en) | 2008-05-06 | 2014-03-25 | Marvell International Ltd. | USB interface configurable for host or device mode |
US8407559B2 (en) * | 2008-06-20 | 2013-03-26 | Marvell World Trade Ltd. | Monitoring memory |
WO2010002945A1 (en) * | 2008-07-01 | 2010-01-07 | Lsi Corporation | Methods and apparatus for intercell interference mitigation using modulation coding |
US8611151B1 (en) | 2008-11-06 | 2013-12-17 | Marvell International Ltd. | Flash memory read performance |
US8947929B1 (en) | 2008-11-06 | 2015-02-03 | Marvell International Ltd. | Flash-based soft information generation |
US8423710B1 (en) | 2009-03-23 | 2013-04-16 | Marvell International Ltd. | Sequential writes to flash memory |
US8213236B1 (en) | 2009-04-21 | 2012-07-03 | Marvell International Ltd. | Flash memory |
US8345477B1 (en) | 2009-07-29 | 2013-01-01 | Marvell International Ltd. | Non-volatile memory devices having uniform error distributions among pages |
KR101662273B1 (ko) * | 2009-11-27 | 2016-10-05 | 삼성전자주식회사 | 비휘발성 메모리 장치, 그것을 포함한 메모리 시스템 및 그것의 마모도 관리 방법 |
US8756394B1 (en) | 2010-07-07 | 2014-06-17 | Marvell International Ltd. | Multi-dimension memory timing tuner |
US8825945B2 (en) | 2011-01-31 | 2014-09-02 | Marvell World Trade Ltd. | Mapping different portions of data to different pages of multi-level non-volatile memory |
US8773904B2 (en) * | 2011-12-28 | 2014-07-08 | Apple Inc. | Optimized threshold search in analog memory cells |
GB201203496D0 (en) | 2012-02-29 | 2012-04-11 | Ibm | Read-detection in solid-state storage devices |
US9645177B2 (en) * | 2012-05-04 | 2017-05-09 | Seagate Technology Llc | Retention-drift-history-based non-volatile memory read threshold optimization |
US8605502B1 (en) | 2012-05-22 | 2013-12-10 | Sandisk Technologies Inc. | Systems and methods of updating read voltages |
US8811076B2 (en) | 2012-07-30 | 2014-08-19 | Sandisk Technologies Inc. | Systems and methods of updating read voltages |
US8874992B2 (en) | 2012-08-31 | 2014-10-28 | Sandisk Technologies Inc. | Systems and methods to initiate updating of reference voltages |
KR102038408B1 (ko) | 2012-10-25 | 2019-10-30 | 삼성전자주식회사 | 회귀 분석법을 사용하는 메모리 시스템 및 그것의 읽기 방법 |
US9349489B2 (en) | 2013-01-11 | 2016-05-24 | Sandisk Technologies Inc. | Systems and methods to update reference voltages in response to data retention in non-volatile memory |
US9318215B2 (en) | 2013-02-14 | 2016-04-19 | Sandisk Technologies Inc. | Systems and methods to update reference voltages of non-volatile memory |
KR102131802B1 (ko) * | 2013-03-15 | 2020-07-08 | 삼성전자주식회사 | 비휘발성 메모리 장치의 데이터 독출 방법, 비휘발성 메모리 장치, 및 메모리 시스템의 구동 방법 |
US9122626B2 (en) * | 2013-05-13 | 2015-09-01 | Seagate Technology Llc | Linearly related threshold voltage offsets |
GB2518632A (en) * | 2013-09-26 | 2015-04-01 | Ibm | Estimation of level-thresholds for memory cells |
KR20150114795A (ko) * | 2014-04-02 | 2015-10-13 | 삼성전자주식회사 | 반도체 메모리 장치의 테스트 방법, 테스트 장치, 및 반도체 메모리 장치의 테스트 프로그램을 저장하는 컴퓨터로 읽을 수 있는 기록 매체 |
TWI492234B (zh) | 2014-04-21 | 2015-07-11 | Silicon Motion Inc | 讀取快閃記憶體中所儲存之資料的方法、記憶體控制器與記憶體系統 |
KR102174030B1 (ko) | 2014-05-13 | 2020-11-05 | 삼성전자주식회사 | 불휘발성 메모리 장치를 포함하는 저장 장치 및 그것의 읽기 방법 |
US9460779B2 (en) * | 2014-05-14 | 2016-10-04 | Macronix International Co., Ltd. | Memory sensing method using one-time sensing table and associated memory device |
US10795765B2 (en) | 2014-07-22 | 2020-10-06 | Ngd Systems, Inc. | SSD for long term data retention |
US10216572B2 (en) * | 2014-07-22 | 2019-02-26 | Ngd Systems, Inc. | Flash channel calibration with multiple lookup tables |
KR102238579B1 (ko) | 2014-08-06 | 2021-04-09 | 삼성전자주식회사 | 메모리 장치의 프로그램 방법 |
US9672928B2 (en) | 2015-11-10 | 2017-06-06 | Samsung Electronics Co., Ltd. | Method and apparatus for estimating read levels of nonvolatile memory and for programming pilot signals used for such estimation |
CN106205714A (zh) * | 2016-06-29 | 2016-12-07 | 联想(北京)有限公司 | 一种数据处理方法、存储设备、电子设备 |
JP2018037123A (ja) * | 2016-08-29 | 2018-03-08 | 東芝メモリ株式会社 | 半導体記憶装置及びメモリシステム |
KR20200099441A (ko) * | 2019-02-14 | 2020-08-24 | 에스케이하이닉스 주식회사 | 메모리 시스템 및 이의 동작 방법 |
TWI685846B (zh) * | 2019-05-30 | 2020-02-21 | 華邦電子股份有限公司 | 非揮發性記憶裝置及其抹除操作方法 |
KR20210027980A (ko) * | 2019-09-03 | 2021-03-11 | 에스케이하이닉스 주식회사 | 메모리 컨트롤러 및 그 동작 방법 |
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2007
- 2007-10-31 US US11/932,829 patent/US7941590B2/en active Active
- 2007-11-05 WO PCT/US2007/083649 patent/WO2008058082A2/en active Application Filing
- 2007-11-05 CN CN2007800410254A patent/CN101536108B/zh active Active
- 2007-11-05 KR KR1020097011581A patent/KR101058568B1/ko active IP Right Grant
- 2007-11-06 TW TW096141922A patent/TWI380309B/zh not_active IP Right Cessation
-
2011
- 2011-04-27 US US13/095,094 patent/US8799556B2/en active Active
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Also Published As
Publication number | Publication date |
---|---|
US20110202711A1 (en) | 2011-08-18 |
TW200828317A (en) | 2008-07-01 |
KR101058568B1 (ko) | 2011-08-23 |
WO2008058082A3 (en) | 2008-09-12 |
WO2008058082A2 (en) | 2008-05-15 |
TWI380309B (en) | 2012-12-21 |
US8799556B2 (en) | 2014-08-05 |
KR20090077856A (ko) | 2009-07-15 |
CN101536108A (zh) | 2009-09-16 |
US7941590B2 (en) | 2011-05-10 |
US20080106936A1 (en) | 2008-05-08 |
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Inventor after: Yang Xueshi Inventor after: Gregory Bird Inventor before: Yang Xueshi Inventor before: Gregory Bird |
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Effective date of registration: 20200430 Address after: Singapore City Patentee after: Marvell Asia Pte. Ltd. Address before: Ford street, Grand Cayman, Cayman Islands Patentee before: Kaiwei international Co. Effective date of registration: 20200430 Address after: Ford street, Grand Cayman, Cayman Islands Patentee after: Kaiwei international Co. Address before: Hamilton, Bermuda Patentee before: Marvell International Ltd. Effective date of registration: 20200430 Address after: Hamilton, Bermuda Patentee after: Marvell International Ltd. Address before: Babado J San Michael Patentee before: MARVELL WORLD TRADE Ltd. |