CN101515913B - Fixed loop control method based on additions and shifts - Google Patents
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Abstract
本发明公开了一种基于移位和加法的定点环路控制方法。针对采用低端处理器或者硬件描述语言实现扩频通信接收机基带信号处理中环路控制的要求,本发明将环路鉴相器采用能够通过移位和加法实现的算法定点实现,将环路滤波器系数以及NCO增益综合考虑,近似为2的整数次幂,通过移位和加法完成环路滤波以及生成新的载波频率控制字和码频率控制字。本发明不但大大降低了环路控制的运算量,而且通过合理选择位宽,可以基本不损失环路跟踪精度。
The invention discloses a fixed-point loop control method based on shift and addition. Aiming at the requirement of using low-end processor or hardware description language to realize the loop control in the baseband signal processing of the spread spectrum communication receiver, the present invention implements the loop phase detector using the fixed-point algorithm that can be realized by shifting and adding, and the loop filter Comprehensive consideration of the device coefficient and NCO gain, which is approximately an integer power of 2, completes loop filtering and generates new carrier frequency control words and code frequency control words through shifting and addition. The invention not only greatly reduces the calculation amount of the loop control, but also basically does not lose the loop tracking precision through reasonable selection of the bit width.
Description
技术领域 technical field
本发明涉及扩频通信接收机相关通道的环路控制领域,具体地说,本发明涉及一种基于移位和加法的定点环路控制方法。The invention relates to the field of loop control of related channels of spread spectrum communication receivers, in particular, the invention relates to a fixed-point loop control method based on shift and addition.
背景技术 Background technique
扩展频谱(spread spectrum)通信系统是建立在C.E.Shannon信息论的理论基础之上的一种比较理想的通信系统。它是指用来传输信息的射频带宽远大于信息本身带宽的一种通信方式。扩频通信系统具有抗干扰性强、截获率低、码分多址、信号隐蔽、保密性强、测距和易于组网等许多独特的优点,目前已经广泛应用于通信、导航、雷达、定位、测距、遥控、航天、电子对抗、移动通信等各个领域。The spread spectrum (spread spectrum) communication system is an ideal communication system based on the theoretical basis of C.E. Shannon's information theory. It refers to a communication method in which the radio frequency bandwidth used to transmit information is much larger than the bandwidth of the information itself. The spread spectrum communication system has many unique advantages such as strong anti-interference, low interception rate, code division multiple access, signal concealment, strong confidentiality, ranging and easy networking. It has been widely used in communication, navigation, radar, positioning , ranging, remote control, aerospace, electronic countermeasures, mobile communications and other fields.
相关通道是直接序列扩频通信接收机的核心处理模块之一,其研究重点主要是围绕信号载波和伪码的跟踪。天线接收的扩频信号,经过低噪声放大器放大,并下变频到中频,然后通过模拟数字转换器(ADC)采样变成数字信号。当扩频接收机完成对扩频信号的捕获后,便将捕获到的码相位和载波多普勒置入相关通道,开始对载波相位和伪码相位进行精确跟踪。The correlation channel is one of the core processing modules of the direct sequence spread spectrum communication receiver, and its research focus is mainly on the tracking of signal carrier and pseudo code. The spread-spectrum signal received by the antenna is amplified by a low-noise amplifier, down-converted to an intermediate frequency, and then sampled by an analog-to-digital converter (ADC) to become a digital signal. When the spread-spectrum receiver finishes capturing the spread-spectrum signal, it puts the captured code phase and carrier Doppler into the relevant channel, and begins to accurately track the carrier phase and pseudo-code phase.
相关通道由相关器、环路控制、数据提取、观测量提取等模块构成。相关器一般由现场可编程门阵列(FPGA)或专用集成电路(ASIC)实现,其完成对载波和伪码的剥离,并实现预检测积分。环路控制模块根据相关器输出的同相(I)路和正交(Q)路的超前、即时和滞后累加和,通过鉴相、滤波以及生成新的载波频率控制字和码频率控制字实现对相关通道的反馈控制。当环路锁定时,即可进行数据的位同步、帧同步,以及伪距、多普勒频率等观测量的提取。The correlation channel is composed of correlator, loop control, data extraction, observation extraction and other modules. The correlator is generally implemented by a Field Programmable Gate Array (FPGA) or an Application Specific Integrated Circuit (ASIC), which completes the stripping of the carrier and pseudo code, and realizes pre-detection integration. The loop control module implements phase detection, filtering and generation of new carrier frequency control words and code frequency control words according to the lead, instant and lag accumulation sums of the in-phase (I) path and quadrature (Q) path output by the correlator. Feedback control of the associated channel. When the loop is locked, the bit synchronization and frame synchronization of the data can be performed, as well as the extraction of observations such as pseudorange and Doppler frequency.
载波跟踪环和码跟踪环的环路控制结构一样,都是由鉴相器、滤波器以及数控振荡器(NCO)三部分组成。载波跟踪环采用对数据调制不敏感的科斯塔斯(Costas)环实现对载波相位的精确跟踪。一个良好设计的载波跟踪环应该先用工作在宽频带的对动态更为牢固的锁频环(FLL)将环路闭合起来,然后逐渐过渡到大带宽的Costas环工作,最后再将Costas环带宽变窄到稳态工作模式。码跟踪环采用延迟锁定环(DLL)实现对伪码相位的精确跟踪。由于载波环辅助码环技术可以消除码环中的所有动态,所以码环带宽相对于载波环带宽可以做得很窄,以提高伪距精度。The loop control structure of the carrier tracking loop and the code tracking loop is the same, and they are composed of three parts: a phase detector, a filter, and a numerically controlled oscillator (NCO). The carrier tracking loop adopts the Costas loop which is insensitive to data modulation to realize the precise tracking of the carrier phase. A well-designed carrier tracking loop should first close the loop with a frequency-locked loop (FLL) that works in a wide frequency band and is more robust to dynamics, then gradually transition to a large-bandwidth Costas loop, and finally increase the bandwidth of the Costas loop. narrowed to steady state mode of operation. The code tracking loop uses a delay-locked loop (DLL) to realize accurate tracking of the pseudo-code phase. Since the carrier loop-assisted code loop technology can eliminate all the dynamics in the code loop, the bandwidth of the code loop can be narrowed relative to the bandwidth of the carrier loop to improve the pseudo-range accuracy.
目前关于环路控制的理论分析,以及相应的性能指标都有很成熟的结论。但在实现时一般采用浮点环路控制,虽然不会损失精度,但这使得对处理器的要求较高,且很难用硬件描述语言直接硬件实现。At present, there are very mature conclusions about the theoretical analysis of loop control and the corresponding performance indicators. However, floating-point loop control is generally used in the implementation. Although the precision will not be lost, this makes the requirements for the processor higher, and it is difficult to implement it directly in hardware with a hardware description language.
发明内容 Contents of the invention
本发明所要解决的技术问题是:针对采用低端处理器或者硬件描述语言实现扩频通信接收机基带信号处理中环路控制的要求,提出了一种基于移位和加法的定点环路控制方法,它通过下列步骤实现:The technical problem to be solved by the present invention is: Aiming at the requirement of using low-end processor or hardware description language to realize the loop control in the baseband signal processing of the spread spectrum communication receiver, a fixed-point loop control method based on shift and addition is proposed, It is achieved through the following steps:
a.相关器完成积分累加后输出6个累加结果,环路控制模块根据这6个累加结果实现对载波跟踪环和码跟踪环的控制;a. After the correlator completes the integral accumulation, it outputs 6 accumulation results, and the loop control module realizes the control of the carrier tracking loop and the code tracking loop according to the 6 accumulation results;
b.采用坐标旋转数字计算(Cordic)算法实现二象限反正切(atan),完成载波环鉴相器的工作,即atan(QP/IP),形成载波环鉴相误差x(n);b. Use the coordinate rotation digital calculation (Cordic) algorithm to realize the two-quadrant arc tangent (atan), complete the work of the carrier loop phase detector, that is, atan (Q P /I P ), and form the carrier loop phase detector error x(n);
c.对载波环鉴相误差x(n)、载波环中间变量u(n-1)和u(n-2),经过适当移位和加法运算后,实现载波环滤波器,形成载波环滤波器输出z(n)和新的载波环中间变量u(n);c. For the carrier loop phase detection error x(n), carrier loop intermediate variables u(n-1) and u(n-2), after appropriate shift and addition operations, the carrier loop filter is realized to form a carrier loop filter The device outputs z(n) and the new carrier ring intermediate variable u(n);
d.载波环滤波器输出z(n),加上载波中频频率控制字,形成新的载波频率控制字,反馈到跟踪环路对载波环进行控制;d. The carrier loop filter output z (n), plus the carrier intermediate frequency frequency control word, forms a new carrier frequency control word, and feeds back to the tracking loop to control the carrier loop;
e.更新载波环中间变量,以供下一次环路控制使用,至此,载波环环路控制完成;e. Update the intermediate variable of the carrier loop for use in the next loop control, so far, the loop control of the carrier loop is completed;
f.采用近似算法计算包络,分别完成对超前和滞后累加和包络的计算;f. Using an approximate algorithm to calculate the envelope, respectively complete the calculation of the lead and lag accumulation and the envelope;
g.采用基于移位和加法的二进制除法模块完成码环的鉴相器工作,形成码环鉴相误差x(n);g. Adopt the binary division module based on shift and addition to complete the phase detector work of the code ring to form the code ring phase detection error x(n);
h.对码环鉴相误差x(n)、码环中间变量u(n-1),经过适当移位和加法运算后,实现码环滤波器,形成码环滤波器输出z(n)和新的码环中间变量u(n);h. For the code ring phase detection error x(n) and the code ring intermediate variable u(n-1), after appropriate shifting and addition operations, the code ring filter is realized to form the code ring filter output z(n) and New code ring intermediate variable u(n);
i.码环滤波器输出z(n),加上载波环滤波器输出z(n)除以比例因子得到的载波辅助参数,再加上码中频频率控制字,形成新的码频率控制字,反馈到跟踪环路对码环进行控制;i. code loop filter output z (n), add carrier loop filter output z (n) divided by the carrier auxiliary parameter that scale factor obtains, add code intermediate frequency frequency control word again, form new code frequency control word, Feedback to the tracking loop to control the code loop;
j.更新码环中间变量,以供下一次环路控制使用,至此,码环环路控制完成。j. Update the intermediate variable of the code loop for use in the next loop control, so far, the loop control of the code loop is completed.
在上述步骤c中,载波环滤波器为三阶滤波器,采用直接II型实现,并将滤波器系数以及NCO增益综合考虑,近似为2的整数次幂,采用移位实现,移位数量可根据设计的环路带宽决定。In the above step c, the carrier loop filter is a third-order filter, which is realized by direct type II, and the filter coefficient and NCO gain are considered comprehensively, which is approximately an integer power of 2, and is realized by shifting, and the number of shifts can be Determined according to the designed loop bandwidth.
在上述步骤h中,码环滤波器为二阶滤波器,采用直接II型实现,并将滤波器系数以及NCO增益综合考虑,近似为2的整数次幂,采用移位实现,移位数量可根据设计的环路带宽决定。In the above step h, the code ring filter is a second-order filter, which is realized by direct type II, and the filter coefficient and NCO gain are considered comprehensively, which is approximately an integer power of 2, and is realized by shifting, and the number of shifts can be Determined according to the designed loop bandwidth.
本发明与现有技术相比,最大的特点在于整个环路控制过程中,所有的操作均简化为一系列移位和加法操作,并通过合理选择位宽,基本不损失跟踪精度。这使得环路控制的实现可以采用很低端的处理器,或者还可以用硬件描述语言直接硬件实现。所以本发明具有运算量低,实现方式简单,不影响环路跟踪精度的优点。Compared with the prior art, the biggest feature of the present invention is that in the whole loop control process, all operations are simplified to a series of shift and addition operations, and the tracking accuracy is basically not lost through reasonable selection of the bit width. This makes the implementation of the loop control can adopt a very low-end processor, or can also be directly implemented in hardware with a hardware description language. Therefore, the present invention has the advantages of low calculation amount, simple implementation mode and no influence on loop tracking precision.
附图说明 Description of drawings
通过下面结合附图进行的详细描述,本发明的上述和其它目的和特点将会变得更加清楚,其中:The above-mentioned and other objects and features of the present invention will become clearer through the following detailed description in conjunction with the accompanying drawings, wherein:
图1是扩频通信接收机相关通道的典型框图。Figure 1 is a typical block diagram of the relevant channels of a spread spectrum communication receiver.
图2是相关通道中定点环路控制的实现方法。Fig. 2 is the implementation method of the fixed-point loop control in the relevant channel.
图3是Cordic算法的迭代框图。Figure 3 is an iterative block diagram of the Cordic algorithm.
图4是载波跟踪环的数字滤波器结构框图。Figure 4 is a block diagram of the digital filter structure of the carrier tracking loop.
图5是采用移位和加法实现二进制除法的结构框图。Fig. 5 is a structural block diagram of implementing binary division by shifting and adding.
图6是码跟踪环的数字滤波器结构框图。Figure 6 is a block diagram of the digital filter structure of the code tracking loop.
具体实施方式 Detailed ways
参照下面结合附图对示例性实施例的详细描述,本发明的优点和特点以及实现的方法可更容易地理解。The advantages and features of the present invention and the method of realization can be more easily understood with reference to the following detailed description of the exemplary embodiments in conjunction with the accompanying drawings.
图1是目前扩频通信接收机广泛采用的相关通道的典型框图。采样数据进入相关通道后,首先与本地的正余弦载波相乘实现载波剥离,以产生同相(I)和正交(Q)数据,然后分别与本地产生的超前(E)、即时(P)和滞后(L)的复现码相乘实现码剥离,并进行积分累加。环路控制模块根据相关器的积分累加结果生成新的载波频率控制字和码频率控制字,对跟踪环路进行反馈控制。Fig. 1 is a typical block diagram of correlation channels widely used in spread spectrum communication receivers at present. After the sampling data enters the relevant channel, it is firstly multiplied with the local sine-cosine carrier to realize carrier stripping to generate in-phase (I) and quadrature (Q) data, and then respectively combined with the locally generated lead (E), instant (P) and Lag (L) recurring codes are multiplied to realize code stripping, and integral accumulation is carried out. The loop control module generates a new carrier frequency control word and code frequency control word according to the integration and accumulation results of the correlator, and performs feedback control on the tracking loop.
图2是相关通道中定点环路控制的实现方法,分为载波环控制和码环控制两大部分。它通过以下几个步骤实现。Figure 2 is the realization method of the fixed-point loop control in the relevant channel, which is divided into two parts: the carrier loop control and the code loop control. It is achieved through the following steps.
a.相关器完成积分累加后输出6个累加结果,即同相超前(IE)、同相即时(IP)、同相滞后(IL)、正交超前(QE)、正交即时(QP)、正交滞后(QL),载波跟踪环采用IP和QP进行控制,码环采用IE、IL、QE和QL进行控制。a. After the correlator completes the integration and accumulation, it outputs 6 accumulation results, namely in-phase lead (I E ), in-phase instant (I P ), in-phase lag (I L ), quadrature lead (Q E ), quadrature instant (Q P ), quadrature lag (Q L ), the carrier tracking loop is controlled by I P and Q P , and the code loop is controlled by I E , I L , Q E and Q L.
b.采用Cordic算法实现二象限反正切atan,完成载波环鉴相器的工作,即atan(QP/IP),形成载波环鉴相误差x(n)。鉴相结果的数据范围为[-π/2,π/2],当采用定点实现时需要采用Q格式表示法对其进行表示,即x(n)是被扩位了的鉴相结果,待滤波完后再舍掉相同位数即可。x(n)的Q格式由Cordic算法中查找表内容的Q格式决定,一般取Q30,但将x(n)输入到环路滤波器时,采用Q30会占据过大的位宽,可将其截取到Q5,再小会影响载波环的精度。b. Use the Cordic algorithm to realize the two-quadrant arc tangent atan, and complete the work of the carrier loop phase detector, that is, atan(Q P /I P ), to form the carrier loop phase detector error x(n). The data range of the phase detection result is [-π/2, π/2], and it needs to be represented by the Q format notation when using fixed-point implementation, that is, x(n) is the expanded phase detection result, to be After filtering, the same number of digits can be discarded. The Q format of x(n) is determined by the Q format of the lookup table content in the Cordic algorithm. Generally, Q30 is used, but when x(n) is input to the loop filter, using Q30 will occupy too large a bit width, and it can be Intercept to Q5, no matter how small it will affect the accuracy of the carrier loop.
c.采用一系列移位和加法实现载波环滤波器,形成载波环滤波器输出z(n)和新的载波环中间变量u(n)。载波环滤波器采用三阶滤波器,可以对加速度进行稳定跟踪。载波环滤波器输出z(n)一共由6项相加组成,分别是:c. The carrier loop filter is implemented by a series of shifts and additions to form the carrier loop filter output z(n) and the new carrier loop intermediate variable u(n). The carrier loop filter uses a third-order filter, which can track the acceleration stably. The output z(n) of the carrier loop filter consists of a total of 6 additions, which are:
载波环相位误差x(n)左移a位;The phase error x(n) of the carrier loop is shifted to the left by a bit;
载波环相位误差x(n)左移b位;The phase error x(n) of the carrier loop is shifted to the left by b bits;
载波环相位误差x(n)左移c位;The phase error x(n) of the carrier loop is shifted to the left by c bits;
载波环前一个时刻中间变量u(n-1)左移(a+2)位;The intermediate variable u(n-1) is shifted to the left by (a+2) bits at a moment before the carrier loop;
载波环前一个时刻中间变量u(n-1)左移(b+1)位;The intermediate variable u(n-1) is shifted to the left by (b+1) bits at a moment before the carrier loop;
载波环前两个时刻中间变量u(n-2)左移(b+1)位;The intermediate variable u(n-2) in the first two moments of the carrier loop is shifted to the left by (b+1) bits;
新的载波环中间变量u(n)一共由3项相加组成,分别是:The new carrier ring intermediate variable u(n) is composed of three additions, which are:
相位误差x(n);phase error x(n);
载波环前一个时刻中间变量u(n-1)左移1位;The intermediate variable u(n-1) at the moment before the carrier loop is shifted left by 1 bit;
载波环前两个时刻中间变量u(n-2)取负;The intermediate variable u(n-2) in the first two moments of the carrier loop is negative;
其中a、b、c都是指移位数量,为正表示左移,为负表示右移。Among them, a, b, and c all refer to the amount of shifting, positive means shifting to the left, and negative means shifting to the right.
d.载波环滤波器输出z(n)舍掉在鉴相时扩的位数后,加上载波中频频率控制字,即形成新的载波频率控制字,反馈到跟踪环路对载波环进行控制。d. Carrier loop filter output z(n) discards the number of digits in the phase detection time expansion, and adds the carrier intermediate frequency frequency control word to form a new carrier frequency control word, which is fed back to the tracking loop to control the carrier loop .
e.更新载波环中间变量,将u(n-2)更新为u(n-1),将u(n-1)更新为新形成的u(n),以供下一次环路控制使用。至此,载波环环路控制完成。e. Update the intermediate variable of the carrier loop, update u(n-2) to u(n-1), and update u(n-1) to the newly formed u(n), for use in the next loop control. So far, the loop control of the carrier loop is completed.
f.采用近似算法计算包络,分别完成对超前和滞后累加和包络的计算,即形成
g.采用基于移位和加法的二进制除法模块完成码环的鉴相器工作,形成码环鉴相误差x(n),即g. Use the binary division module based on shift and addition to complete the phase detector work of the code ring to form the phase detection error x(n) of the code ring, namely
与载波环鉴相器类似,由于(E-L)/(E+L)的结果范围为[-1,1],所以也需要采用Q格式表示法对其进行表示,即鉴相器输出的结果是被扩位了的数据,待滤波完后再舍掉相同位数即可。具体的扩位位数由仿真确定为7。另外,码环鉴相器的除2操作可暂时不做,留到滤波后舍位时一并进行。Similar to the carrier loop phase detector, since the result range of (E-L)/(E+L) is [-1, 1], it also needs to be expressed in Q format notation, that is, the output result of the phase detector is For the expanded data, the same number of digits can be discarded after filtering. The specific number of extended bits is determined to be 7 by simulation. In addition, the division by 2 operation of the code ring phase detector can be omitted for the time being, and it will be performed together when truncation is performed after filtering.
h.采用一系列移位和加法实现码环滤波器,形成码环滤波器输出z(n)和新的码环中间变量u(n)。由于载波环会辅助码环消除所有的动态,所以码环滤波器采用二阶滤波器。码环滤波器输出z(n)一共由3项相加组成,分别是:h. Using a series of shifts and additions to realize the code ring filter to form the code ring filter output z(n) and the new code ring intermediate variable u(n). Since the carrier loop will assist the code loop to eliminate all dynamics, the code loop filter uses a second-order filter. The output z(n) of the code ring filter consists of a total of 3 additions, which are:
码环相位误差x(n)左移d位;The phase error x(n) of the code ring is shifted to the left by d bits;
码环相位误差x(n)左移e位;The phase error x(n) of the code ring is shifted to the left by e bits;
码环前一个时刻中间变量u(n-1)左移(d+1)位;The intermediate variable u(n-1) is shifted to the left by (d+1) bits at a moment before the code ring;
新的码环中间变量u(n)一共由2项相加组成,分别是:The new code ring intermediate variable u(n) is composed of two additions, which are:
码环相位误差x(n);Code ring phase error x(n);
码环前一个时刻中间变量u(n-1);The intermediate variable u(n-1) at the moment before the code ring;
其中d、e都是指移位数量,为正表示左移,为负表示右移。Among them, d and e both refer to the number of shifts, positive for left shift, negative for right shift.
i.码环滤波器输出z(n)舍掉在鉴相时扩的位数后,加上载波环滤波器输出z(n)除以比例因子得到的载波辅助参数,再加上码中频频率控制字,即形成新的码频率控制字,反馈到跟踪环路对码环进行控制。i. After the code loop filter output z(n) discards the number of digits in the phase detection time expansion, add the carrier auxiliary parameter obtained by dividing the carrier loop filter output z(n) by the scale factor, plus the code intermediate frequency frequency The control word, that is to form a new code frequency control word, is fed back to the tracking loop to control the code loop.
j更新码环中间变量,将u(n-1)更新为新形成的u(n),以供下一次环路控制使用。至此,码环环路控制完成。j updates the intermediate variable of the code loop, and updates u(n-1) to the newly formed u(n), which is used for the next loop control. So far, the code loop loop control is completed.
对于上述步骤b,图3是Cordic算法的迭代框图。Cordic算法即坐标旋转数字计算方法(Coordinate Rotation Digital Computer),可以进行很多数学运算,比如正弦、余弦、复乘、反正切,求模等。当用Cordic算法算法计算二象限反正切时,将其工作在向量模式,即For the above step b, Fig. 3 is an iterative block diagram of the Cordic algorithm. The Cordic algorithm is the coordinate rotation digital calculation method (Coordinate Rotation Digital Computer), which can perform many mathematical operations, such as sine, cosine, complex multiplication, arctangent, and modulus. When using the Cordic algorithm to calculate the two-quadrant arc tangent, it works in the vector mode, that is
xi+1=xi-yi·di·2-i x i+1 = x i -y i ·d i ·2 -i
yi+1=yi+xi·di·2-i y i+1 =y i +x i ·d i ·2 -i
zi+1=zi-di·tan-1(2-i)z i+1 = z i -d i ·tan -1 (2 -i )
其中当yi<0时di=1,当yi>0时,di=-1。经过若干次迭代后,得到Wherein, when y i <0, d i =1, and when y i >0, d i =-1. After several iterations, we get
yn=0y n =0
zn=z0+tan-1(y0/x0)z n =z 0 +tan -1 (y 0 /x 0 )
上述算法中tan-1(2-i)的运算可以使用查表实现,乘以2-i运算可以使用移位实现,这样计算atan的过程就由加法、移位和查表来实现了。由于Cordic算法旋转的角度在-π/2到π/2之间,所以在用其计算atan时,必须保证x>0。当x<0时,需要先将x和y都取反,然后再进行运算。In the above algorithm, the operation of tan -1 (2 -i ) can be realized by using table lookup, and the operation of multiplying by 2 -i can be realized by shifting, so that the process of calculating atan is realized by addition, shifting and table lookup. Since the rotation angle of the Cordic algorithm is between -π/2 and π/2, when using it to calculate atan, it must be guaranteed that x>0. When x<0, you need to invert both x and y first, and then perform the operation.
对于上述步骤c,下面阐述载波跟踪环滤波器中移位数量a、b、c的设计方法。图4是载波跟踪环的数字滤波器结构框图,其数学表达式为For the above step c, the design method of the shift quantities a, b, and c in the carrier tracking loop filter is described below. Figure 4 is a block diagram of the digital filter structure of the carrier tracking loop, and its mathematical expression is
y(n)=2y(n-1)-y(n-2)+b0*x(n)+b1*x(n-1)+b2*x(n-2)y(n)=2y(n-1)-y(n-2)+b0*x(n)+b1*x(n-1)+b2*x(n-2)
b0、b1和b2由环路参数决定,即b0, b1 and b2 are determined by the loop parameters, namely
b0=k1+k2+k3b0=k1+k2+k3
b1=2*(k1-k3)b1=2*(k1-k3)
b2=k1-k2+k3b2=k1-k2+k3
其中in
a3=1.1,b3=2.4;a3=1.1, b3=2.4;
T为积分累加时间;T is the integral accumulation time;
ω0为环路自然圆频率,其大小由环路带宽决定。ω 0 is the natural circular frequency of the loop, and its size is determined by the loop bandwidth.
当采用定点方式实现该滤波器时,首先将其结构改为直接II型实现,即When implementing the filter in a fixed-point manner, first change its structure to a direct Type II implementation, that is,
u(n)=x(n)+2u(n-1)-u(n-2)u(n)=x(n)+2u(n-1)-u(n-2)
y(n)=b0*u(n)+b1*u(n-1)+b2*u(n-2)y(n)=b0*u(n)+b1*u(n-1)+b2*u(n-2)
=(k1+k2+k3)*u(n)+2*(k1-k3)*u(n-1)+(k1-k2+k3)*u(n-2)=(k1+k2+k3)*u(n)+2*(k1-k3)*u(n-1)+(k1-k2+k3)*u(n-2)
=k1*[u(n)+2*u(n-1)+u(n-2)]+k2*[u(n)-u(n-2)]=k1*[u(n)+2*u(n-1)+u(n-2)]+k2*[u(n)-u(n-2)]
+k3*[u(n)-2*u(n-1)+u(n-2)]+k3*[u(n)-2*u(n-1)+u(n-2)]
=k1*[x(n)+4*u(n-1)]+k2*[x(n)+2*u(n-1)-2*u(n-2)]=k1*[x(n)+4*u(n-1)]+k2*[x(n)+2*u(n-1)-2*u(n-2)]
+k3*x(n)+k3*x(n)
载波环NCO采用Nbit累加器实现。对于载波环NCO增益,其单位是radiansper second per unit,意义是每控制的1个unit在1秒内代表物理上的多少弧度,即The carrier loop NCO is implemented with an Nbit accumulator. For the NCO gain of the carrier loop, its unit is radiansper second per unit, which means that each controlled unit represents how many radians physically in 1 second, that is
由于载波NCO存在增益K,所以反馈给相关通道的载波频率控制字要除以该增益,即Since the carrier NCO has a gain K, the carrier frequency control word fed back to the relevant channel should be divided by the gain, that is
z(n)=y(n)/Kz(n)=y(n)/K
=k1/K*[x(n)+4*u(n-1)]+k2/K*[x(n)+2*u(n-1)-2*u(n-2)]=k1/K*[x(n)+4*u(n-1)]+k2/K*[x(n)+2*u(n-1)-2*u(n-2)]
+k3/K*x(n)+k3/K*x(n)
=h1*[x(n)+4*u(n-1)]+h2*[x(n)+2*u(n-1)-2*u(n-2)]=h1*[x(n)+4*u(n-1)]+h2*[x(n)+2*u(n-1)-2*u(n-2)]
+h3*x(n)+h3*x(n)
将h1、h2和h3近似为2的整数次幂,这样就可以通过移位的方式实现乘法操作。最后得到的载波环滤波器实现方式为Approximate h1, h2, and h3 to an integer power of 2, so that multiplication can be realized by shifting. The final implementation of the carrier loop filter is
u(n)=x(n)+[u(n-1)<<1]-u(n-2)u(n)=x(n)+[u(n-1)<<1]-u(n-2)
z(n)=[x(n)<<a]+[u(n-1)<<(a+2)]+[x(n)<<b]z(n)=[x(n)<<a]+[u(n-1)<<(a+2)]+[x(n)<<b]
+[u(n-1)<<(b+1)]-[u(n-2)<<(b+1)]+[x(n)<<c]+[u(n-1)<<(b+1)]-[u(n-2)<<(b+1)]+[x(n)<<c]
其中a、b、c都是指移位的数量,其大小由环路参数决定,为正时表示左移,为负时表示右移。Among them, a, b, and c all refer to the number of shifts, and its size is determined by the loop parameters. When it is positive, it means shifting to the left, and when it is negative, it means shifting to the right.
载波环滤波器的输出z(n)加上载波中频对应的频率控制字fi/fs·2N,即为反馈到载波环NCO的频率控制字,同时z(n)还会对码环进行辅助。The output z(n) of the carrier loop filter plus the frequency control word f i /
对于上述步骤f中所用到的JPL算法,是由美国喷气推进实验室(JPL)提出的计算包络的简便方法,即对于
A=X+1/8Y 当X≥3Y时A=X+1/8Y When X≥3Y
A=7/8X+1/2Y 当X≤3Y时A=7/8X+1/2Y When X≤3Y
其中X=MAX(|I|,|Q|),Y=MIN(|I|,|Q|)。将上述运算采用移位方式实现,即where X=MAX(|I|, |Q|), Y=MIN(|I|, |Q|). The above operation is realized by shifting, that is,
A=X+(Y>>3) 当X≥[Y+(Y<<1)]时A=X+(Y>>3) When X≥[Y+(Y<<1)]
A=X-(X>>3)+(Y>>1)当X≤[Y+(Y<<1)]时A=X-(X>>3)+(Y>>1) when X≤[Y+(Y<<1)]
对于上述步骤g和步骤i所用到的除法,图5示出了采用移位和加法实现二进制除法的实现框图。二进制除法实质上就是用除数和被除数进行比较,看看在被除数中有多少个除数,因此除法运算的过程,就是从被除数中减去多少个除数的过程。在比较的过程中,首先将除数的最低位对齐被除数的最高位,用被除数减去除数,如果够减,说明被除数高位中包含1个除数,则图中开关闭合,从被除数中减去除数,同时在商的对应位置上置1;反之,被除数高位中不包含除数,开关不闭合,在商的对应位置上置0。然后不断将除数移位继续比较,当所有位均比较完毕时,就完成了商的计算。需要注意的是,该除法器只能适应被除数和除数都是正数的情况,对于被除数或除数为负数的情况,需要首先将其变为正数,然后再根据被除数和除数的符号位确定商的符号位。For the division used in the above step g and step i, Fig. 5 shows a block diagram for implementing binary division by shifting and adding. Binary division is essentially to compare the divisor with the dividend to see how many divisors there are in the dividend. Therefore, the process of division operation is the process of subtracting the number of divisors from the dividend. In the process of comparison, first align the lowest bit of the divisor with the highest bit of the dividend, and subtract the divisor from the dividend. If it is enough, it means that the high bit of the dividend contains a divisor. Then the switch in the figure is closed, and the divisor is subtracted from the dividend. At the same time, set 1 in the corresponding position of the quotient; otherwise, if the high bit of the dividend does not contain the divisor, and the switch is not closed, set 0 in the corresponding position of the quotient. Then continuously shift the divisor to continue the comparison, and when all the bits are compared, the calculation of the quotient is completed. It should be noted that this divider can only adapt to the case where both the dividend and the divisor are positive numbers. For the case where the dividend or the divisor is a negative number, it needs to be turned into a positive number first, and then the quotient is determined according to the sign bits of the dividend and the divisor sign bit.
对于上述步骤h,下面阐述码跟踪环滤波器中移位数量d、e的设计方法。图6是码跟踪环的数字滤波器结构框图,其数学表达式为For the above step h, the design method of the shift numbers d and e in the code tracking loop filter will be described below. Figure 6 is a block diagram of the digital filter structure of the code tracking loop, and its mathematical expression is
y(n)=y(n-1)+b0*x(n)+b1*x(n-1)y(n)=y(n-1)+b0*x(n)+b1*x(n-1)
b0和b1由环路参数决定,即b0 and b1 are determined by the loop parameters, namely
b0=k1+k2b0=k1+k2
b1=k1-k2b1=k1-k2
其中in
a2=1.414;a2=1.414;
T为积分累加时间;T is the integral accumulation time;
ω0为环路自然圆频率,其大小由环路带宽决定。ω 0 is the natural circular frequency of the loop, and its size is determined by the loop bandwidth.
与载波环滤波器设计方法类似,将其结构改为直接II型实现,即Similar to the carrier loop filter design method, its structure is changed to a direct type II implementation, namely
u(n)=x(n)+u(n-1)u(n)=x(n)+u(n-1)
y(n)=(k1+k2)*u(n)+(k1-k2)*u(n-1)y(n)=(k1+k2)*u(n)+(k1-k2)*u(n-1)
=k1*[x(n)+2*u(n-1)]+k2*x(n)=k1*[x(n)+2*u(n-1)]+k2*x(n)
码环NCO也采用Nbit累加器实现。对于码环NCO增益,其单位是code persecond per unit,意义是每控制的1个unit在1秒内代表物理上的多少码片,即The code ring NCO is also realized by Nbit accumulator. For the NCO gain of the code ring, its unit is code per second per unit, which means that each controlled unit represents how many chips physically in 1 second, that is
反馈给相关通道的码频率控制字为The code frequency control word fed back to the relevant channel is
z(n)=y(n)/K=k1/K*[x(n)+2*u(n-1)]+k2/K*x(n)z(n)=y(n)/K=k1/K*[x(n)+2*u(n-1)]+k2/K*x(n)
=h1*[x(n)+2*u(n-1)]+h2*x(n)=h1*[x(n)+2*u(n-1)]+h2*x(n)
将h1和h2近似为2的整数次幂,这样就可以通过移位的方式实现乘法操作。最后得到的码环滤波器实现方式为Approximate h1 and h2 to an integer power of 2, so that the multiplication operation can be realized by shifting. The final implementation of the code loop filter is
u(n)=x(n)+u(n-1)u(n)=x(n)+u(n-1)
z(n)=[x(n)<<d]+[u(n-1)<<(d+1)]+[x(n)<<e]z(n)=[x(n)<<d]+[u(n-1)<<(d+1)]+[x(n)<<e]
其中d、e都是指移位的数量,其大小由环路参数决定。为正时表示左移,为负时表示右移。Among them, d and e both refer to the number of shifts, and their size is determined by the loop parameters. When it is positive, it means shifting to the left, and when it is negative, it means shifting to the right.
码环滤波器的输出z(n)加上载波环滤波器输出z(n)除以比例因子得到的载波辅助参数,再加上码中频对应的频率控制字fc/fs·2N,即为反馈到码环NCO的频率控制字。The output z(n) of the code loop filter plus the carrier auxiliary parameter obtained by dividing the output z(n) of the carrier loop filter by the scaling factor, plus the frequency control word f c /
下面以GPS系统为例,给出环路滤波器移位数量的设计示例。假设GPS接收机采样率为fs=5MHz,积分累加时间为T=1ms,载波NCO和码NCO位宽均为N=32bit。首先给出载波环滤波器的设计示例。Taking the GPS system as an example below, a design example of the shift quantity of the loop filter is given. Assume that the sampling rate of the GPS receiver is fs=5MHz, the integration and accumulation time is T=1ms, and the bit width of the carrier NCO and the code NCO is N=32bit. Firstly, a design example of a carrier loop filter is given.
假设环路带宽设计为Bn=15Hz,则ω0=Bn/0.7845=38.241,然后计算h1、h2和h3得到Suppose the loop bandwidth is designed as Bn=15Hz, then ω 0 =B n /0.7845=38.241, then calculate h1, h2 and h3 to get
将h1、h2和h3近似到2的整数次幂,即令h1=1/4,h2=32,h3=8192,然后反推环路系数,由h1计算ω0,然后由h2和ω0计算a3,由h3和ω0计算b3,最后由a3、b3和ω0计算环路带宽Bn,即Approximate h1, h2 and h3 to the integer power of 2, that is, set h1=1/4, h2=32, h3=8192, then invert the loop coefficient, calculate ω 0 from h1, and then calculate a from h2 and ω 0 3 , calculate b 3 from h3 and ω 0 , and finally calculate the loop bandwidth B n from a 3 , b 3 and ω 0 , namely
由于将h1、h2和h3取了近似,所以所有参数都与预先的设计值不同。参数a3和b3虽然不是预先设计的1.1和2.4,但其取值也比较接近设计值,只是会影响环路的瞬态响应,对环路的稳态跟踪性能影响不大。环路带宽比设计值略大,会增加些噪声,但可以通过修改h1、h2和h3进行更改。下表列出了不同组合的h1、h2和h3,相应的环路参数以及移位数量。Since h1, h2 and h3 are approximated, all parameters are different from the pre-designed values. Although the parameters a 3 and b 3 are not pre-designed 1.1 and 2.4, their values are relatively close to the design values, which only affect the transient response of the loop and have little impact on the steady-state tracking performance of the loop. The loop bandwidth is slightly larger than the design value, which will increase some noise, but it can be changed by modifying h1, h2 and h3. The following table lists different combinations of h1, h2 and h3, the corresponding loop parameters and the number of shifts.
码环的设计方法与载波环类似。假设环路带宽设计为Bn=1Hz,则ω0=Bn/0.53=1.89,然后计算h1和h2得到The design method of the code ring is similar to that of the carrier ring. Suppose the loop bandwidth is designed as Bn=1Hz, then ω 0 =B n /0.53=1.89, then calculate h1 and h2 to get
将h1和h2近似到2的整数次幂,即令h1=1,h2=2048,然后反推环路系数,由h1计算ω0,然后由h2和ω0计算a2,最后由a2和ω0计算环路带宽Bn,即Approximate h1 and h2 to the integer power of 2, that is, set h1=1, h2=2048, then invert the loop coefficient, calculate ω 0 from h1, then calculate a 2 from h2 and ω 0 , and finally calculate a 2 from a 2 and ω 0 to calculate the loop bandwidth B n , that is
下表列出了不同组合的h1和h2,相应的环路参数以及移位数量。The following table lists different combinations of h1 and h2, the corresponding loop parameters and the number of shifts.
本发明与现有技术相比,最大的特点在于整个环路控制过程中,所有的操作均简化为一系列移位和加法操作,并通过合理选择位宽,基本不损失跟踪精度。这使得环路控制的实现可以采用很低端的处理器,或者还可以用硬件描述语言直接硬件实现。所以本发明具有运算量低,实现方式简单,不影响环路跟踪精度的优点。Compared with the prior art, the biggest feature of the present invention is that in the entire loop control process, all operations are simplified to a series of shifting and adding operations, and the tracking accuracy is basically not lost through reasonable selection of bit width. This makes the implementation of the loop control can adopt a very low-end processor, or can also be directly implemented in hardware with a hardware description language. Therefore, the present invention has the advantages of low calculation amount, simple implementation mode and no influence on loop tracking precision.
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CN101826889B (en) * | 2010-03-31 | 2013-04-03 | 北京航空航天大学 | Binary offset carrier signal tracking loop |
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CN104849709B (en) * | 2015-05-26 | 2018-04-24 | 北京楚捷科技有限公司 | Suppress the method and device of background interference in indoor wireless ranging |
CN105204041A (en) * | 2015-09-29 | 2015-12-30 | 上海海积信息科技股份有限公司 | Tracking loop processing method and device |
US10044386B2 (en) * | 2016-04-30 | 2018-08-07 | Analog Devices, Inc. | Designing FIR filters with globally minimax-optimal magnitude response |
CN106842257B (en) * | 2016-12-23 | 2019-09-10 | 湖南北云科技有限公司 | A kind of satellite navigation code ring loop and its design method based on pessimistic counter |
US11949420B2 (en) | 2019-04-23 | 2024-04-02 | Beijing Boe Technology Development Co., Ltd. | Clock spread spectrum circuit, electronic equipment, and clock spread spectrum method |
CN110199477B (en) | 2019-04-23 | 2022-02-01 | 京东方科技集团股份有限公司 | Clock spread spectrum circuit, electronic device and clock spread spectrum method |
CN111158022B (en) * | 2019-12-27 | 2020-11-13 | 中国人民解放军军事科学院国防科技创新研究院 | Receiver tracking method based on low-earth-orbit satellite |
CN111750908A (en) * | 2020-07-01 | 2020-10-09 | 西安博瑞集信电子科技有限公司 | Decoding method and decoding circuit for dual-channel rotary transformer |
CN111800638B (en) * | 2020-08-04 | 2022-10-28 | 西安博瑞集信电子科技有限公司 | Decoding method and decoding device |
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CN201083828Y (en) * | 2007-10-11 | 2008-07-09 | 西安华迅微电子有限公司 | GPS receiving machine code tracking ring circuit |
CN101261318A (en) * | 2008-04-03 | 2008-09-10 | 北京航空航天大学 | High Dynamic Spread Spectrum Precision Ranging Receiver |
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CN101261318A (en) * | 2008-04-03 | 2008-09-10 | 北京航空航天大学 | High Dynamic Spread Spectrum Precision Ranging Receiver |
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