CN201083828Y - GPS receiving machine code tracking ring circuit - Google Patents

GPS receiving machine code tracking ring circuit Download PDF

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Publication number
CN201083828Y
CN201083828Y CNU2007200329457U CN200720032945U CN201083828Y CN 201083828 Y CN201083828 Y CN 201083828Y CN U2007200329457 U CNU2007200329457 U CN U2007200329457U CN 200720032945 U CN200720032945 U CN 200720032945U CN 201083828 Y CN201083828 Y CN 201083828Y
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CN
China
Prior art keywords
output
delay lock
locked loop
lock loop
delay locked
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Expired - Lifetime
Application number
CNU2007200329457U
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Chinese (zh)
Inventor
郝建军
程亚奇
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
XI'AN AEROSPACE HUAXUN TECHNOLOGY CO., LTD.
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XIAN HUAXUN MICROELECTRONIC CO Ltd
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Priority to CNU2007200329457U priority Critical patent/CN201083828Y/en
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Publication of CN201083828Y publication Critical patent/CN201083828Y/en
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Abstract

The utility model discloses a GPS receiver code trace loop circuit which comprises an intermediate frequency filter for inputting radio-frequency signals; the output of the intermediate frequency filter is connected with an A/D transducer; the utility model is characterized in that: the output of the A/D transducer is respectively connected with a first summator, a first delay locked loop and a second summator; an output signal of the first delay locked loop is connected with the first summator; an output signal of the first summator has amplitude conversion through a first multiplier register, then is connected to a second delay locked loop; the output of the second delay locked loop enters to the second summator through a second multiplier register; the output of the second summator is connected with a third delay locked loop; the output of the third delay locked loop is connected to correlators; the first delay locked loop, the second delay locked loop and the third delay locked loop are respectively provided with a phase discriminator for adjusting signal phase.

Description

A kind of GPS receiver code tracking loop circuit
Technical field
The utility model relates to a kind of code tracking loop circuit that the radio spread spectrum communication receiver multipath disturbs of eliminating, and especially eliminates the code tracking loop circuit that the GPS/GNSS receiver multipath disturbs.
Technical background
After U.S. government declared off SA (selection availability) interference in 2000, multi-path problem had just become maximum error source.In the practical application under a lot of situations, such as in the city or have the place of blocking to use, in the mountain valley or in the woods, these occasions all unavoidably will cause phenomenons such as the direct transmission path of satellite-signal is blocked, and cause multipath to disturb.The multipath interference can cause the code tracking error, and directly pseudorange is measured in influence, causes the positioning error of receiver.
The general employing of traditional multipath interference cancellation techniques is narrow relevant, reduces tracking error at interval by reducing lead-lag (E/L) correlator.Adopt narrow correlator to need wideer signal bandwidth, this will cause more noise to sneak into received signal.
Summary of the invention:
The utility model adopts the existing deficiency of narrow correlator in order to solve, provide a plurality of DLL of a kind of usefulness (delay lock loop) to eliminate the GPS receiver code tracking loop circuit of tracking error, by the overall treatment of a plurality of DLL rings, multipath signal is removed from satellite-signal.
For reaching above purpose, the utility model takes following technical scheme to be achieved: a kind of GPS receiver code tracking loop circuit, the intermediate-frequency filter that comprises an input radio frequency signal, the output of this intermediate-frequency filter connects A/D converter, it is characterized in that, the output of A/D converter connects first adder respectively, first delay lock loop, second adder, the output signal of described first delay lock loop connects first adder, the output signal of first adder takes advantage of device to carry out being connected to second delay lock loop after the amplitude conversion by first number, the output of second delay lock loop takes advantage of device to enter second adder by second number, the output of second totalizer connects the 3rd delay lock loop, the 3rd delay lock loop export correlator to, the output of the 3rd delay lock loop is exactly the tracking results of having revised multi-path influence basically.Be equipped with in described first, second and the 3rd delay lock loop and be used for the phase detector that signal phase is adjusted, phase detector can adopt pattern phase detector or dot product pattern phase detector sooner or later.
The utility model is eliminated the multipath interference with the narrow correlator of existing employing and is compared, and has reduced the clock of total system, need not to use two-forty A/D converting unit and the high-precision phase detector that needs as narrow correlation method.Compare with RAKE receiver, the utility model circuit structure is simple, has only increased a small amount of circuit than common DLL, has realized suppressing the function of multipath.
Description of drawings
Fig. 1 is a specific embodiment of the utility model GPS receiver tracking loop circuit.s d(t) be the satellite-signal (comprise and directly reach signal and reflected signal) that receiver receives, c (t) is for having eliminated the satellite-signal behind the multipath composition.
Fig. 2 causes the phase demodulation curve map for the multipath that adopts narrow correlator disturbs.Use narrow correlation technique to make that the linear segment part of E-L curve is narrower, thereby need more accurate phase detector.
Fig. 3 is the tracking error that obtains of employing the utility model tracking loop circuit and the comparison of common tracking loop circuit tracing error.
Embodiment
Below in conjunction with drawings and Examples the utility model is described in further detail.
As shown in Figure 1, be divided into parallel three the tunnel, middle one the tunnel after through intermediate-frequency filter and Digital Down Convert A/D converter from the signal of radio frequency and enter the first delay lock loop DLL 0, local reproduction signal is through DLL 0In the phase detector phase place adjust after, enter first adder C1 as output signal r (t), in first adder C1 with the signal s that directly comes d(t) deduct r (t) and obtain r 1(t), and export first several device M1 that take advantage of to, take advantage of at first number and pass through the input range transformation factor among the device M1 | a 1(t) | inverse is finished r 1(t) amplitude conversion; Signal enters the second delay lock loop DLL afterwards 1Postpone lock ring DLL second 1In, adjust DLL 1In code generator, make DLL 1Phase detector signal r 1(t) output to second number after calibrated and take advantage of device M2, take advantage of among the device M2 at second number, by the input range transformation factor | a 1(t) | make local reproduction signal r 1(t) return to r (t) conversion amplitude before, use the satellite-signal s of Third Road then d(t) r of amplitude that in second adder C2, cut conversion 1(t) get r behind the signal 2(t) enter the 3rd delay lock loop DLL NAV, through DLL NAVForm with c (t) after handling exports correlator to.
Phase detector in three delay lock loops can adopt leading E and hysteresis L to subtract each other pattern and obtain the phase demodulation curve.
As shown in Figure 2, narrow relevant phase demodulation curve, narrow correlation technique can mask 1.5 times of multipath signals in addition of narrow relative widths, but need high-precision phase detector.
As shown in Figure 3, adopt tracking error that the utility model DLL structure obtains to reduce about 90% than the tracking error of common DLL track loop.

Claims (3)

1. GPS receiver code tracking loop circuit, the intermediate-frequency filter that comprises an input radio frequency signal, the output of this intermediate-frequency filter connects A/D converter, it is characterized in that, the output of A/D converter connects first adder respectively, first delay lock loop, second adder, the output signal of described first delay lock loop connects first adder, the output signal of first adder takes advantage of device to carry out being connected to second delay lock loop after the amplitude conversion by first number, the output of second delay lock loop takes advantage of device to enter second adder by second number, the output of second totalizer connects the 3rd delay lock loop, the 3rd delay lock loop export correlator, described first to, be equipped with in the second and the 3rd delay lock loop and be used for the phase detector that signal phase is adjusted.
2. GPS receiver code tracking loop circuit according to claim 1 is characterized in that, described phase detector is pattern phase detector sooner or later.
3. described GPS receiver code tracking loop circuit according to claim 1 is characterized in that described phase detector is a dot product pattern phase detector.
CNU2007200329457U 2007-10-11 2007-10-11 GPS receiving machine code tracking ring circuit Expired - Lifetime CN201083828Y (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNU2007200329457U CN201083828Y (en) 2007-10-11 2007-10-11 GPS receiving machine code tracking ring circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CNU2007200329457U CN201083828Y (en) 2007-10-11 2007-10-11 GPS receiving machine code tracking ring circuit

Publications (1)

Publication Number Publication Date
CN201083828Y true CN201083828Y (en) 2008-07-09

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CNU2007200329457U Expired - Lifetime CN201083828Y (en) 2007-10-11 2007-10-11 GPS receiving machine code tracking ring circuit

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101515913B (en) * 2009-03-19 2012-12-05 北京理工大学 Fixed loop control method based on additions and shifts

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101515913B (en) * 2009-03-19 2012-12-05 北京理工大学 Fixed loop control method based on additions and shifts

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Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
C56 Change in the name or address of the patentee

Owner name: XI'AN AEROSPACE HUAXUN TECHNOLOGY CO., LTD.

Free format text: FORMER NAME: XIAN HUAXUN MICROELECTRONIC CO., LTD.

CP03 Change of name, title or address

Address after: 710075 hi tech Zone, Shaanxi, Xi'an province 58, No. three, Hui International three floor

Patentee after: XI'AN AEROSPACE HUAXUN TECHNOLOGY CO., LTD.

Address before: 710075, Shaanxi Province, Xi'an science and technology three, No. 58, Hui International 3 floor

Patentee before: Xian Huaxun Microelectronic Co., Ltd.

CX01 Expiry of patent term

Granted publication date: 20080709

CX01 Expiry of patent term