CN101510419B - Apparatus and method for automatically adjusting frequency and phase of display - Google Patents
Apparatus and method for automatically adjusting frequency and phase of display Download PDFInfo
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- CN101510419B CN101510419B CN2009100807556A CN200910080755A CN101510419B CN 101510419 B CN101510419 B CN 101510419B CN 2009100807556 A CN2009100807556 A CN 2009100807556A CN 200910080755 A CN200910080755 A CN 200910080755A CN 101510419 B CN101510419 B CN 101510419B
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Abstract
The invention discloses an automatic frequency and phase adjusting device and a method thereof, which are used for displaying analog video signals and cause any input video signals to be displayed with the resolution ratio suitable for a liquid crystal display. The device consists of a line frequency detecting module, a clock frequency adjusting module, a signal jumping edge detecting module, a signal jumping edge sampling module and a clock phase adjusting module. The line frequency detecting module adopts a clock to count horizontal synchronizing signals between two vertical synchronizing signals in digital video signals converted from analog video signals and obtains a reference pixel clock, a reference horizontal resolution and a reference horizontal overall width according to the count value. The clock frequency adjusting module adopts the reference pixel clock to scan digital video signals to obtain a testing width, and the testing width close to the reference horizontal resolution is obtained by searching algorithm and adjusting the reference horizontal overall width, thereby obtaining an actual pixel clock. The signal jumping edge detecting module obtains jumping edge pulse signals based on signal pictures. The signal jumping edge sampling module utilizes the jumping edge pulse signals to sample multiple phase pulses and obtains the multiple phase pulses by utilizing the actual pixel clock. The clock phase adjusting module determines relatively good phase clock based on the sampling result.
Description
Technical field
The present invention relates to vision signal and show, relate in particular to the equipment and the method that are converted into the digital video signal that is suitable for the display device demonstration from the analog video signal of equipment such as computing machine, televisor and video camera output.
Background technology
For video source signal can correctly be shown on display device, each video source image must transmit a series of frame, every frame comprises several scan lines, each scan line comprises several pixels, therefore need horizontal-drive signal and vertical synchronizing signal that vision signal is carried out synchronously, the for example beginning of HSYNC horizontal-drive signal indication delegation, the VSYNC vertical synchronizing signal is indicated the beginning of a frame.Therefore, show on display device according to the indication of synchronizing signal pixel the effective coverage.
Yet, in some cases, vision signal comes from simulating signal, so must being converted into valid pixel, analog video signal could on digital display screen, show, therefore be converted into the pixel value that is fit to digital distance scope for signal with analog video format, each horizontal scan line must be converted into and be fit to the pixel that digital distance scope shows, so analog video signal must be sampled through the ADC sampling clock, obtains the horizontal pixel H of some
TotalBeing provided with of the frequency of this sampling clock and phase place must make the H that samples and obtain
TotalApproach real H
TotalIf, can't approach real Horizontal number of pixels, then the frequency of sampling clock and phase place are inaccurate need adjust again.
The method of adjustment of existing clock frequency and phase place lacks dirigibility, can not be by choosing the adjustment that any piece image carries out clock phase and frequency.
Summary of the invention
The purpose of this invention is to provide can the adapting to image format change the equipment and the method that analog video signal are converted into be suitable for the digital video signal that display device shows.
According to first aspect, the invention provides automatic frequency and phase adjusting device that a kind of analog video signal shows usefulness.This device comprises: the video signal source signaling module receives analog video signal; The ADC sample circuit is sampled to analog video signal, thereby is converted to digital video signal; Line frequency detecting module adopts clock to the horizontal-drive signal counting between two vertical synchronizing signals in the digital video signal, obtains reference pixel clock, reference levels resolution and reference levels overall width based on count value; The clock frequency adjusting module, adopt reference pixel clock scan digital video signal to obtain the test width in effective video zone, by searching algorithm and adjustment reference levels overall width, obtain to approach the test width of reference levels resolution, obtain the actual pixels clock thus; Leggy delay phase-locked loop clock generating module, the clock of employing actual pixels clock generating out of phase; Signal hopping edge detection module obtains the hopping edge pulse signal based on signal pattern; Signal hopping edge sampling module is sampled to a plurality of phase impulses with the hopping edge pulse signal, wherein utilizes the phase relation between the described out of phase clock, obtains described a plurality of phase impulse; With the clock phase adjusting module, determine the clock of preferable phase place based on sampled result.
According to second aspect, the invention provides automatic frequency and phase regulation method that a kind of analog video signal shows usefulness, comprise the following steps: analog video signal is sampled, thereby be converted to digital video signal; Adopt in the clock count digital video signal horizontal-drive signal between two vertical synchronizing signals, obtain reference pixel clock, reference levels resolution and reference levels overall width based on count value; Adopt reference pixel clock scan digital video signal to obtain the test width in effective video zone,, obtain to approach the test width of reference levels resolution, obtain the actual pixels clock thus by searching algorithm and adjustment reference levels overall width; Adopt the clock of actual pixels clock generating out of phase; Utilize signal pattern to obtain the hopping edge pulse signal; With the hopping edge pulse signal a plurality of phase impulses are sampled, wherein utilize the phase relation between the described out of phase clock, obtain described a plurality of phase impulse; With, determine the clock of preferable phase place based on sampled result.
Make corresponding adjustment according to the variation that the adjusting gear of clock frequency of the present invention and phase place and method can the adapting to image forms, just can carry out the adjustment of clock phase and frequency by choosing any piece image, the vision signal of any input can be shown with the resolution that adapts to LCD.
Description of drawings
Below with reference to accompanying drawings specific embodiments of the invention are described in detail, in the accompanying drawing:
Fig. 1 is display automatic frequency and phase adjusting device according to an embodiment of the invention;
Fig. 2 is that clock phase is adjusted framework and waveform synoptic diagram;
Fig. 3 is the frequency and the phase regulation method process flow diagram of one embodiment of the invention;
Fig. 4 is the characteristic pattern that clock and phase place are adjusted;
Fig. 5 is a typical simulation vision signal optimum phase synoptic diagram.
Embodiment
Fig. 1 is automatic frequency and phase adjusting device according to an embodiment of the invention.As shown in Figure 1, this regulating device comprises the video signal source signaling module, the ADC sample circuit, line frequency detecting module, clock frequency adjusting module, leggy delay phase-locked loop (MDLL) clock generating module, signal hopping edge detection module, signal hopping edge sampling module and clock phase adjusting module.
The video signal source signaling module produces and is used for the analog video signal source that display shows.The ADC sample circuit is converted to digital sampled signal with the analog video signal source.
Line frequency detecting module is chosen for example complete white screen pattern as test pattern, with reference clock the horizontal-drive signal between two vertical synchronizing signal VSYNC in the digital sampled signal is counted, and obtains the vertical resolution of this vision signal.Search the VESA standard according to this vertical resolution, obtain and this vertical resolution corresponding reference pixel clock, reference levels resolution (reference levels effective coverage width) H
Res(true) and reference levels overall width H
Total
The clock frequency adjusting module at first scans from the Far Left to the rightmost this vision signal according to the pixel clock of standard video format, obtain effective video zone Far Left and rightmost coordinate, obtain the test width H in effective video zone (ACTIVE REGION)
Res(test).If obtain H
Res(test) number compares H
Res(true) number is many or few, and then pixel clock frequency is crossed slowly or too fast, needs to adjust H
TotalIn an example, the method for adjustment is at first determined H according to binary search algorithm
TotalThe hunting zone, peakedly determine according to H
Max=(H
Total* 11)/10, minimum value really normal root according to H
Min=(H
Total* 9)/10.In this hunting zone, adjust H
Total, up to finding the H that approaches reference levels resolution
TotalAt last, based on determined H
TotalDetermine clock frequency.
Leggy delay phase-locked loop (MDLL) clock generating module produces the clock frequency of out of phase with pixel clock as a reference, for example can produce the clock of 28 outs of phase.
Signal hopping edge detection module is judged according to neighbor difference value in the digital sampled signal.First pixel P for example
1Vision signal value P
1valueWith second pixel P
2Vision signal value P
2value, the difference fiducial value diff_value=P of two pixels
2value-P
1valueIf difference value diff_value is a positive number and greater than predetermined threshold value, then P
2Representing the pixel of rising edge type, is exactly the rising edge place between two pixels.If difference value is a negative and greater than predetermined threshold value, then P
2Representing the pixel of negative edge type, is exactly the negative edge place between two pixels.As detect rising edge or negative edge, and then producing hopping edge pulse signal edge_pulse_signal, this pulse width continues at least one clock period.
Signal hopping edge sampling module obtains 28 mutual nonoverlapping pulses at first according to the phase relation of 28 clocks, and the width of a pulse is T/28.These 28 nonoverlapping pulses constitute a clock period T.Then, with hopping edge pulse edge_pulse_signal this 28 nonoverlapping pulses of sampling.Because pulse width is narrower,, need when sampling, adopt two (double-sync) circuit synchronously to guarantee the correctness of sampling for fear of the metastable state situation.
The phase clock adjusting module is analyzed the hopping edge sampling pulse, choose by the phase place of hopping edge impulse sampling, the phase place of worst case in corresponding 28 phase places of this phase place will obtain " full ash screen " pattern with this phase sample signal, calculate best phase place according to the phase place proportionate relationship that is provided with.
Fig. 2 is that clock phase is adjusted framework and waveform synoptic diagram, therefrom can understand the process that phase place is selected intuitively.
Below, describe automatic frequency of the present invention and phase-adjusted implementation procedure in detail in conjunction with Fig. 3.Fig. 3 is the frequency and the phase regulation method process flow diagram of one embodiment of the invention.
1. at first receive analog video signal, sample, simulating signal is converted into digital signal by ADC, and with the HSYNC signal between two VSYNC signals of clock count of for example 27MHz, with count value V
ResBe saved to register, by lookup table mode, obtain reference pixel clock Pixelclock, reference levels resolution H
Res(true) and reference levels overall width H
Total
2. the pattern of choosing for example complete white screen or white with black screen is as test pattern.Setting scanning window size, general window size need cover whole effective coverages.In an example, at first scan from first point greater than threshold value, scan last point again and finish less than threshold value, obtain the test width H of video effective coverage
Res(test).
3. with H
Res(test) value and H
Res(true) compare.If H
Res(test) greater than H
Res(true), then former clock frequency is too fast, then reduces H according to binary search algorithm
TotalIf H
Res(test) less than H
Res(true), then former clock frequency is slow excessively, increases H according to binary search algorithm
Total, until approaching true H
Total(pixel clock).Therefore, obtain to approach true H
TotalPixel clock.
4. after finishing the clock frequency adjustment, the multiphase clock generation module serves as that reference produces for example clock of 28 outs of phase with adjusted pixel clock, PH0, and PH1 ... PH27.
5. for example choosing, the staggered pattern at interval of black and white lines is a test pattern.The big I of test pattern is set by the user, but that the feature of this pattern must satisfy high-low level is staggered, such as " low level (L)-＞high level (H)-＞low level (L)-＞high level (H) " Changing Pattern.Fig. 4 is the characteristic pattern that clock and phase place are adjusted, and wherein the white with black screen is the test pattern of clock frequency, and middle chequered with black and white pattern is the test pattern that clock phase is regulated.
If at any width of cloth pattern, can at first seek the characteristic block that meets this rule, and difference absolute value in twos needs greater than preset threshold.Obtain the indicator signal edge_pulse_signal of respective signal rising edge according to comparative result.
Characteristic block can be chosen according to the difference value of neighbor.Difference value diff_value1=P when adjacent two pixels
2value-P
1valueFor positive number and absolute value greater than threshold value, and diff_value2=P
3value-P
2valueFor negative and absolute value greater than threshold value, P
2valueBe P
1valueThe pixel of delay one-period, P
2valueBe P
1valuePostpone the pixel of two all after dates, then remember pixel P
1value, P
2value, P
3valueThe characteristic area that constitutes is the place, hopping edge.Choose this zone as the pattern of adjusting clock phase.
6. according to these 28 different clocks phase relation between any two, obtain 28 phase impulse edge_pulse0 of non-overlapping copies ..., edge_pulse27 samples to these 28 phase impulses with the hopping edge pulse signal edge_pulse_signal that obtains.
7. in the sampling module of signal hopping edge, produce for example 3 hopping edge pulse edge_pulse_signal1 that certain phase relation is arranged with hopping edge edge_pulse_signal by leggy delay phase-locked loop (MDLL), edge_pulse_signal2, edge_pulse_signal3 samples to 28 different phase impulses with this 4 tunnel hopping edge respectively.In an example, because the phase impulse width is narrower, for fear of the metastable state situation, hopping edge, every road selects for use the double-sync circuit to sample, and avoids the situation on sampling clock impulse hits edge as far as possible, guarantees the correctness of sampling.Need explanation, also can adopt the hopping edge pulse of other number to come the sampling phase pulse.
8. analyze of the sampling of hopping edge signal to 28 phase impulses, choose the phase impulse that to be sampled by the hopping edge, add up the phase clock that is sampled in the frame, the number of each phase place of accumulative total, be kept at respectively in the register separately (PH0_cnt ..., PH27_cnt), choose the accumulated value reckling, this minimum value is corresponding to the poorest phase place.Phase place proportionate relationship according to being provided with calculates optimum phase.As shown in Figure 5, the time clock of the minimum value that adds up correspondence is the 24th phase place PH24, and the proportionate relationship of this phase place and optimum phase is 3: 4, total phase place of one-period be 28 phase places (PH0 ... PH27), then optimum phase is the 12nd phase place PH12.
Need explanation, above-mentioned steps 1-8 does not reflect strict sequential relationship.Finish after step 5 such as the partial content of step 6 is also unnecessary.Each step only is the convenience narrated titled with the purpose of sequence number 1-8.
Obviously, the present invention described here can have many variations, and this variation can not be thought and departs from the spirit and scope of the present invention.Therefore, the change that all it will be apparent to those skilled in the art all is included within the covering scope of these claims.
Claims (19)
1. an analog video signal shows the automatic frequency and the phase adjusting device of usefulness, comprising:
The video signal source signaling module receives analog video signal;
Sample circuit is sampled to analog video signal, thereby is converted to digital video signal;
Line frequency detecting module adopts clock to the horizontal-drive signal counting between two vertical synchronizing signals in the digital video signal, obtains reference pixel clock, reference levels resolution and reference levels overall width (H based on count value
Total);
The clock frequency adjusting module, adopt reference pixel clock scan digital video signal to obtain the test width in effective video zone, by searching algorithm and adjustment reference levels overall width, obtain to approach the test width of reference levels resolution, obtain the actual pixels clock thus;
Leggy delay phase-locked loop clock generating module, the clock of employing actual pixels clock generating out of phase;
Signal hopping edge detection module obtains the hopping edge pulse signal based on signal pattern; Wherein, this signal pattern has the characteristic of low level and the staggered Changing Pattern of high level;
Signal hopping edge sampling module is sampled to a plurality of phase impulses with the hopping edge pulse signal, wherein utilizes the phase relation between the described out of phase clock, obtains described a plurality of phase impulse; With,
The clock phase adjusting module is determined the clock of preferable phase place based on sampled result.
2. automatic frequency as claimed in claim 1 and phase adjusting device, wherein the clock frequency adjusting module begins scanning from first point greater than first threshold, scan last point again and finish, obtain the test width in described effective video zone less than first threshold.
3. automatic frequency as claimed in claim 1 and phase adjusting device, wherein the clock frequency adjusting module is chosen full pattern or the white with black screen pattern that shields in vain and is carried out scan operation as test pattern.
4. automatic frequency as claimed in claim 1 and phase adjusting device, wherein signal hopping edge sampling module comprises two synchronizing circuits.
5. automatic frequency as claimed in claim 1 and phase adjusting device, wherein at least two the hopping edge pulse signals of signal hopping edge sampling module utilization with certain phase relation are sampled to described phase impulse.
6. automatic frequency as claimed in claim 1 and phase adjusting device, wherein said signal pattern is a test pattern, described test pattern has the feature that satisfies the staggered Changing Pattern of low level and high level.
7. automatic frequency as claimed in claim 6 and phase adjusting device, wherein to choose the staggered pattern at interval of black and white lines be test pattern to signal hopping edge detection module.
8. automatic frequency as claimed in claim 1 and phase adjusting device, wherein signal hopping edge detection module is sought characteristic block from a width of cloth pattern, and described signal pattern is made of characteristic block.
9. automatic frequency as claimed in claim 8 and phase adjusting device, wherein for three adjacent pixels in the described pattern, first pixel, second pixel and the 3rd pixel, if the difference of first pixel and second pixel is that positive number and absolute value are greater than threshold value, the difference of second pixel and the 3rd pixel be negative and absolute value greater than threshold value, then assert this three pixel constitutive characteristic pieces.
10. automatic frequency as claimed in claim 1 and phase adjusting device, wherein the neighbor difference value of signal hopping edge detection module from signal pattern judged, if the absolute difference of the vision signal value of neighbor is greater than predetermined threshold value, then detect rising edge or negative edge, and produce the hopping edge pulse signal.
11. an analog video signal shows the automatic frequency and the phase regulation method of usefulness, comprises the following steps:
Analog video signal is sampled, thereby be converted to digital video signal;
Adopt in the clock count digital video signal horizontal-drive signal between two vertical synchronizing signals, obtain reference pixel clock, reference levels resolution and reference levels overall width based on count value;
Adopt reference pixel clock scan digital video signal to obtain the test width in effective video zone,, obtain to approach the test width of reference levels resolution, obtain the actual pixels clock thus by searching algorithm and adjustment reference levels overall width;
Adopt the clock of actual pixels clock generating out of phase;
Utilize signal pattern to obtain the hopping edge pulse signal; Wherein, this signal pattern has the characteristic of low level and the staggered Changing Pattern of high level; With the hopping edge pulse signal a plurality of phase impulses are sampled, wherein utilize the phase relation between the described out of phase clock, obtain described a plurality of phase impulse; With
Determine the clock of preferable phase place based on sampled result.
12. automatic frequency as claimed in claim 11 and phase regulation method, the step that wherein adopts reference pixel clock scan digital video signal to obtain the test width in effective video zone comprise from first point greater than threshold value begin scanning, scan last point again and finish, obtain the step of the test width in described effective video zone less than threshold value.
13. automatic frequency as claimed in claim 11 and phase regulation method wherein adopt the step of reference pixel clock scan digital video signal to comprise that choosing full pattern or the white with black screen pattern that shields in vain carries out scan operation as test pattern.
14. automatic frequency as claimed in claim 11 and phase regulation method, the step of wherein utilizing signal pattern to obtain the hopping edge pulse signal comprise that choosing the staggered pattern at interval of black and white lines is signal pattern.
15. automatic frequency as claimed in claim 11 and phase regulation method, wherein the step of a plurality of phase impulses being sampled with the hopping edge pulse signal comprises and utilizes at least two hopping edge pulse signals with certain phase relation that described phase impulse is sampled.
16. automatic frequency as claimed in claim 11 and phase regulation method, the step of wherein utilizing signal pattern to obtain the hopping edge pulse signal comprises that described signal pattern is a test pattern, and described test pattern has the feature that satisfies the staggered Changing Pattern of low level and high level.
17. automatic frequency as claimed in claim 11 and phase regulation method, the step of wherein utilizing signal pattern to obtain the hopping edge pulse signal comprises that signal hopping edge detection module seeks characteristic block from a width of cloth pattern, is made of the step of described signal pattern characteristic block.
18. automatic frequency as claimed in claim 17 and phase regulation method, wherein for three adjacent pixels, first pixel, second pixel and the 3rd pixel, if the difference of first pixel and second pixel is that positive number and absolute value are greater than threshold value, the difference of second pixel and the 3rd pixel is the big and threshold value of negative and absolute value, then assert this three pixel constitutive characteristic pieces.
19. automatic frequency as claimed in claim 11 and phase regulation method, the step of wherein utilizing signal pattern to obtain the hopping edge pulse signal comprises that the neighbor difference value from signal pattern judges, if the absolute difference of the vision signal value of neighbor is greater than predetermined threshold value, then detect rising edge or negative edge, and produce the hopping edge pulse signal.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102129850B (en) * | 2010-01-15 | 2013-11-06 | 宏碁股份有限公司 | Signal processing system and method |
| CN104503723B (en) * | 2014-12-24 | 2018-01-02 | 北京凯视达科技有限公司 | The bearing calibration of VGA signal phases and device |
| CN108010476B (en) * | 2017-11-29 | 2021-03-09 | 武汉精立电子技术有限公司 | Video signal transmission clock generating device and method |
| CN108880700B (en) * | 2018-05-31 | 2019-12-27 | Oppo（重庆）智能科技有限公司 | Frequency hopping method and frequency hopping device of clock signal and mobile terminal |
| CN109830204B (en) * | 2019-03-25 | 2022-08-09 | 京东方科技集团股份有限公司 | Time schedule controller, display driving method and display device |
| CN111025064B (en) * | 2019-12-20 | 2021-12-14 | 中国科学技术大学 | Method and system for realizing detection of working state of ball mill by non-contact speed measurement |
| CN114500767B (en) * | 2020-11-12 | 2024-06-04 | 西安诺瓦星云科技股份有限公司 | Input video source adjusting method and device, video input card and video processing equipment |
| CN117490838B (en) * | 2024-01-03 | 2024-03-19 | 成都善思微科技有限公司 | High-reliability flat panel detector data acquisition method, system and computer |
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