CN101471603A - DC-DC buck converter and ripple improvement circuit - Google Patents

DC-DC buck converter and ripple improvement circuit Download PDF

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CN101471603A
CN101471603A CNA2007103073057A CN200710307305A CN101471603A CN 101471603 A CN101471603 A CN 101471603A CN A2007103073057 A CNA2007103073057 A CN A2007103073057A CN 200710307305 A CN200710307305 A CN 200710307305A CN 101471603 A CN101471603 A CN 101471603A
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reset signal
ripple
circuit
buck converter
oscillator
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CN101471603B (en
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夏春华
刘士豪
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Li Haibin
Yu Hui
Zhao Lijuan
Zheng Tianzhu
Zhu Benjun
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Inventec Corp
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Abstract

The invention provides a direct current-direct current buck converter and a ripple improving circuit thereof. The DC-DC buck converter is used for converting an input voltage into a lower output voltage and comprises a switch for controlling the on-off state of a path between the input voltage and the output voltage, a filter circuit for enabling the output voltage to tend to be stable, a comparison circuit for outputting a set signal according to the output voltage, a reset signal generation circuit for generating a reset signal and a trigger for controlling the on-off state of the switch according to the set signal and the reset signal. The reset signal generating circuit comprises an oscillator, a capacitor externally connected to the oscillator and a ripple improving circuit. The ripple improving circuit comprises a power input end for providing voltage, and a resistor, wherein one end of the resistor is connected with the oscillator and the capacitor, and the other end of the resistor is connected with the power input end. The invention is used for adjusting the charging time of the capacitor, thereby adjusting the maximum duty ratio of the reset signal and improving the output ripple of the buck converter.

Description

直流到直流降压转换器及纹波改善电路 DC to DC Buck Converter and Ripple Improvement Circuit

技术领域 technical field

本发明涉及一种直流到直流降压转换器及其纹波改善电路,特别涉及一种可以改善输出纹波的直流到直流降压转换器及其纹波改善电路。The invention relates to a DC-to-DC step-down converter and a ripple improvement circuit thereof, in particular to a DC-to-DC step-down converter capable of improving output ripple and a ripple improvement circuit thereof.

背景技术 Background technique

现今的电子产品对工作电压的要求越来越高,常用的一些电源电压已经无法满足许多电子产品的要求。而在现在的电源设计中,越来越多的用到电压转换电路。如电源电压是以中央处理器(CPU)、DIMM(Dual Inline MemoryModule,双列直插内存模块)等为负载时,往往需要将电源的输入电压转换为适合负载工作的输出电压,从而才能使负载正常工作。Today's electronic products have higher and higher requirements for operating voltage, and some commonly used power supply voltages can no longer meet the requirements of many electronic products. In the current power supply design, more and more voltage conversion circuits are used. For example, when the power supply voltage is based on the central processing unit (CPU), DIMM (Dual Inline Memory Module, dual inline memory module), etc., it is often necessary to convert the input voltage of the power supply to an output voltage suitable for the load to make the load normal work.

在使用比较器与RS触发器组合构成反馈的直流到直流降压转换电路(BUCK电路)中,如图8所示,需要使用振荡器(Osillator)921为触发器909提供触发信号。通常通过振荡器921来确定输入到触发器信号的幅度与频率,并由触发器909输出高/低电平来控制开关的导通与闭合。在直流到直流降压转换电路901工作时,通过开关903的导通与闭合,使输入电压通过电感L并输出稳定的输出电压Vout。但是通过电感L的电流是一个直流与一个纹波电流(ripple)叠加而成的,此纹波电流是在开关的导通与闭合时产生的。为了得到一个真正的直流输出以及使电源系统正常地运作,应尽可能地减小此纹波电流。一般的解决方法是通过在输出端加多个输出电容的等效串联电阻,使纹波电流通过电容流入地。但是这种方法具有较高的成本。In a DC-to-DC step-down conversion circuit (BUCK circuit) that uses a combination of a comparator and an RS flip-flop to form feedback, as shown in FIG. 8 , an oscillator (Osillator) 921 needs to be used to provide a trigger signal for the flip-flop 909 . Usually, the oscillator 921 is used to determine the amplitude and frequency of the signal input to the trigger, and the trigger 909 outputs a high/low level to control the on and off of the switch. When the DC-to-DC step-down conversion circuit 901 is working, the switch 903 is turned on and off so that the input voltage passes through the inductor L and a stable output voltage Vout is output. However, the current passing through the inductor L is a superposition of a direct current and a ripple current (ripple), and the ripple current is generated when the switch is turned on and off. In order to get a real DC output and make the power system operate normally, this ripple current should be reduced as much as possible. The general solution is to add the equivalent series resistance of multiple output capacitors at the output end, so that the ripple current flows into the ground through the capacitor. But this method has higher cost.

中国台湾专利申请第0057836号发明揭示了一种供直流到直流转换器使用的合成纹波调整器100。如图1所示,此合成纹波调整器100可产生一个辅助电压波形,而辅助电压波形可有效复制通过输出电感器101的波形纹波电流,并使用辅助电压波形控制比较器103的转换。图2为图1的合成纹波调整器100的一种实施例,跨导放大器201监控穿过电感器203的电压,并向纹波波形电容器205提供一个代表电感器电压的电流,从而产生辅助电压波形。使用复制电感器电流进行纹波调节以使低输出纹波、输入电压前馈及简单化补偿。Taiwan Patent Application No. 0057836 discloses a synthesized ripple regulator 100 for a DC-DC converter. As shown in FIG. 1 , the synthesized ripple regulator 100 generates an auxiliary voltage waveform that effectively replicates the waveform ripple current through the output inductor 101 and uses the auxiliary voltage waveform to control the switching of the comparator 103 . FIG. 2 is an embodiment of the synthetic ripple regulator 100 of FIG. 1. The transconductance amplifier 201 monitors the voltage across the inductor 203 and provides a current representative of the inductor voltage to the ripple waveform capacitor 205 to generate an auxiliary voltage. voltage waveform. Ripple regulation using replicated inductor current for low output ripple, input voltage feed-forward and simple compensation.

中国台湾专利申请第0057836号发明有效地减小了纹波输出,但是其采用了多个元器件,也具有较高的成本。且此发明并不适用于比较器与RS触发器组合构成反馈的直流到直流降压转换电路。The invention of Taiwan Patent Application No. 0057836 effectively reduces the ripple output, but it uses multiple components and components, which also has a relatively high cost. Moreover, this invention is not applicable to a DC-to-DC step-down conversion circuit in which a comparator and an RS flip-flop are combined to form a feedback.

中国台湾专利申请第0057836号文件揭示了一种直流对直流升压转换装置,如图3所示,其包含升压电路301、环形振荡器303、分压电路305、脉冲频率调变(PFM)比较器307、逻辑控制单元309。升压电路301用以将工作电压进行升压以产生直流输出电压。环形振荡器303用以产生一个振荡器输出信号。分压电路305针对直流输出电压进行分压以产生一个反馈电压。脉冲频率调变(PFM)比较器307,其比较反馈电压及一个参考电压,并产生一个比较器输出信号以控制振荡器输出信号的输出。逻辑控制单元309用以降低直流输出电压的纹波。China Taiwan Patent Application No. 0057836 discloses a DC-to-DC boost conversion device, as shown in Figure 3, which includes a boost circuit 301, a ring oscillator 303, a voltage divider circuit 305, and a pulse frequency modulation (PFM) a comparator 307 and a logic control unit 309 . The boost circuit 301 is used to boost the operating voltage to generate a DC output voltage. The ring oscillator 303 is used to generate an oscillator output signal. The voltage dividing circuit 305 divides the DC output voltage to generate a feedback voltage. A pulse frequency modulation (PFM) comparator 307, which compares the feedback voltage with a reference voltage, and generates a comparator output signal to control the output of the oscillator output signal. The logic control unit 309 is used for reducing the ripple of the DC output voltage.

中国台湾专利申请第0057836号的发明利用脉冲频率调变(PFM)比较器307,比较反馈电压及参考电压,以产生一个比较器输出信号,用以控制振荡器输出信号信号的输出,并且通过逻辑控制单元309降低直流输出电压的纹波。此发明的逻辑控制单元309适用于直流到直流升压转换电路,但并不能解决现有直流到直流转换电路纹波降低方法成本高的问题。The invention of Taiwan Patent Application No. 0057836 uses a pulse frequency modulation (PFM) comparator 307 to compare the feedback voltage and the reference voltage to generate a comparator output signal for controlling the output of the oscillator output signal, and through the logic The control unit 309 reduces the ripple of the DC output voltage. The logic control unit 309 of this invention is suitable for a DC-to-DC boost conversion circuit, but it cannot solve the problem of high cost of the existing DC-to-DC conversion circuit ripple reduction method.

综上所述,现有直流到直流降压转换电路纹波降低方法存在成本较高的问题。To sum up, there is a problem of high cost in the existing method for reducing the ripple of the DC-to-DC step-down conversion circuit.

发明内容 Contents of the invention

本发明的目的是提供一种直流到直流降压转换器,以解决现有技术中直流到直流降压转换电路纹波降低方法成本较高的问题。The purpose of the present invention is to provide a DC-to-DC step-down converter to solve the problem of high cost in the ripple reduction method of the DC-to-DC step-down conversion circuit in the prior art.

本发明的另一目的是提供一种纹波改善电路,以解决现有技术中直流到直流降压转换电路纹波降低方法成本较高的问题。Another object of the present invention is to provide a ripple improvement circuit to solve the problem of high cost of the ripple reduction method of the DC-to-DC step-down conversion circuit in the prior art.

本发明提供了一种直流到直流降压转换器,用以将输入电压转换为较低的输出电压,包括用以控制输入电压与输出电压间的路径的导通及截止状态的开关、用以使输出电压趋于稳定的滤波电路、用以根据输出电压输出一个置位信号的比较电路、用以产生一个复位信号的复位信号产生电路以及用以根据置位信号及复位信号来控制开关开启及关闭状态的触发器。复位信号产生电路包括振荡器、外接至振荡器的电容以及纹波改善电路。纹波改善电路连接至振荡器与电容,用以调节对电容的充电时间,从而调整复位信号的最大占空比,以改善直流到直流降压转换器的输出纹波。The present invention provides a DC-to-DC step-down converter for converting an input voltage into a lower output voltage, including a switch for controlling the on and off states of the path between the input voltage and the output voltage, and for A filter circuit for stabilizing the output voltage, a comparison circuit for outputting a set signal according to the output voltage, a reset signal generating circuit for generating a reset signal, and a circuit for controlling the switch on and off according to the set signal and the reset signal Trigger for the closed state. The reset signal generating circuit includes an oscillator, a capacitor connected externally to the oscillator, and a ripple improvement circuit. The ripple improvement circuit is connected to the oscillator and the capacitor to adjust the charging time of the capacitor, thereby adjusting the maximum duty cycle of the reset signal, so as to improve the output ripple of the DC-to-DC step-down converter.

依照本发明的较佳实施例所述直流到直流降压转换器,纹波改善电路包括电源输入端以及电阻。电源输入端用以提供电压。电阻的一端连接至振荡器与电容,另一端连接电源输入端,其用以产生一个电流,调节对电容的充电时间并调整复位信号的最大占空比,以改善直流到直流降压转换器的输出纹波。电源输入端连接至为直流到直流降压转换器提供输入电压的电源。触发器为RS触发器。开关为场效应管。According to the DC-to-DC step-down converter in a preferred embodiment of the present invention, the ripple improvement circuit includes a power input terminal and a resistor. The power input terminal is used to provide voltage. One end of the resistor is connected to the oscillator and the capacitor, and the other end is connected to the power input, which is used to generate a current, adjust the charging time of the capacitor and adjust the maximum duty cycle of the reset signal to improve the DC to DC buck converter. output ripple. The power supply input is connected to a power supply that provides an input voltage to the DC-to-DC buck converter. The flip-flops are RS flip-flops. The switch is a field effect transistor.

本发明另提供一种纹波改善电路,用以改善通过比较器与触发器组合构成反馈的直流到直流降压转换器的输出纹波,其连接至为直流到直流降压转换器的触发器提供一个复位信号的复位信号产生电路。此复位信号产生电路包括振荡器以及外接至振荡器的电容。此纹波改善电路包括电源输入端以及电阻。电源输入端用以提供电压。电阻的一端连接至振荡器与电容,另一端连接电源输入端,其用以产生一个电流,调节对电容的充电时间并调整复位信号的最大占空比,以改善直流到直流降压转换器的输出纹波。The present invention also provides a ripple improvement circuit, which is used to improve the output ripple of the DC-to-DC step-down converter whose feedback is formed by a combination of a comparator and a flip-flop, which is connected to a flip-flop that is a DC-to-DC step-down converter A reset signal generating circuit that provides a reset signal. The reset signal generating circuit includes an oscillator and a capacitor externally connected to the oscillator. The ripple improvement circuit includes a power input terminal and a resistor. The power input terminal is used to provide voltage. One end of the resistor is connected to the oscillator and the capacitor, and the other end is connected to the power input, which is used to generate a current, adjust the charging time of the capacitor and adjust the maximum duty cycle of the reset signal to improve the DC to DC buck converter. output ripple.

本发明因采用了纹波改善电路,因此可以通过调节对振荡器外接电容的充电时间,从而调整发送给触发器的复位信号的最大占空比,以改善直流到直流降压转换器的输出纹波。并且本发明的纹波改善电路结构简单,实现方便,既可以满足性能指标又降低了成本。Because the present invention adopts the ripple improvement circuit, it can adjust the maximum duty cycle of the reset signal sent to the flip-flop by adjusting the charging time of the external capacitor of the oscillator, so as to improve the output ripple of the DC-to-DC step-down converter. Wave. Moreover, the ripple improvement circuit of the present invention has a simple structure and is convenient to realize, which can meet the performance index and reduce the cost.

附图说明 Description of drawings

为让本发明的上述目的、特征和优点能更明显易懂,以下结合附图对本发明的具体实施方式作详细说明,其中:In order to make the above-mentioned purposes, features and advantages of the present invention more obvious and understandable, the specific embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings, wherein:

图1为中国台湾专利申请第0057836号专利的合成纹波调整器的示意图;FIG. 1 is a schematic diagram of a synthesized ripple regulator of Taiwan Patent Application No. 0057836;

图2为图1实施例的一种合成纹波调整器电路图;Fig. 2 is a kind of synthesized ripple regulator circuit diagram of Fig. 1 embodiment;

图3为中国台湾专利申请第0057836号专利的直流对直流升压转换装置结构图;FIG. 3 is a structural diagram of a DC-to-DC boost conversion device of the Taiwan Patent Application No. 0057836;

图4为本发明实施例的一种直流到直流降压转换器电路图;4 is a circuit diagram of a DC-to-DC step-down converter according to an embodiment of the present invention;

图5为本发明实施例的一种复位信号产生电路工作示意图;FIG. 5 is a working schematic diagram of a reset signal generating circuit according to an embodiment of the present invention;

图6为本发明实施例的一种复位信号波形图;FIG. 6 is a waveform diagram of a reset signal according to an embodiment of the present invention;

图7为本发明实施例的一种纹波改善电路连接电路图;FIG. 7 is a connection circuit diagram of a ripple improvement circuit according to an embodiment of the present invention;

图8为现有一种直流到直流降压转换电路的电路图。FIG. 8 is a circuit diagram of an existing DC-to-DC step-down conversion circuit.

具体实施方式 Detailed ways

以下结合附图,具体说明本发明。The present invention will be described in detail below in conjunction with the accompanying drawings.

本发明提出一种新型的前馈(Feedforward)方法,可以通过调节最大占空比到适当的大小,来达到减小直流到直流降压转换器401输出纹波(ripple)的目的。The present invention proposes a novel feedforward method, which can achieve the purpose of reducing the output ripple (ripple) of the DC-to-DC step-down converter 401 by adjusting the maximum duty ratio to an appropriate value.

请参见图4,其为本发明实施例的一种直流到直流降压转换器电路图。Please refer to FIG. 4 , which is a circuit diagram of a DC-DC step-down converter according to an embodiment of the present invention.

直流到直流降压转换器401,用以将输入电压转换为较低的输出电压。此直流到直流降压转换器401包括开关403、滤波电路405、比较电路407、触发器409以及复位信号产生电路411。开关403分别连接输入端417及滤波电路405,图4中开关403为场效应管。滤波电路405连接至输出端413,电感L及旁路电容C组成了此滤波电路405。比较电路407连接至输出端413,其包括分压电阻R2与R3以及比较器419。比较电路407与复位信号产生电路411共同连接至触发器409的两个输入端,本实施例中触发器409为一个RS触发器,其置位端(S端)与比较电路407相连,复位端(R端)与复位信号产生电路411相连。触发器409经过一个缓冲器415后与开关403相连。复位信号产生电路411包括振荡器421、外接电容Ct以及由电源输入端423与电阻R1组成的纹波改善电路425。The DC-to-DC step-down converter 401 is used to convert the input voltage to a lower output voltage. The DC-to-DC buck converter 401 includes a switch 403 , a filter circuit 405 , a comparison circuit 407 , a flip-flop 409 and a reset signal generating circuit 411 . The switch 403 is connected to the input terminal 417 and the filter circuit 405 respectively, and the switch 403 in FIG. 4 is a field effect transistor. The filter circuit 405 is connected to the output terminal 413 , and the inductor L and the bypass capacitor C form the filter circuit 405 . The comparison circuit 407 is connected to the output terminal 413 and includes voltage dividing resistors R2 and R3 and a comparator 419 . The comparison circuit 407 and the reset signal generating circuit 411 are jointly connected to the two input ends of the flip-flop 409. In this embodiment, the flip-flop 409 is an RS flip-flop, and its setting end (S end) is connected to the comparison circuit 407, and the reset end (R terminal) is connected to the reset signal generating circuit 411 . The trigger 409 is connected to the switch 403 after passing through a buffer 415 . The reset signal generation circuit 411 includes an oscillator 421 , an external capacitor Ct, and a ripple improvement circuit 425 composed of a power input terminal 423 and a resistor R1 .

此直流到直流降压转换器401工作时,其输出电压Vout经过电阻R2及R3分压后与一个参考电压Vref作比较。若输出电压Vout经过分压后的电压大于参考电压Vref,则比较器419向触发器409的置位端输出低电平,而当触发器409的复位端接收复位信号产生电路411发送的复位信号为高时,触发器409的输出端(Q端)经过缓冲器415后向开关403输出一个低电平。开关403接收到触发器409发送的低电平并断开输入端417至输出端413之间的路径。若输出电压Vout经过分压后的电压小于参考电压Vref,则比较器419向触发器409的置位端输出高电平,而当触发器409的复位端接收复位信号产生电路411发送的复位信号为低时,触发器409的输出端(Q端)经过缓冲器415后向开关403输出一个高电平。开关403接收到触发器409发送的高电平并导通输入端417至输出端413之间的路径。输入电压Vin经过滤波电路405后输出较稳定的输出电压Vout。When the DC-to-DC step-down converter 401 is working, its output voltage Vout is divided by the resistors R2 and R3 and then compared with a reference voltage Vref. If the divided voltage of the output voltage Vout is greater than the reference voltage Vref, the comparator 419 outputs a low level to the set terminal of the flip-flop 409, and when the reset terminal of the flip-flop 409 receives the reset signal sent by the reset signal generating circuit 411 When it is high, the output terminal (Q terminal) of the flip-flop 409 outputs a low level to the switch 403 after passing through the buffer 415 . The switch 403 receives the low level sent by the flip-flop 409 and disconnects the path between the input terminal 417 and the output terminal 413 . If the divided voltage of the output voltage Vout is less than the reference voltage Vref, the comparator 419 outputs a high level to the set terminal of the flip-flop 409, and when the reset terminal of the flip-flop 409 receives the reset signal sent by the reset signal generating circuit 411 When it is low, the output terminal (Q terminal) of the flip-flop 409 outputs a high level to the switch 403 after passing through the buffer 415 . The switch 403 receives the high level sent by the flip-flop 409 and turns on the path between the input terminal 417 and the output terminal 413 . The input voltage Vin passes through the filter circuit 405 to output a relatively stable output voltage Vout.

因为输出端413的纹波与直流到直流降压转换器401的开关导通断开周期有关,因此本实施例在复位信号产生电路411中设置有纹波改善电路425。请参见图5,其为复位信号产生电路411工作过程示意图。振荡器421包括两个电流源Ichange以及Idischange,电流Ichange对电容Ct充电,电流Idischange对电容Ct放电。电源输入端423接入输入电压Vin后在电阻R1上产生一个电流Iff并帮助电流Ichange对电容Ct充电,因此通过调节电阻R1的阻值便可达到调节电容Ct的充电时间的目的。请参见图6,其为本发明实施例的一种复位信号波形图。虚线为现有技术中没有设置纹波改善电路425时复位信号的波形,实线为设置有纹波改善电路425时复位信号的波形。因此通过调节电容Ct的充电时间可以改变复位信号的最大占空比,具体计算公式如下:Since the ripple at the output terminal 413 is related to the on-off period of the switch of the DC-to-DC step-down converter 401 , a ripple improvement circuit 425 is provided in the reset signal generating circuit 411 in this embodiment. Please refer to FIG. 5 , which is a schematic diagram of the working process of the reset signal generating circuit 411 . The oscillator 421 includes two current sources Ichange and Idischange, the current Ichange charges the capacitor Ct, and the current Idischange discharges the capacitor Ct. After the power supply input terminal 423 is connected to the input voltage Vin, a current Iff is generated on the resistor R1 and helps the current Ichange to charge the capacitor Ct. Therefore, the purpose of adjusting the charging time of the capacitor Ct can be achieved by adjusting the resistance of the resistor R1. Please refer to FIG. 6 , which is a waveform diagram of a reset signal according to an embodiment of the present invention. The dotted line is the waveform of the reset signal when the ripple improvement circuit 425 is not provided in the prior art, and the solid line is the waveform of the reset signal when the ripple improvement circuit 425 is provided in the prior art. Therefore, the maximum duty cycle of the reset signal can be changed by adjusting the charging time of the capacitor Ct. The specific calculation formula is as follows:

TON=CT*VRAMP/∑ICHARGE T ON =C T *V RAMP /∑I CHARGE

TOFF=CT*VRAMP/∑IDISCHARGE T OFF =C T *V RAMP /∑I DISCHARGE

TS=(TON+TOFF)T S =(T ON +T OFF )

DD. MODMOD == TT ONON TT SS

其中DMOD为设置了纹波改善电路425后得到的最大占空比。Wherein DMOD is the maximum duty cycle obtained after setting the ripple improvement circuit 425 .

因复位信号的最大占空比改变而使触发器409的复位端高低电平转换周期发生改变,从而触发器409控制开关403的导通断开周期也发生改变,因开关403的导通断开周期与输出纹波有关,所以通过设置纹波改善电路425并调节纹波改善电路425中电阻R1的值可以调整并改善直流到直流降压转换器401的输出纹波。Due to the change of the maximum duty cycle of the reset signal, the high-low level transition period of the reset terminal of the flip-flop 409 changes, so the on-off period of the switch 403 controlled by the flip-flop 409 also changes, because the on-off period of the switch 403 The period is related to the output ripple, so by setting the ripple improvement circuit 425 and adjusting the value of the resistor R1 in the ripple improvement circuit 425, the output ripple of the DC-to-DC step-down converter 401 can be adjusted and improved.

本发明的纹波改善电路既可以设置在直流到直流降压转换器中,也可以外接与直流到直流降压转换器,请参见图7,其为本发明实施例的一种纹波改善电路连接电路图。The ripple improvement circuit of the present invention can be installed in a DC-to-DC step-down converter, or can be externally connected to a DC-to-DC step-down converter. Please refer to FIG. 7, which is a ripple improvement circuit according to an embodiment of the present invention. Connect the circuit diagram.

直流到直流降压转换器701用以将输入电压转换为较低的输出电压。此直流到直流降压转换器701包括开关703、滤波电路705、比较电路707、触发器709以及复位信号产生电路711。开关703分别连接输入端717及稳压电路705,图7中开关703为场效应管。滤波电路705连接至输出端713,电感L及旁路电容C组成了此滤波电路705。比较电路707连接至输出端713,其包括分压电阻R2与R3以及比较器719。比较电路707与复位信号产生电路711共同连接至触发器709的两个输入端,本实施例中触发器709为一个RS触发器,其置位端(S端)与比较电路707相连,复位端(R端)与复位信号产生电路711相连。触发器709经过一个缓冲器715后与开关703相连。复位信号产生电路711包括振荡器721以及外接电容Ct。纹波改善电路725外接于直流到直流降压转换器701,其连接至直流到直流降压转换器701的复位信号产生电路711。纹波改善电路725包括电阻R1以及电源输入端723。电阻R1的一端连接至振荡器721与外接电容Ct,电源输入端723连接至电阻R1的另一端,用以提供电压输入并在电阻R1中产生一个电流,从而调节对电容Ct的充电时间并调整复位信号的最大占空比,以改善直流到直流降压转换器701的输出纹波。The DC-to-DC buck converter 701 is used to convert the input voltage to a lower output voltage. The DC-to-DC buck converter 701 includes a switch 703 , a filter circuit 705 , a comparison circuit 707 , a flip-flop 709 and a reset signal generation circuit 711 . The switch 703 is respectively connected to the input terminal 717 and the voltage stabilizing circuit 705, and the switch 703 in FIG. 7 is a field effect transistor. The filter circuit 705 is connected to the output terminal 713 , and the inductor L and the bypass capacitor C form the filter circuit 705 . The comparison circuit 707 is connected to the output terminal 713 and includes voltage dividing resistors R2 and R3 and a comparator 719 . The comparison circuit 707 and the reset signal generation circuit 711 are jointly connected to the two input terminals of the flip-flop 709. In this embodiment, the flip-flop 709 is an RS flip-flop, and its setting terminal (S terminal) is connected to the comparison circuit 707, and the reset terminal (R terminal) is connected to the reset signal generating circuit 711. The flip-flop 709 is connected to the switch 703 after going through a buffer 715 . The reset signal generating circuit 711 includes an oscillator 721 and an external capacitor Ct. The ripple improvement circuit 725 is externally connected to the DC-to-DC step-down converter 701 , and is connected to the reset signal generating circuit 711 of the DC-to-DC step-down converter 701 . The ripple improvement circuit 725 includes a resistor R1 and a power input terminal 723 . One end of the resistor R1 is connected to the oscillator 721 and the external capacitor Ct, and the power input terminal 723 is connected to the other end of the resistor R1 to provide voltage input and generate a current in the resistor R1, thereby adjusting the charging time of the capacitor Ct and adjusting The maximum duty cycle of the reset signal is used to improve the output ripple of the DC-DC buck converter 701 .

此直流到直流降压转换器701工作时,输出电压Vout经过电阻R2及R3分压后通过比较器719与一个参考电压Vref作比较。若输出电压Vout经过分压后的电压大于参考电压Vref,则比较器719向触发器709的置位端输出低电平,而当触发器709的复位端接收复位信号产生电路711发送的复位信号为高时,触发器709的输出端(Q端)经过缓冲器715后向开关703输出一个低电平。开关703接收到触发器709发送的低电平并断开输入端717至输出端713之间的路径。若输出电压Vout分压后的电压小于参考电压Vref,则比较器719向触发器709的置位端输出高电平,而当触发器709的复位端接收复位信号产生电路711发送的复位信号为低时,触发器709的输出端(Q端)经过缓冲器715后向开关703输出一个高电平。开关703接收到触发器709发送的高电平并导通输入端717至输出端713之间的路径。输入电压Vin经过滤波电路705后输出较稳定的输出电压Vout。When the DC-to-DC step-down converter 701 is working, the output voltage Vout is divided by the resistors R2 and R3 and then compared with a reference voltage Vref by the comparator 719 . If the divided voltage of the output voltage Vout is greater than the reference voltage Vref, the comparator 719 outputs a low level to the set terminal of the flip-flop 709, and when the reset terminal of the flip-flop 709 receives the reset signal sent by the reset signal generating circuit 711 When it is high, the output terminal (Q terminal) of the flip-flop 709 outputs a low level to the switch 703 after passing through the buffer 715 . The switch 703 receives the low level sent by the flip-flop 709 and disconnects the path between the input terminal 717 and the output terminal 713 . If the divided voltage of the output voltage Vout is less than the reference voltage Vref, the comparator 719 outputs a high level to the set terminal of the flip-flop 709, and when the reset terminal of the flip-flop 709 receives the reset signal generating circuit 711, the reset signal sent is When low, the output terminal (Q terminal) of the flip-flop 709 outputs a high level to the switch 703 after passing through the buffer 715 . The switch 703 receives the high level sent by the flip-flop 709 and turns on the path between the input terminal 717 and the output terminal 713 . The input voltage Vin passes through the filter circuit 705 to output a relatively stable output voltage Vout.

本实施例将纹波改善电路725外接至直流到直流降压转换器701的复位信号产生电路711,并通过在电阻R1上产生一个电流来调节电容Ct的充电时间(原理与上述图5及图6中纹波改善电路425内接于复位信号产生电路411时相同,这里不再重复叙述)。而通过调节电容Ct的充电时间可以调整复位信号产生电路711向触发器709发送的复位信号的最大占空比,从而改变开关703导通与截止的周期。而直流到直流降压转换器701的输出纹波与开关703导通与截止的周期有关,因此可以通过调节纹波改善电路725中电阻R1的值来改善直流到直流降压转换器701的输出纹波。In this embodiment, the ripple improvement circuit 725 is externally connected to the reset signal generating circuit 711 of the DC-to-DC step-down converter 701, and the charging time of the capacitor Ct is adjusted by generating a current on the resistor R1 (the principle is the same as that of FIG. 5 and FIG. (6) The ripple improvement circuit 425 is internally connected to the reset signal generating circuit 411, which is the same, and will not be repeated here). By adjusting the charging time of the capacitor Ct, the maximum duty cycle of the reset signal sent by the reset signal generating circuit 711 to the flip-flop 709 can be adjusted, thereby changing the on-off period of the switch 703 . The output ripple of the DC-to-DC step-down converter 701 is related to the on-off period of the switch 703, so the output of the DC-to-DC step-down converter 701 can be improved by adjusting the value of the resistor R1 in the ripple improvement circuit 725 ripple.

本发明因采用了纹波改善电路,因此可以通过调节对振荡器外接电容的充电时间,从而调整发送给触发器的复位信号的最大占空比,以改善直流到直流降压转换器的输出纹波。并且本发明的纹波改善电路结构简单,实现方便,既可以满足性能指标又降低了成本。Because the present invention adopts the ripple improvement circuit, it can adjust the maximum duty cycle of the reset signal sent to the flip-flop by adjusting the charging time of the external capacitor of the oscillator, so as to improve the output ripple of the DC-to-DC step-down converter. Wave. Moreover, the ripple improvement circuit of the present invention has a simple structure and is convenient to realize, which can meet the performance index and reduce the cost.

以上公开的仅为本发明的几个具体实施例,但本发明并非局限于此,任何本领域的技术人员能思之的变化,都应落在本发明的保护范围内。The above disclosures are only a few specific embodiments of the present invention, but the present invention is not limited thereto, and any changes conceivable by those skilled in the art should fall within the protection scope of the present invention.

Claims (7)

1, a kind of DC-DC buck converter, in order to input voltage is converted to lower output voltage, comprise in order to the conducting in the path between control input voltage and output voltage and a switch of cut-off state, with so that the filter circuit that output voltage tends towards stability, in order to export a comparison circuit of an asserts signal according to output voltage, in order to the reset signal generating circuit that produces a reset signal and in order to control a trigger of this switch open and closed condition according to this asserts signal and this reset signal, the electric capacity that this reset signal generating circuit comprises an oscillator and is external to this oscillator, it is characterized in that, this reset signal generating circuit comprises that also a ripple improves circuit, this ripple improves circuit and is connected to this oscillator and this electric capacity, in order to regulating charging interval, thereby adjust the maximum duty cycle of this reset signal to this electric capacity.
2, DC-DC buck converter as claimed in claim 1 is characterized in that, this ripple improves circuit and comprises:
One power input is in order to provide voltage; And
One resistance, an end are connected to this oscillator and this electric capacity, and the other end connects this power input, in order to producing an electric current, regulate charging interval of this electric capacity and adjust the maximum duty cycle of this reset signal.
3, DC-DC buck converter as claimed in claim 2 is characterized in that, this power input connection most this DC-DC buck converter provides input voltage electrical power source.
4, DC-DC buck converter as claimed in claim 1 or 2 is characterized in that, this trigger is a rest-set flip-flop.
5, DC-DC buck converter as claimed in claim 1 or 2 is characterized in that, this switch is a field effect transistor.
6, a kind of ripple improves circuit, in order to improve the output ripple that flows to DC decompression converter that constitutes feedback by a comparator and a trigger always, it connects the reset signal generating circuit that this trigger of this DC-DC buck converter most provides a reset signal, the electric capacity that this reset signal generating circuit comprises an oscillator and is external to this oscillator, it is characterized in that this ripple improves circuit and comprises:
One power input is in order to provide voltage; And
One resistance, one end is connected to this oscillator and this electric capacity, and the other end connects this power input, in order to produce an electric current, adjusting is to charging interval of this electric capacity and adjust the maximum duty cycle of this reset signal, to improve the output ripple of this DC-DC buck converter.
7, ripple as claimed in claim 6 improves circuit, it is characterized in that, this power input connection of this reset signal generating circuit most this DC-DC buck converter provides input voltage electrical power source.
CN2007103073057A 2007-12-27 2007-12-27 DC-DC buck converter and ripple improvement circuit Expired - Fee Related CN101471603B (en)

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Inventor after: Zhao Lijuan

Inventor after: Zheng Tianzhu

Inventor after: Yu Hui

Inventor after: Zhu Benjun

Inventor after: Li Haibin

Inventor before: Xia Chunhua

Inventor before: Liu Shihao

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Address after: No. 191, South Third Street, Chong Village, Baoding, Hebei, Zhuozhou

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Patentee after: Zhao Lijuan

Co-patentee after: Yu Hui

Co-patentee after: Zhu Benjun

Co-patentee after: Li Haibin

Address before: Taipei City, Taiwan Chinese Shilin District Hougang Street No. 66

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