CN101471603A - DC-DC buck converter and ripple improvement circuit - Google Patents

Abstract

The invention provides a direct current-direct current buck converter and a ripple improving circuit thereof. The DC-DC buck converter is used for converting an input voltage into a lower output voltage and comprises a switch for controlling the on-off state of a path between the input voltage and the output voltage, a filter circuit for enabling the output voltage to tend to be stable, a comparison circuit for outputting a set signal according to the output voltage, a reset signal generation circuit for generating a reset signal and a trigger for controlling the on-off state of the switch according to the set signal and the reset signal. The reset signal generating circuit comprises an oscillator, a capacitor externally connected to the oscillator and a ripple improving circuit. The ripple improving circuit comprises a power input end for providing voltage, and a resistor, wherein one end of the resistor is connected with the oscillator and the capacitor, and the other end of the resistor is connected with the power input end. The invention is used for adjusting the charging time of the capacitor, thereby adjusting the maximum duty ratio of the reset signal and improving the output ripple of the buck converter.

Description

DC to DC Buck Converter and Ripple Improvement Circuit

technical field

The invention relates to a DC-to-DC step-down converter and a ripple improvement circuit thereof, in particular to a DC-to-DC step-down converter capable of improving output ripple and a ripple improvement circuit thereof.

Background technique

Today's electronic products have higher and higher requirements for operating voltage, and some commonly used power supply voltages can no longer meet the requirements of many electronic products. In the current power supply design, more and more voltage conversion circuits are used. For example, when the power supply voltage is based on the central processing unit (CPU), DIMM (Dual Inline Memory Module, dual inline memory module), etc., it is often necessary to convert the input voltage of the power supply to an output voltage suitable for the load to make the load normal work.

In a DC-to-DC step-down conversion circuit (BUCK circuit) that uses a combination of a comparator and an RS flip-flop to form feedback, as shown in FIG. 8 , an oscillator (Osillator) 921 needs to be used to provide a trigger signal for the flip-flop 909 . Usually, the oscillator 921 is used to determine the amplitude and frequency of the signal input to the trigger, and the trigger 909 outputs a high/low level to control the on and off of the switch. When the DC-to-DC step-down conversion circuit 901 is working, the switch 903 is turned on and off so that the input voltage passes through the inductor L and a stable output voltage Vout is output. However, the current passing through the inductor L is a superposition of a direct current and a ripple current (ripple), and the ripple current is generated when the switch is turned on and off. In order to get a real DC output and make the power system operate normally, this ripple current should be reduced as much as possible. The general solution is to add the equivalent series resistance of multiple output capacitors at the output end, so that the ripple current flows into the ground through the capacitor. But this method has higher cost.

Taiwan Patent Application No. 0057836 discloses a synthesized ripple regulator 100 for a DC-DC converter. As shown in FIG. 1 , the synthesized ripple regulator 100 generates an auxiliary voltage waveform that effectively replicates the waveform ripple current through the output inductor 101 and uses the auxiliary voltage waveform to control the switching of the comparator 103 . FIG. 2 is an embodiment of the synthetic ripple regulator 100 of FIG. 1. The transconductance amplifier 201 monitors the voltage across the inductor 203 and provides a current representative of the inductor voltage to the ripple waveform capacitor 205 to generate an auxiliary voltage. voltage waveform. Ripple regulation using replicated inductor current for low output ripple, input voltage feed-forward and simple compensation.

The invention of Taiwan Patent Application No. 0057836 effectively reduces the ripple output, but it uses multiple components and components, which also has a relatively high cost. Moreover, this invention is not applicable to a DC-to-DC step-down conversion circuit in which a comparator and an RS flip-flop are combined to form a feedback.

China Taiwan Patent Application No. 0057836 discloses a DC-to-DC boost conversion device, as shown in Figure 3, which includes a boost circuit 301, a ring oscillator 303, a voltage divider circuit 305, and a pulse frequency modulation (PFM) a comparator 307 and a logic control unit 309 . The boost circuit 301 is used to boost the operating voltage to generate a DC output voltage. The ring oscillator 303 is used to generate an oscillator output signal. The voltage dividing circuit 305 divides the DC output voltage to generate a feedback voltage. A pulse frequency modulation (PFM) comparator 307, which compares the feedback voltage with a reference voltage, and generates a comparator output signal to control the output of the oscillator output signal. The logic control unit 309 is used for reducing the ripple of the DC output voltage.

The invention of Taiwan Patent Application No. 0057836 uses a pulse frequency modulation (PFM) comparator 307 to compare the feedback voltage and the reference voltage to generate a comparator output signal for controlling the output of the oscillator output signal, and through the logic The control unit 309 reduces the ripple of the DC output voltage. The logic control unit 309 of this invention is suitable for a DC-to-DC boost conversion circuit, but it cannot solve the problem of high cost of the existing DC-to-DC conversion circuit ripple reduction method.

To sum up, there is a problem of high cost in the existing method for reducing the ripple of the DC-to-DC step-down conversion circuit.

Contents of the invention

The purpose of the present invention is to provide a DC-to-DC step-down converter to solve the problem of high cost in the ripple reduction method of the DC-to-DC step-down conversion circuit in the prior art.

Another object of the present invention is to provide a ripple improvement circuit to solve the problem of high cost of the ripple reduction method of the DC-to-DC step-down conversion circuit in the prior art.

The present invention provides a DC-to-DC step-down converter for converting an input voltage into a lower output voltage, including a switch for controlling the on and off states of the path between the input voltage and the output voltage, and for A filter circuit for stabilizing the output voltage, a comparison circuit for outputting a set signal according to the output voltage, a reset signal generating circuit for generating a reset signal, and a circuit for controlling the switch on and off according to the set signal and the reset signal Trigger for the closed state. The reset signal generating circuit includes an oscillator, a capacitor connected externally to the oscillator, and a ripple improvement circuit. The ripple improvement circuit is connected to the oscillator and the capacitor to adjust the charging time of the capacitor, thereby adjusting the maximum duty cycle of the reset signal, so as to improve the output ripple of the DC-to-DC step-down converter.

According to the DC-to-DC step-down converter in a preferred embodiment of the present invention, the ripple improvement circuit includes a power input terminal and a resistor. The power input terminal is used to provide voltage. One end of the resistor is connected to the oscillator and the capacitor, and the other end is connected to the power input, which is used to generate a current, adjust the charging time of the capacitor and adjust the maximum duty cycle of the reset signal to improve the DC to DC buck converter. output ripple. The power supply input is connected to a power supply that provides an input voltage to the DC-to-DC buck converter. The flip-flops are RS flip-flops. The switch is a field effect transistor.

The present invention also provides a ripple improvement circuit, which is used to improve the output ripple of the DC-to-DC step-down converter whose feedback is formed by a combination of a comparator and a flip-flop, which is connected to a flip-flop that is a DC-to-DC step-down converter A reset signal generating circuit that provides a reset signal. The reset signal generating circuit includes an oscillator and a capacitor externally connected to the oscillator. The ripple improvement circuit includes a power input terminal and a resistor. The power input terminal is used to provide voltage. One end of the resistor is connected to the oscillator and the capacitor, and the other end is connected to the power input, which is used to generate a current, adjust the charging time of the capacitor and adjust the maximum duty cycle of the reset signal to improve the DC to DC buck converter. output ripple.

Because the present invention adopts the ripple improvement circuit, it can adjust the maximum duty cycle of the reset signal sent to the flip-flop by adjusting the charging time of the external capacitor of the oscillator, so as to improve the output ripple of the DC-to-DC step-down converter. Wave. Moreover, the ripple improvement circuit of the present invention has a simple structure and is convenient to realize, which can meet the performance index and reduce the cost.

Description of drawings

In order to make the above-mentioned purposes, features and advantages of the present invention more obvious and understandable, the specific embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings, wherein:

FIG. 1 is a schematic diagram of a synthesized ripple regulator of Taiwan Patent Application No. 0057836;

Fig. 2 is a kind of synthesized ripple regulator circuit diagram of Fig. 1 embodiment;

FIG. 3 is a structural diagram of a DC-to-DC boost conversion device of the Taiwan Patent Application No. 0057836;

4 is a circuit diagram of a DC-to-DC step-down converter according to an embodiment of the present invention;

FIG. 5 is a working schematic diagram of a reset signal generating circuit according to an embodiment of the present invention;

FIG. 6 is a waveform diagram of a reset signal according to an embodiment of the present invention;

FIG. 7 is a connection circuit diagram of a ripple improvement circuit according to an embodiment of the present invention;

FIG. 8 is a circuit diagram of an existing DC-to-DC step-down conversion circuit.

Detailed ways

The present invention will be described in detail below in conjunction with the accompanying drawings.

The present invention proposes a novel feedforward method, which can achieve the purpose of reducing the output ripple (ripple) of the DC-to-DC step-down converter 401 by adjusting the maximum duty ratio to an appropriate value.

Please refer to FIG. 4 , which is a circuit diagram of a DC-DC step-down converter according to an embodiment of the present invention.

The DC-to-DC step-down converter 401 is used to convert the input voltage to a lower output voltage. The DC-to-DC buck converter 401 includes a switch 403 , a filter circuit 405 , a comparison circuit 407 , a flip-flop 409 and a reset signal generating circuit 411 . The switch 403 is connected to the input terminal 417 and the filter circuit 405 respectively, and the switch 403 in FIG. 4 is a field effect transistor. The filter circuit 405 is connected to the output terminal 413 , and the inductor L and the bypass capacitor C form the filter circuit 405 . The comparison circuit 407 is connected to the output terminal 413 and includes voltage dividing resistors R2 and R3 and a comparator 419 . The comparison circuit 407 and the reset signal generating circuit 411 are jointly connected to the two input ends of the flip-flop 409. In this embodiment, the flip-flop 409 is an RS flip-flop, and its setting end (S end) is connected to the comparison circuit 407, and the reset end (R terminal) is connected to the reset signal generating circuit 411 . The trigger 409 is connected to the switch 403 after passing through a buffer 415 . The reset signal generation circuit 411 includes an oscillator 421 , an external capacitor Ct, and a ripple improvement circuit 425 composed of a power input terminal 423 and a resistor R1 .

When the DC-to-DC step-down converter 401 is working, its output voltage Vout is divided by the resistors R2 and R3 and then compared with a reference voltage Vref. If the divided voltage of the output voltage Vout is greater than the reference voltage Vref, the comparator 419 outputs a low level to the set terminal of the flip-flop 409, and when the reset terminal of the flip-flop 409 receives the reset signal sent by the reset signal generating circuit 411 When it is high, the output terminal (Q terminal) of the flip-flop 409 outputs a low level to the switch 403 after passing through the buffer 415 . The switch 403 receives the low level sent by the flip-flop 409 and disconnects the path between the input terminal 417 and the output terminal 413 . If the divided voltage of the output voltage Vout is less than the reference voltage Vref, the comparator 419 outputs a high level to the set terminal of the flip-flop 409, and when the reset terminal of the flip-flop 409 receives the reset signal sent by the reset signal generating circuit 411 When it is low, the output terminal (Q terminal) of the flip-flop 409 outputs a high level to the switch 403 after passing through the buffer 415 . The switch 403 receives the high level sent by the flip-flop 409 and turns on the path between the input terminal 417 and the output terminal 413 . The input voltage Vin passes through the filter circuit 405 to output a relatively stable output voltage Vout.

Since the ripple at the output terminal 413 is related to the on-off period of the switch of the DC-to-DC step-down converter 401 , a ripple improvement circuit 425 is provided in the reset signal generating circuit 411 in this embodiment. Please refer to FIG. 5 , which is a schematic diagram of the working process of the reset signal generating circuit 411 . The oscillator 421 includes two current sources Ichange and Idischange, the current Ichange charges the capacitor Ct, and the current Idischange discharges the capacitor Ct. After the power supply input terminal 423 is connected to the input voltage Vin, a current Iff is generated on the resistor R1 and helps the current Ichange to charge the capacitor Ct. Therefore, the purpose of adjusting the charging time of the capacitor Ct can be achieved by adjusting the resistance of the resistor R1. Please refer to FIG. 6 , which is a waveform diagram of a reset signal according to an embodiment of the present invention. The dotted line is the waveform of the reset signal when the ripple improvement circuit 425 is not provided in the prior art, and the solid line is the waveform of the reset signal when the ripple improvement circuit 425 is provided in the prior art. Therefore, the maximum duty cycle of the reset signal can be changed by adjusting the charging time of the capacitor Ct. The specific calculation formula is as follows:

T _ON ＝C _T *V _RAMP /∑I _CHARGE

T _OFF ＝C _T *V _RAMP /∑I _DISCHARGE

T _S ＝(T _ON +T _OFF )

${\mathrm{<span\; class="notranslate">\; D.</span>}}_{\mathrm{<span\; class="notranslate">\; MOD</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; ON</span>}}}{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; S</span>}}}$

Wherein _DMOD is the maximum duty cycle obtained after setting the ripple improvement circuit 425 .

Due to the change of the maximum duty cycle of the reset signal, the high-low level transition period of the reset terminal of the flip-flop 409 changes, so the on-off period of the switch 403 controlled by the flip-flop 409 also changes, because the on-off period of the switch 403 The period is related to the output ripple, so by setting the ripple improvement circuit 425 and adjusting the value of the resistor R1 in the ripple improvement circuit 425, the output ripple of the DC-to-DC step-down converter 401 can be adjusted and improved.

The ripple improvement circuit of the present invention can be installed in a DC-to-DC step-down converter, or can be externally connected to a DC-to-DC step-down converter. Please refer to FIG. 7, which is a ripple improvement circuit according to an embodiment of the present invention. Connect the circuit diagram.

The DC-to-DC buck converter 701 is used to convert the input voltage to a lower output voltage. The DC-to-DC buck converter 701 includes a switch 703 , a filter circuit 705 , a comparison circuit 707 , a flip-flop 709 and a reset signal generation circuit 711 . The switch 703 is respectively connected to the input terminal 717 and the voltage stabilizing circuit 705, and the switch 703 in FIG. 7 is a field effect transistor. The filter circuit 705 is connected to the output terminal 713 , and the inductor L and the bypass capacitor C form the filter circuit 705 . The comparison circuit 707 is connected to the output terminal 713 and includes voltage dividing resistors R2 and R3 and a comparator 719 . The comparison circuit 707 and the reset signal generation circuit 711 are jointly connected to the two input terminals of the flip-flop 709. In this embodiment, the flip-flop 709 is an RS flip-flop, and its setting terminal (S terminal) is connected to the comparison circuit 707, and the reset terminal (R terminal) is connected to the reset signal generating circuit 711. The flip-flop 709 is connected to the switch 703 after going through a buffer 715 . The reset signal generating circuit 711 includes an oscillator 721 and an external capacitor Ct. The ripple improvement circuit 725 is externally connected to the DC-to-DC step-down converter 701 , and is connected to the reset signal generating circuit 711 of the DC-to-DC step-down converter 701 . The ripple improvement circuit 725 includes a resistor R1 and a power input terminal 723 . One end of the resistor R1 is connected to the oscillator 721 and the external capacitor Ct, and the power input terminal 723 is connected to the other end of the resistor R1 to provide voltage input and generate a current in the resistor R1, thereby adjusting the charging time of the capacitor Ct and adjusting The maximum duty cycle of the reset signal is used to improve the output ripple of the DC-DC buck converter 701 .

When the DC-to-DC step-down converter 701 is working, the output voltage Vout is divided by the resistors R2 and R3 and then compared with a reference voltage Vref by the comparator 719 . If the divided voltage of the output voltage Vout is greater than the reference voltage Vref, the comparator 719 outputs a low level to the set terminal of the flip-flop 709, and when the reset terminal of the flip-flop 709 receives the reset signal sent by the reset signal generating circuit 711 When it is high, the output terminal (Q terminal) of the flip-flop 709 outputs a low level to the switch 703 after passing through the buffer 715 . The switch 703 receives the low level sent by the flip-flop 709 and disconnects the path between the input terminal 717 and the output terminal 713 . If the divided voltage of the output voltage Vout is less than the reference voltage Vref, the comparator 719 outputs a high level to the set terminal of the flip-flop 709, and when the reset terminal of the flip-flop 709 receives the reset signal generating circuit 711, the reset signal sent is When low, the output terminal (Q terminal) of the flip-flop 709 outputs a high level to the switch 703 after passing through the buffer 715 . The switch 703 receives the high level sent by the flip-flop 709 and turns on the path between the input terminal 717 and the output terminal 713 . The input voltage Vin passes through the filter circuit 705 to output a relatively stable output voltage Vout.

In this embodiment, the ripple improvement circuit 725 is externally connected to the reset signal generating circuit 711 of the DC-to-DC step-down converter 701, and the charging time of the capacitor Ct is adjusted by generating a current on the resistor R1 (the principle is the same as that of FIG. 5 and FIG. (6) The ripple improvement circuit 425 is internally connected to the reset signal generating circuit 411, which is the same, and will not be repeated here). By adjusting the charging time of the capacitor Ct, the maximum duty cycle of the reset signal sent by the reset signal generating circuit 711 to the flip-flop 709 can be adjusted, thereby changing the on-off period of the switch 703 . The output ripple of the DC-to-DC step-down converter 701 is related to the on-off period of the switch 703, so the output of the DC-to-DC step-down converter 701 can be improved by adjusting the value of the resistor R1 in the ripple improvement circuit 725 ripple.

Because the present invention adopts the ripple improvement circuit, it can adjust the maximum duty cycle of the reset signal sent to the flip-flop by adjusting the charging time of the external capacitor of the oscillator, so as to improve the output ripple of the DC-to-DC step-down converter. Wave. Moreover, the ripple improvement circuit of the present invention has a simple structure and is convenient to realize, which can meet the performance index and reduce the cost.

The above disclosures are only a few specific embodiments of the present invention, but the present invention is not limited thereto, and any changes conceivable by those skilled in the art should fall within the protection scope of the present invention.

Claims (7)

1, a kind of DC-DC buck converter, in order to input voltage is converted to lower output voltage, comprise in order to the conducting in the path between control input voltage and output voltage and a switch of cut-off state, with so that the filter circuit that output voltage tends towards stability, in order to export a comparison circuit of an asserts signal according to output voltage, in order to the reset signal generating circuit that produces a reset signal and in order to control a trigger of this switch open and closed condition according to this asserts signal and this reset signal, the electric capacity that this reset signal generating circuit comprises an oscillator and is external to this oscillator, it is characterized in that, this reset signal generating circuit comprises that also a ripple improves circuit, this ripple improves circuit and is connected to this oscillator and this electric capacity, in order to regulating charging interval, thereby adjust the maximum duty cycle of this reset signal to this electric capacity.

2, DC-DC buck converter as claimed in claim 1 is characterized in that, this ripple improves circuit and comprises:

One power input is in order to provide voltage; And

One resistance, an end are connected to this oscillator and this electric capacity, and the other end connects this power input, in order to producing an electric current, regulate charging interval of this electric capacity and adjust the maximum duty cycle of this reset signal.

3, DC-DC buck converter as claimed in claim 2 is characterized in that, this power input connection most this DC-DC buck converter provides input voltage electrical power source.

4, DC-DC buck converter as claimed in claim 1 or 2 is characterized in that, this trigger is a rest-set flip-flop.

5, DC-DC buck converter as claimed in claim 1 or 2 is characterized in that, this switch is a field effect transistor.

6, a kind of ripple improves circuit, in order to improve the output ripple that flows to DC decompression converter that constitutes feedback by a comparator and a trigger always, it connects the reset signal generating circuit that this trigger of this DC-DC buck converter most provides a reset signal, the electric capacity that this reset signal generating circuit comprises an oscillator and is external to this oscillator, it is characterized in that this ripple improves circuit and comprises:

One power input is in order to provide voltage; And

One resistance, one end is connected to this oscillator and this electric capacity, and the other end connects this power input, in order to produce an electric current, adjusting is to charging interval of this electric capacity and adjust the maximum duty cycle of this reset signal, to improve the output ripple of this DC-DC buck converter.

7, ripple as claimed in claim 6 improves circuit, it is characterized in that, this power input connection of this reset signal generating circuit most this DC-DC buck converter provides input voltage electrical power source.

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