CN101460005A - Combined experiment board for electronic circuit - Google Patents
Combined experiment board for electronic circuit Download PDFInfo
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- CN101460005A CN101460005A CNA200710144785XA CN200710144785A CN101460005A CN 101460005 A CN101460005 A CN 101460005A CN A200710144785X A CNA200710144785X A CN A200710144785XA CN 200710144785 A CN200710144785 A CN 200710144785A CN 101460005 A CN101460005 A CN 101460005A
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Abstract
An electronic circuit composite experimental board relates to a circuit experimental board, aiming to resolve the problem that experimental boards have long manufacture periods and secondary manufacture causes abandonment of printed circuit boards. The board surface of a first base board (1) is provided with a first row of points (6) on both the left and the right sides, and the board surface of a second base board (2) is provided with a second row of points (7) on both the left and the right sides. A connection board (5) comprises a double-row socket (51), a small printed circuit board (52) and a metal liner (53), wherein the back surface of the double-row socket (51) is provided with double rows of plug holes (54), and each plug hole of the double rows of plug holes (54) is plugged on the first row of points (6) and the adjacent second row of points (7). Four angles of the first base board (1) and the second base board (2) are respectively provided with connection holes (3), wherein connection holes (3) on the first base board (1) are connected with connection holes (3) on the adjacent first base board (1) via connection boards (4) and inserters (17). The experimental board can shorten manufacture periods of products, which can be reused for many times, thereby avoiding abandonment of printed circuit boards caused by secondary board manufacture.
Description
Technical field
The present invention relates to a kind of Experiment of Electrical Circuits plate.
Background technology
Brassboard is experimenter's commonly used instrument when doing electronic circuit experiment, and it is stable that brassboard has debugging, and experiment is convenient, rapidly, can reduce to a great extent the experimenter the amount of labour, increase work efficiency.The experimenter generally adopts two kinds of methods when the exploitation electronic product, first kind is: make electronic circuit experiment plate by hand after having designed circuit theory diagrams, debug, make formal printed circuit board (PCB) again after debugging is passed through.Its shortcoming is to make the brassboard inconvenience by hand, and fabrication cycle is long.Second method is: directly make printed circuit board (PCB) after having designed circuit theory diagrams, carry out manual setting, modification behind the making printed circuit board (PCB), and then secondary is made printed circuit board (PCB).Its shortcoming is that the printed circuit board (PCB) of making for the first time can not be used further to can only scrap on other circuit, has therefore wasted a large amount of printed circuit board (PCB)s.
Summary of the invention
The objective of the invention is that to make the breakboard construction fabrication cycle by hand long for solution, the problem that secondary making sheet is scrapped the printed circuit board (PCB) made for the first time provides a kind of combined experiment board for electronic circuit.
The present invention includes first substrate 1, second substrate 2, connecting plate 4, line connection board 5, first row row's pin 6 and secondary series row pin 7, the left and right sides is respectively equipped with the first row row pin 6 on the plate face of first substrate 1, the left and right sides is respectively equipped with secondary series row pin 7 on the plate face of second substrate 2, line connection board 5 is by double socket 51, fritter printed circuit board (PCB) 52, metal lining 53 is formed, be provided with metal lining 53 in the double socket 51, fritter printed circuit board (PCB) 52 is provided with two row pads 55, connect by lead 56 between the two horizontal pads 55, fritter printed circuit board (PCB) 52 be located at double socket 51 above, the upper end of metal lining 53 pass pad 55 outer be exposed at fritter printed circuit board (PCB) 52 above, the back side of double socket 51 is provided with double jack 54, each jack of double jack 54 is inserted in the first row row pin 6 and arranges on the pin 7 with adjacent secondary series, four drift angle places are provided with connecting hole 3 respectively on first substrate 1 and second substrate 2, the position of connecting plate 4 corresponding connecting holes 3 is provided with that connecting hole 3 usefulness connecting plates 4 are connected with plug-in unit 17 on connecting hole 3 and adjacent second substrate 2 on installing hole 41, the first substrates 1.
Advantage of the present invention is: the present invention can form different circuit according to different circuit theory diagrams, combined and spliced easy, therefore shortened the fabrication cycle of making breakboard construction by hand, the present invention can repeatedly reuse, thus the scrapping of the printed circuit board (PCB) of having avoided secondary making sheet to cause making for the first time.
Description of drawings
Fig. 1 is overall structure schematic diagram of the present invention (single-row row's pin is set on the plate face of first substrate 1), Fig. 2 is overall structure schematic diagram of the present invention (corresponding biserial row pin is set on the plate face of first substrate 1), Fig. 3 is the upward view (the first row row pin 6 is arranged pin 7 usefulness line connection boards 5 with adjacent secondary series and is connected) of Fig. 1, Fig. 4 is the upward view (the first row row pin 6 is arranged pin 7 usefulness jumper cap 12 with adjacent secondary series and is connected) of Fig. 1, Fig. 5 is the structural representation of line connection board 5, Fig. 6 is the vertical view of Fig. 5, and Fig. 7 is the upward view of Fig. 5.Fig. 8 is the plate face length degree of second substrate 2 structural representation that the present invention is combined to form when being 2 times of plate face length degree of first substrate 1, Fig. 9 is the plate face length degree of second substrate 2 structural representation that the present invention is combined to form when being 3 times of plate face length degree of first substrate 1, and Figure 10 is the plate face length degree of first substrate 1 structural representation that the present invention is combined to form when being 2 times of plate face length degree of second substrate 2.
Embodiment
Embodiment one: present embodiment is described in conjunction with Fig. 1 and Fig. 3, present embodiment is by first substrate 1, second substrate 2, connecting plate 4, line connection board 5, first row row's pin 6 and secondary series row pin 7 are formed, the left and right sides is respectively equipped with the first row row pin 6 on the plate face of first substrate 1, the left and right sides is respectively equipped with secondary series row pin 7 on the plate face of second substrate 2, referring to Fig. 5～Fig. 7, line connection board 5 is by double socket 51, fritter printed circuit board (PCB) 52, metal lining 53 is formed, be provided with metal lining 53 in the double socket 51, fritter printed circuit board (PCB) 52 is provided with two row pads 55, connect by lead 56 between the two horizontal pads 55, fritter printed circuit board (PCB) 52 be located at double socket 51 above, the upper end of metal lining 53 pass pad 55 outer be exposed at fritter printed circuit board (PCB) 52 above, the back side of double socket 51 is provided with double jack 54, each jack of double jack 54 is inserted in the first row row pin 6 and arranges on the pin 7 with adjacent secondary series, line connection board 5 is finished the first row row pin 6 and is electrically connected with secondary series row pin 7, referring to Fig. 1 and Fig. 2, four drift angle places are provided with connecting hole 3 respectively on first substrate 1 and second substrate 2, the position of connecting plate 4 corresponding connecting holes 3 is provided with that connecting hole 3 usefulness connecting plates 4 are connected with plug-in unit 17 on connecting hole 3 and adjacent second substrate 2 on installing hole 41, the first substrates 1.At first splice according to the design on the drawing, with first substrate 1 and 2 alignment of second substrate, put connecting plate 4, adjusting the position makes the connecting hole 3 on first substrate 1 and second substrate 2 overlap with installing hole 41 on the connecting plate 4, fastening with plug-in unit 17, or it is fastening with screw 10 and nut 11, realized the mechanical connection between plate and the plate, adopting line connection board 5 or jumper cap 12 that the row of first on first substrate 1 row pin 6 is arranged pin 7 corresponding two stitch with the secondary series on second substrate 2 according to the needs that connect according to the identifier on the plate face 9 is electrically connected, adopt solid wires 13 or winding displacement 14 that row's pin of non-conterminous position is electrically connected according to the needs that connect according to the identifier on the plate face 9, see Fig. 8, needs according to the circuit theory diagrams design are provided with various electronic components on the plate face of first substrate 1 and second substrate 2, debug after connection is finished.
Embodiment two: in conjunction with Fig. 1 and Fig. 2 present embodiment is described, the longitudinal centre line of the first row row pin 6 of present embodiment and its close sideline a of longitudinal center's linear distance of secondary series row pin 7 are 1.27mm.So being provided with is for making the present invention reach standardization, and it is simpler and more direct to combine, because the spacing in two socket holes in the line connection board of standard 5 is 2.54mm.
Embodiment three: in conjunction with Fig. 1 and Fig. 2 present embodiment is described, the distance to sideline, second substrate, 2 top equates to the sideline, top of the distance in sideline, first substrate, 1 top and secondary series row pin 7 in the sideline, top of first row rows' pin 6 of present embodiment.This kind structure can make the first row row pin 6 align naturally with secondary series row pin 7 when combination, is convenient to the overall connection of lead.
Embodiment four: in conjunction with Fig. 4 present embodiment is described, the difference of embodiment one is: the first adjacent row row pin 6 of present embodiment is provided with jumper cap 12 with secondary series row pin 7.This kind structure utilizes jumper cap 12 that the secondary series row pin 7 on the row of first on the first substrate 1 row's pin 6 and second substrate 2 is coupled together when combination, is convenient to lead and connects.
Embodiment five: present embodiment is described in conjunction with Fig. 1 and Fig. 2, present embodiment with the difference of embodiment one is: present embodiment also increases as required single-row row's pin 8 and corresponding biserial row pin 15, when the single-row row of needs pin 8, the left and right sides is provided with single-row row's pin 8 on the plate face of first substrate 1 and second substrate 2, when the corresponding biserial row of needs pin 15, when the left and right sides is provided with corresponding biserial row pin 15 on the plate face of first substrate 1 and second substrate 2.This design is convenient to the different circuit that require and is connected.Other composition and annexation are identical with embodiment one.
Embodiment six: in conjunction with Fig. 2 present embodiment is described, the difference of present embodiment and embodiment one is: the secondary series row pin 7 on the row of first on first substrate 1 of the present embodiment row's pin 6 and second substrate 2 is set to biserial row pin as required.This design is for adapting to the requirement of various circuit.Other composition and annexation are identical with embodiment one.
Embodiment seven: the plate face length degree of second substrate 2 of present embodiment is the integral multiple of the plate face length degree of first substrate 1.Referring to Fig. 8, when the plate face length degree of second substrate 2 is 2 times of plate face length degree of first substrate 1, with two first substrates 1 and 2 combinations of one second substrate, the distance to sideline, first substrate, 1 top equates the center line I of second substrate 2 to the sideline, top of the distance in the secondary series row sideline, pin 7 top of second substrate, 2 belows and the first row row pin 6 when making up like this; The present invention can also be on this basis, and recombinant is spliced first substrate 1 or second substrate 2 respectively in the left and right sides of first substrate 1 and second substrate 2; Referring to Fig. 9, when the plate face length degree of second substrate 2 was 3 times of plate face length degree of first substrate 1, with three first substrates 1 and one second substrate 2 combinations, the rest may be inferred.This design makes more standard of layout of the present invention, can satisfy the requirement of various circuit boards.
Embodiment eight: the plate face length degree of first substrate 1 of present embodiment is the integral multiple of the plate face length degree of second substrate 2.Referring to Figure 10, when the plate face length degree of first substrate 1 is 2 times of plate face length degree of second substrate 2, with two second substrates 2 and 1 combination of one first substrate, the distance to sideline, second substrate, 2 top equates the center line II of first substrate 1 to the sideline, top of the distance in the first row row sideline, pin 6 top of first substrate, 1 below and secondary series row pin 7 when making up like this; The present invention can also be on this basis, and recombinant is spliced first substrate 1 or second substrate 2 respectively in the left and right sides of first substrate 1 and second substrate 2; When the plate face length degree of first substrate 1 was 3 times of plate face length degree of second substrate 2, with three second substrates 2 and one first substrate 1 combination, the rest may be inferred.This design makes more standard of layout of the present invention, can satisfy the requirement of various circuit boards.
Claims (8)
1, a kind of combined experiment board for electronic circuit, it comprises first substrate (1), second substrate (2), connecting plate (4), line connection board (5), first row row's pin (6) and secondary series row pin (7), it is characterized in that the left and right sides is respectively equipped with the first row row pin (6) on the plate face of first substrate (1), the left and right sides is respectively equipped with secondary series row pin (7) on the plate face of second substrate (2), line connection board (5) is by double socket (51), little printed circuit board (52), metal lining (53) is formed, be provided with metal lining (53) in the double socket (51), little printed circuit board (52) is provided with two row pads (55), connect by lead (56) between the two horizontal pads (55), little printed circuit board (52) be located at double socket (51) above, the upper end of metal lining (53) pass pad (55) outer be exposed at fritter printed circuit board (PCB) (52) above, the back side of double socket (51) is provided with double jack (54), each jack of double jack (54) is inserted in first row row's pins (6) and arranges on the pin (7) with adjacent secondary series, last four the drift angle places of first substrate (1) and second substrate (2) are provided with connecting hole (3) respectively, the position of the corresponding connecting hole of connecting plate (4) (3) is provided with installing hole (41), and the connecting hole (3) on first substrate (1) is gone up connecting hole (3) with adjacent second substrate (2) and is connected with plug-in unit (17) with connecting plate (4).
2, combined experiment board for electronic circuit according to claim 1 is characterized in that the longitudinal centre line of first row row's pins (6) and its close sideline (a) of longitudinal center's linear distance of secondary series row's pin (7) are 1.27mm.
3, combined experiment board for electronic circuit according to claim 2, the sideline, top that it is characterized in that first row rows' pins (6) are arranged pin (7) to the distance in first substrate (1) sideline, top and secondary series sideline, top equates to the distance in second substrate (2) sideline, top.
4,, it is characterized in that first row rows' pins (6) and adjacent secondary series row's pin (7) are provided with jumper cap (12) according to claim 1,2 or 3 described combined experiment board for electronic circuit.
5, combined experiment board for electronic circuit according to claim 4, it is characterized in that it also comprises single-row row's pin (8) and corresponding biserial row pin (15), the left and right sides is provided with single-row row's pin (8) or corresponding biserial row pin (15) on the plate face of first substrate (1) and second substrate (2).
6, combined experiment board for electronic circuit according to claim 1 is characterized in that the secondary series row's pin (7) on the row of first on first substrate (1) row's pin (6) and second substrate (2) is set to corresponding biserial row pin.
7, combined experiment board for electronic circuit according to claim 1, the plate face length degree that it is characterized in that second substrate (2) are the integral multiples of the plate face length degree of first substrate (1).
8, combined experiment board for electronic circuit according to claim 1, the plate face length degree that it is characterized in that first substrate (1) are the integral multiples of the plate face length degree of second substrate (2).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA200710144785XA CN101460005A (en) | 2007-12-10 | 2007-12-10 | Combined experiment board for electronic circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA200710144785XA CN101460005A (en) | 2007-12-10 | 2007-12-10 | Combined experiment board for electronic circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN101460005A true CN101460005A (en) | 2009-06-17 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNA200710144785XA Pending CN101460005A (en) | 2007-12-10 | 2007-12-10 | Combined experiment board for electronic circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101460005A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102176757A (en) * | 2011-01-25 | 2011-09-07 | 信利半导体有限公司 | Camera functional test plate |
| CN103714735A (en) * | 2014-01-20 | 2014-04-09 | 李彦 | Direct connection type combination experimental board |
-
2007
- 2007-12-10 CN CNA200710144785XA patent/CN101460005A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102176757A (en) * | 2011-01-25 | 2011-09-07 | 信利半导体有限公司 | Camera functional test plate |
| CN102176757B (en) * | 2011-01-25 | 2013-11-06 | 信利光电股份有限公司 | Camera functional test plate |
| CN103714735A (en) * | 2014-01-20 | 2014-04-09 | 李彦 | Direct connection type combination experimental board |
| CN103714735B (en) * | 2014-01-20 | 2016-01-20 | 李彦 | Direct connection type combination experimental board |
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| C06 | Publication | ||
| PB01 | Publication | ||
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| C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Open date: 20090617 |