CN101446927B

CN101446927B - Flash memory system and control method thereof

Info

Publication number: CN101446927B
Application number: CN2008101906338A
Authority: CN
Inventors: 李元晖; 刘名哲
Original assignee: Xiangshuo Science & Technology Co Ltd
Current assignee: Xiangshuo Science & Technology Co Ltd; Asmedia Technology Inc
Priority date: 2008-12-26
Filing date: 2008-12-26
Publication date: 2010-12-01
Anticipated expiration: 2028-12-26
Also published as: CN101446927A

Abstract

The invention provides a flash memory system and a control method thereof which can resist the loss of a flash memory address conversion layer list in the flash memory system caused by a sudden service interruption of power; the flash memory system is connected with the host computer terminal of a computer system; wherein, the power of the computer system is supplied by a first voltage source; the power of the flash memory system is supplied by a second voltage source; and the second voltage source is supplied by the first voltage source; the flash memory system comprises a flash memory; and a system memory; the flash memory is provided with the flash memory address conversion layer list; wherein, when the level of the first voltage source is lower than a first specific value, before the level of the second voltage source is lower than a second specific value, the flash memory address conversion layer list is written into a specific address of the flash memory. The invention can avoidan FTL Table originally memorized in a volatile system memorizer from disappearing when the system memorizer is powered off suddenly.

Description

Flash memory system and control method thereof

Technical field

The present invention relates to a kind of flash memory system, relate in particular to a kind of flash memory system and control method thereof of resisting the power supply sudden power and causing the flash memory address conversion layer list in the flash memory system to be lost.

Background technology

Present storer (Memory) is broadly divided into two classes, is respectively that volatile memory (VolatileMemory) is with nonvolatile memory (Non-volatile Memory).Volatile memory is representative with static RAM (SRAM) with dynamic RAM (DRAM), it is characterized by when power supply is closed, and the data that volatile memory is stored will be vanished from sight.Nonvolatile memory is representative with Erasable Programmable Read Only Memory EPROM (EPROM), Electrically Erasable Read Only Memory (EEPROM), flash memory (Flash Memory), it is characterized by when power supply is closed, nonvolatile memory is still possessed the data that storer is at that time stored, but its shortcoming is that relative reading can be slower than SRAM or DRAM with writing speed.In nonvolatile memory, because but flash memory has low-power consumption, density height, volume is little, reliability is high, can wipe and advantage such as overprogram, therefore only be used in the past flash memory as the auxilary unit use of computer system, in recent years, become the part computer system, as the main memory storage of mini notebook.

Please refer to Fig. 1, it is depicted as the structural representation of a flash memory.In the specification of flash memory, flash memory is made up of a plurality of blocks (Block), and each block (Block) is made up of a plurality of pages (Page) again.For convenience of description, flash memory 10 shown in Figure 1 is made up of four block B1, B2, B3, B4.Block B1 is made up of four page P1-1, P1-2, P1-3, P1-4 again; Block B2 is made up of four page P2-1, P2-2, P2-3, P2-4 again; Block B3 is made up of four page P3-1, P3-2, P3-3, P3-4 again; Block B4 is made up of four page P4-1, P4-2, P4-3, P4-4 again; Wherein each page Page capacity is 4K Byte (byte), and each block (Block) capacity is 16K Byte (byte).Certainly, the number of pages of the capacity of each page and each block can be according to dissimilar flash memories and difference.

In addition, in the specification of flash memory, reading or writing of data is to be least unit with the page (Page), and the removing of data (Erase) is to be least unit with block (Block).Because flash memory does not allow the same page (Page) is done the direct renewal (Update) of data, therefore when desire is upgraded data in a certain page (Page), institute's data updated must be deposited in addition in another page (Page), and the data definition after will upgrading is valid data, and the data definition before will upgrading is an invalid data.

For instance, Fig. 2 A its be depicted as the synoptic diagram that partial pages (Page) in the flash memory 10 store data.Partial page (Page) in the flash memory 10 stores data DATA0, DATA1, DATA2, DATA3, DATA4, DATA5, may be defined as the blank page (Free) and remain the page (Page) that does not store data.When computer system is desired more new data DATA2 (being stored in the page P4-1 of block B4), can not directly on the page P4-1 of block B4, upgrade data DATA2, but must be with the data DATA2 after upgrading ^*Be stored to a blank page (Free), for example the page P1-1 of block B1 is defined as invalid data with the data DATA2 before the page P4-1 institute storage update of block B4 at last again, and with the data DATA2 behind the page P1-1 institute storage update of block B1 ^*Be defined as valid data, shown in Fig. 2 B.When a certain block, as block B4, when the data that its page of forming (Page) is stored are invalid data or are the blank page (Free), computer system can make to remove (Erase) to whole block B4, make all interior pages or leaves of whole block be blank page (Free) and store other data, shown in Fig. 2 C in order to the capacity that discharges block B4.

Because the special access features of flash memory, also caused directly compatible that flash memory can not be with computer system archives economy (as FAT16/32, NTFS) originally.In order to allow flash memory must add a flash memory address conversion layer list (FlashTranslation Layer Table is hereinafter to be referred as FTL Table) in addition in original archives economy (as FAT16/32, NTFS) running down.The major function of FTL Table is logical block addresses (Logical Block Address, LBA) with physical address (the Physical BlockAddress of flash memory, PBA) conversion work, also be about to the logical block addresses (LBA) that the host side (Host) of computer system is sent, convert the physical address (PBA) of flash memory to.

Please refer to Fig. 3, it is depicted as the block diagram of a known flash memory system.Flash memory system 30 mainly comprise flash memory 10, a system storage (System Memory) 32, with a micro controller (MicroController) 34; Wherein system storage 32 stores the FTL Table of flash memory system 30, and system storage 32 is a volatile memory; Micro controller 34 is connected in the host side (Host) of flash memory 10, system storage 32 and flash memory system 30.When host side (Host) desire to flash memory 10 carry out data read, write or delete action the time, these actions are to be unit with logical block addresses (LBA), therefore when micro controller 34 receives the logical block addresses (LBA) that host side (Host) sent, must be by the FTL Table that is stored in the system storage 32, logical block addresses (LBA) is converted to the physical address (PBA) of flash memory 10, and micro controller 34 could be moved these correct physical address that is executed in flash memory 10 (PBA).For instance, when host side (Host) desire is upgraded the data DATA2 in the flash memory 10, the instruction that host side (Host) is sent not is the page P4-1 of the block B4 of direct sensing flash memory 10, but elder generation points to the logical block addresses LBA2 of FTL Table, and points to the page P4-1 of the block B4 of flash memory 10 again via logical block addresses (LBA2).

In order to allow host side (Host) to the reading, write or delete action and can be performed apace of flash memory 10 performed data, FTL Table is designed to be stored in the system storage 32 of the volatibility with faster processing speed.Because volatile memory is characterized as when power supply is closed, its data of storing will be vanished from sight, for avoiding computer system to cause the disappearance of FTL Table because of shutdown makes system storage 32 outage backs, FTL Table must be stored in the particular address in non-volatile flash memory 10 in addition before the computer system shutdown.That is to say that when computer system was started shooting, the FTL Table that micro controller 34 can will be stored in the particular address in non-volatile flash memory 10 earlier was loaded in the system storage 32 of (Load) volatibility.Be loaded into the system storage 32 of (Load) volatibility as FTL Table after, host side (Host) can read, write or delete action to what the physical address (PBA) of non-volatile flash memory 10 was carried out data by FTL Table.When computer system is shut down, micro controller 34 can will be stored in FTL Table in the system storage 32 of volatibility earlier and be stored in particular address in non-volatile flash memory 10, can guarantee that so FTL Table still can be saved computer system causes outage because of shutdown after.

Yet, can be stopped power supply along with the moment of system storage 32 and disappear in case computer system, is stored in FTL Table in the system storage 32 of volatibility this moment by abnormal outage.When next computer system power-on, computer system must be by the data of all pages (Page) in all blocks (Block) in the flash memory 10 of reading non-volatile, rebuild FTL Table, and that whole reconstruction FTLTable often needs is consuming time more than several minutes, and causes user's inconvenience.

Summary of the invention

For overcoming the prior art defective, the present invention proposes a kind of flash memory system, is connected in a host side of a computer system, and wherein computer system is by one first voltage fed, and flash memory system is powered by one second voltage source, and flash memory system comprises: a flash memory; One system storage stores a flash memory address conversion layer list; One micro controller is connected in the host side of flash memory, system storage and computer system; And a voltage check device, be connected in micro controller, in order to detect the level of first voltage source; Wherein, when the level of first voltage source is lower than one first particular value, voltage check device is exported a power supply failure signal to micro controller, and micro controller is written into the flash memory address conversion layer list in one particular address of flash memory be lower than one second particular value with the level of second voltage source after receiving the power supply failure signal before.

The present invention also proposes a kind of control method of flash memory system, is applied to a computer system, and the method includes: when the level to one first voltage source of computer system power supply is lower than one first particular value, send a power supply failure signal to flash memory system; And according to the power supply failure signal that is received, before the level to one second voltage source of flash memory system power supply is lower than one second particular value, a flash memory address conversion layer list that is stored in the volatile memory in the flash memory system is written in the nonvolatile memory in the flash memory system.

Flash memory system proposed by the invention can be in the moment that power supply is stopped power supply, and is written into non-volatile system storage in the flash memory system with originally being stored in FTL Table in the system storage of the volatibility in the flash memory system.The interior FTLTable of system storage that so can avoid script to be stored in volatibility can be stopped power supply along with the moment of system storage and disappear.

Description of drawings

The present invention must draw a more deep understanding by following accompanying drawing and explanation:

Figure 1 shows that the structural representation of a flash memory.

Fig. 2 A, B, C are depicted as the synoptic diagram that flash memory storage shown in Figure 1 has data.

Figure 3 shows that the block diagram of a known flash memory system.

Fig. 4 A is depicted as and is applied to the voltage detecting system block diagram in order to the change in voltage that detects voltage source of the present invention.

Fig. 4 B is depicted as the change in voltage synoptic diagram that is applied to external voltage Ve of the present invention, high voltage Vh and low-voltage Vl.

Figure 5 shows that the block diagram of flash memory system of the present invention.

Figure 6 shows that the present invention is stored in FTL Table the systematic square frame synoptic diagram of the flash memory set of a plurality of flash memories of one tool.

Embodiment

The present invention utilizes a voltage check device, in order to detect change in voltage to a voltage source of computer system power supply, before voltage that voltage source is exported is lower than a particular value and stores the volatibility of FTL Table because of outage system storage is stopped power supply, the interior FTL Table of system storage that voltage check device promptly notifies micro controller initiatively will be stored in volatibility is written in the particular address of non-volatile flash memory, the FTLTable that so can avoid originally being stored in the system storage of volatibility can also avoid rebuilding the waste of FTL Table required time simultaneously along with being stopped power supply and disappearing of system storage.

Please refer to Fig. 4 A, it is depicted as and is applied to the voltage detecting system block diagram in order to the change in voltage that detects voltage source of the present invention.Voltage detecting system mainly comprises a power supply unit 42 and a voltage check device 44; Wherein power supply unit 42 can receive the external voltage Ve (can be 12V or 110V) that an external power source (External Power) is provided.Power supply unit 42 mainly the external voltage Ve that is received is converted to can be directly to a high voltage Vh (can be 5V) and a low-voltage Vl (can be 3.3V) of computer system power supply; Its high voltage appearance Vh (5V) is mainly higher device or the system's power supply of power consumption in the computer system, as CD-ROM drive etc.; Low-voltage Vl (3.3V) is mainly device or the system's power supply that power consumption is lower in the computer system, as flash memory system etc.High voltage Vh and low-voltage Vl that voltage check device 44 is exported in order to the external voltage Ve that receives external power source and export and power supply unit 42, and when external voltage Ve drops to a particular value, voltage check device 44 exportable power supply failure signals.

Please refer to Fig. 4 B, it is depicted as the change in voltage synoptic diagram that is applied to external voltage Ve of the present invention, high voltage Vh and low-voltage Vl.At first before time point t1, external power source can be stablized output external voltage Ve, and power supply unit 42 (Fig. 4 A) also can be stablized output HIGH voltage Vh and low-voltage Vl according to external voltage Ve.At time point t1, because computer system outage, the external voltage Ve moment that makes that external power source exports descends rapidly.Because power supply unit 42 (Fig. 4 A) the high voltage Vh that is exported and the source of low-voltage Vl are external voltage Ve, so high voltage Vh and low-voltage Vl must be accompanied by the moment decline of external voltage Ve and descend.Because there is the reaction time in the time point that the time point that high voltage Vh moment descends and external voltage Ve moment descend, thus high voltage Vh moment the time point that descends will be later than the time point of the moment decline of external voltage Ve; In like manner, the time point that descends also will be later than the time point that moment of external voltage Ve descends low-voltage Vl moment.For avoiding ripple effect (Ripple Effect), it is that external power source stops the time point t1 to computer system power supply that the present invention defines when external voltage Ve is lower than a particular value Ved in addition; When being lower than a particular value Vhd, high voltage Vh stops time point t2 to computer system power supply for high voltage Vh; When being lower than a particular value Vld, low-voltage Vl stops time point t3 to computer system power supply for low-voltage Vl.In addition, there are a reaction time T12 in time point t2 and time point t1; There are a reaction time T12+T23 in time point t3 and time point t1.

Because flash memory system is to provide power supply by low-voltage Vl, and low-voltage Vl stops flash memory system supplying time point t3 and external power source are stopped to be enough to allow computer system to flash memory generation read/write time clock repeatedly to the existing reaction time T12+T23 of the time point t1 of computer system power supply, also promptly in reaction time T12+T23, computer system can be carried out reading and writing repeatedly to flash memory, therefore the present invention promptly utilizes in this reaction time T12+T23, originally the FTL Table that is stored in the system storage of volatibility is written in the particular address of non-volatile flash memory, and the FTL Table that so can avoid originally being stored in the system storage of volatibility can stop power supply to system storage and disappears along with low-voltage Vl.

Please refer to Fig. 5, it is depicted as flash memory system synoptic diagram of the present invention.Flash memory system 30 of the present invention mainly comprise flash memory 10, system storage 32, micro controller 34, with voltage check device 44; Wherein system storage 32 stores the FTL Table of flash memory system 30, and system storage 32 is a volatile memory; In addition, micro controller 34 is connected in the host side (Host) of flash memory 10, system storage 32 and flash memory system 30; In addition, voltage check device 44 is connected to micro controller 34, in order to receive high voltage Vh and the low-voltage Vl that external voltage Ve that external power source exports and power supply unit 42 are exported, and when external voltage Ve dropped to particular value Ved, voltage check device 44 exportable power supply failure signals were to micro controller 34; In addition, the flash memory system 30 low-voltage Vl power supply of being exported by power supply unit 42.

At first, when external power source can be stablized output external voltage Ve, and when power supply unit 42 also can be stablized output HIGH voltage Vh and low-voltage Vl according to external voltage Ve, before also being the time point t1 of Fig. 4 B, the FTL Table of the system storage 32 that host side (Host) can be by being stored in volatibility reads, writes or delete action to what the physical address (PBA) of non-volatile flash memory 10 was carried out data.Stop to make external voltage Ve drop to particular value Ved during moment when external power source at time point t1 (Fig. 4 B) to computer system power supply, this moment is because reaction time T12+T23 (Fig. 4 B), low-voltage Vl still can continue flash memory system 30 power supplies, and the system storage 32 interior FTL Table that therefore are stored in volatibility can't stop computer system power supply being disappeared along with external power source.Detect external voltage Ve when dropping to particular value Ved at time point t1 (Fig. 4 B) when voltage check device 44, voltage check device 44 be the out-put supply failure signal to micro controller 34, this moment, micro controller 34 can be written in the particular address of non-volatile flash memory 10 according to the FTL Table that the power supply failure signal that is received will be stored in the system storage 32 of volatibility; Wherein drop to particular value Ved from what voltage check device 44 detected external voltage Ve, to micro controller 34, the system storage 32 interior FTL Table that will be stored in volatibility to micro controller 34 are written into the time required in the particular address of non-volatile flash memory 10 less than reaction time T12+T23 (Fig. 4 B) to voltage check device 44 out-put supply failure signals.At time point t3 (Fig. 4 B), owing to moment of external voltage Ve descend rapidly cause to the low-voltage Vl of flash memory system 350 power supplies also thereupon moment descend rapidly, finally cause the stopping power supply of system storage 32 of volatibility caused the disappearance of FTL Table.Because it is preceding at time point t3 (Fig. 4 B), micro controller 34 is written into the system storage 32 interior FTL Table that are stored in volatibility originally in the particular address of non-volatile flash memory 10, therefore can guarantee that FTL Table can be along with stopping the power supply of flash memory system 30 is disappeared at time point t3 (Fig. 4 B) low-voltage Vl.

In addition, if flash memory system of the present invention adopts a plurality of flash memories, then micro controller can adopt the run-in index storage to FTL Table in the storage of flash memory.Please refer to Fig. 6, it is depicted as micro controller FTL Table is stored in the systematic square frame synoptic diagram of the flash memory set of a plurality of flash memories of a tool, and wherein flash memory set 60 is made up of first flash memory 601, second flash memory 602, the 3rd flash memory 603, the 4th flash memory 604.In order to guarantee that more FTLTable can be stored in flash memory set 60 before low-voltage Vl stops system storage 32 power supply to volatibility, micro controller 34 can adopt the run-in index storage that the various piece of FTL Table is stored in respectively in the flash memory set 60, and for example the Table-1 of first of FTL Table can be stored in first flash memory 601 of flash memory set 60; The second portion Table-2 of FTL Table can be stored in second flash memory 602 of flash memory set 60; The third part Table-3 of FTL Table can be stored in the 3rd flash memory 603 of flash memory set 60; The 4th part Table-4 of FTL Table can be stored in the 4th flash memory 604 of flash memory set 60.

Therefore, voltage check device in the flash memory system of the present invention, micro controller externally voltage Ve stop to behind the computer system power supply and low-voltage Vl stop before the flash memory system power supply, the FTL Table that originally is stored in the system storage of volatibility is written in non-volatile flash memory, the FTL Table that so can avoid originally being stored in the system storage of volatibility can also avoid rebuilding the waste of FTL Table required time simultaneously along with being stopped power supply and disappearing of system storage.

In sum; though the present invention discloses as above with preferred embodiment; right its is not in order to limit the present invention; any those of ordinary skills; without departing from the spirit and scope of the present invention; when can making various changes and retouching, so protection scope of the present invention is as the criterion when looking the scope that claims define.

Claims

1. flash memory system is connected in the host side of computer system, it is characterized in that wherein said computer system is by first voltage fed, and described flash memory system is powered by second voltage source, and described flash memory system comprises:

Flash memory;

System storage stores the flash memory address conversion layer list;

Micro controller is connected in the described host side of described flash memory, described system storage and described computer system; And

Voltage check device is connected in described micro controller, in order to detect the level of described first voltage source;

Wherein, when the level of described first voltage source is lower than first particular value, described voltage check device is to described micro controller out-put supply failure signal, and described micro controller is written into described flash memory address conversion layer list in the particular address of described flash memory be lower than second particular value with the level of described second voltage source after receiving described power supply failure signal before.

2. flash memory system according to claim 1 is characterized in that, wherein said system storage is a volatile memory.

3. flash memory system according to claim 1 is characterized in that, wherein said first voltage source is an external power source.

4. flash memory system according to claim 1 is characterized in that, wherein said second voltage source is exported via power supply unit by described first voltage source.

5. flash memory system according to claim 1 is characterized in that, the described host side of wherein said computer system can read, write or delete action to what described flash memory was carried out data via the described flash memory address conversion layer list that is stored in described system storage.

6. flash memory system according to claim 1 is characterized in that, the level that the level of wherein said first voltage source is lower than described first particular value and described second voltage source is lower than between described second particular value, has the reaction time.

7. flash memory system according to claim 6 is characterized in that, wherein in the described reaction time, described computer system can write the data that described flash memory carries out repeatedly.

8. flash memory system according to claim 1 is characterized in that, wherein after described computer system restarted, the described flash memory address conversion layer list that described micro controller will be stored in described flash memory was written into described system storage.

9. flash memory system according to claim 1 is characterized in that, wherein said first voltage source is 12 volts or 110 volts, and described second voltage source is 3.3 volts.

10. flash memory system according to claim 1, it is characterized in that, wherein described flash memory address conversion layer list is written into described flash memory and can adopts the run-in index storage, promptly the flash memory address conversion layer list is divided into a plurality of parts, is stored in a plurality of flash memories in the flash memory set respectively.

11. the control method of a flash memory system is applied to computer system, it is characterized in that, described method includes:

When the level to first voltage source of described computer system power supply is lower than first particular value, send the power supply failure signal to described flash memory system; And

According to the described power supply failure signal that is received, before the level to second voltage source of described flash memory system power supply is lower than second particular value, the flash memory address conversion layer list that is stored in the volatile memory in the described flash memory system is written in the nonvolatile memory in the described flash memory system.

12. control method according to claim 11 is characterized in that, wherein said first voltage source is an external power source.

13. control method according to claim 11 is characterized in that, wherein said second voltage source is provided by described first voltage source.

14. control method according to claim 11 is characterized in that, the level that the level of wherein said first voltage source is lower than described first particular value and described second voltage source is lower than between described second particular value, has the reaction time.

15. control method according to claim 11 is characterized in that, wherein after described computer system restarts, the described flash memory address conversion layer list that is stored in the described nonvolatile memory is written into described volatibility system storage.