CN101442058B - Thin-film transistor array substrate and patching method thereof - Google Patents
Thin-film transistor array substrate and patching method thereof Download PDFInfo
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- CN101442058B CN101442058B CN2008101866970A CN200810186697A CN101442058B CN 101442058 B CN101442058 B CN 101442058B CN 2008101866970 A CN2008101866970 A CN 2008101866970A CN 200810186697 A CN200810186697 A CN 200810186697A CN 101442058 B CN101442058 B CN 101442058B
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Abstract
The invention provides a thin film transistor array substrate. The key points of the invention comprise that a pixel region is also provided with a first element and a second element; the first element comprises a grid insulation layer directly covering the surface of a substrate base plate, a semiconductor layer formed on the grid insulation layer and a first source electrode and a first drain electrode which are both formed on the semiconductor layer; and the second element comprises a grid insulation layer directly covering the surface of the substrate base plate, a semiconductor layer formed on the grid insulating layer and a second source electrode and a second drain electrode which are both formed on the semiconductor layer. For the thin film transistor array substrate with a pixel repairing structure, when the pixel bright spot defect generates, by utilizing a repairing method for the thin film transistor array substrate provided by the invention, the voltage at both ends of a liquid crystal capacitor is approach to the voltage difference VL0 corresponding to the darkest gray scale L0 in the end, so no light leakage occurs while viewing from different visual angles.
Description
Technical field
The present invention relates to technical field of liquid crystal display, particularly a kind of thin-film transistor array base-plate and method for repairing and mending thereof with pixel preparing structure.
Background technology
At present, LCD is applied in the every field widely as a kind of of flat-panel monitor, and it has advantages such as low-power consumption, thin type light weight.Usually, LCD comprises a liquid crystal panel, liquid crystal panel comprise thin-film transistor array base-plate, have the colored filter substrate of public electrode and be filled in thin-film transistor array base-plate with pixel electrode and colored filter substrate between liquid crystal layer.Produce electric field between pixel electrode and the public electrode, and control the transmissivity that the electric field intensity that is applied to liquid crystal layer is controlled incident light, thereby realize the bright and dark control of liquid crystal panel by two electrodes.
The thin-film transistor array base-plate of LCD comprises the pixel electrode that is formed by tin indium oxide (ITO) in a plurality of pixel regions that many gate lines, many data lines, many gate lines and many data line mutually insulated cross arrangements limit, and be arranged near the infall of data line and gate line thin film transistor (TFT) (Thin Film Transistor, TFT).Thin film transistor (TFT) is controlled the voltage that is applied to pixel electrode.Thin film transistor (TFT) comprises the grid that electrically connects with gate line, the drain electrode that electrically connects with pixel electrode and the source electrode that electrically connects with data line.
But, in the production run of LCD, often being vulnerable to production process pollutes or electrostatic breakdown, make thin film transistor (TFT) short circuit or open circuit singularly, perhaps make short circuit between the pixel electrode of pixel and the public electrode owing to the influence of electrically conductive particles, then pixel can not normally show, thereby causes the point defect of pixel.Point defect can be divided into bright spot and dim spot, in order to ensure the display quality of liquid crystal panel, can carry out the point defect that liquid crystal panel is found in black full picture inspection and complete white picture inspection usually behind the production process of finishing array base palte and colored filter substrate.Bright spot is bright when complete black picture is checked, because human eye is very responsive and be easy to identification to bright spot, thus when only having the minority bright spot to take place, usually can adopt laser to repair, thus the dim spot that bright spot reparation is become to be difficult for being identified by the human eye.
At present, utilize laser that pixel has been repaired multiple implementation.
Fig. 1 shows the structural representation of single pixel in the prior art thin-film transistor array base-plate.As shown in Figure 1, gate line 11 and data line 12 vertically insulated cross arrangements on the underlay substrate (not shown), thereby define pixel region.Be formed with pixel electrode 16 in the pixel region, wherein pixel electrode 16 comprises an extension 161, projection on underlay substrate is partly overlapping in projection on the underlay substrate and last gate line 11 in this extension, and pixel electrode 16 and extension 161 and last gate line 11 are insulated from each other.Wherein, last gate line 11 refers to be located at the gate line of thin film transistor (TFT) offside in the pixel region.Near the infall of data line 12 and gate line 11, be formed with thin film transistor (TFT), this thin film transistor (TFT) comprises source electrode 121, drain electrode 15 and grid 111, wherein source electrode 121 is electrically connected to data line 12, drain electrode 15 is electrically connected to pixel electrode 16, grid 111 is electrically connected to gate line 11, and grid 111 is the part of gate line 11.Public electrode wire 13 is parallel with gate line 11.Form liquid crystal capacitance C between the public electrode (not shown) of pixel electrode 16 and colored filter substrate
LC
When pixel shown in Figure 1 fleck defect occurs and need repair, repair synoptic diagram such as Fig. 2.Pixel electrode 16 at the AB place by this pixel of laser cutting drains being connected between 15 with thin film transistor (TFT), simultaneously, at the extension 161 of pixel electrode 16 and the extension 161 and last gate line 11 of the C point place laser bonding pixel electrode 16 of the overlapping region of last gate line 11, make the two reach electric connection, thereby pixel electrode 16 electrically connects with last gate line 11, pixel electrode, promptly first end of liquid crystal capacitance obtains the voltage on the gate line.The public electrode of colored filter substrate, promptly second end of liquid crystal capacitance receives public voltage signal Vcom.There is voltage difference in the two ends of liquid crystal capacitance, thereby bright spot is repaired into dim spot.
Voltage on the gate line comprises the high voltage Vgh of gate line and the low-voltage Vgl of gate line.In a frame time, the duration of the high voltage Vgh of gate line is very of short duration with respect to the low-voltage Vgl of gate line, can ignore, and therefore, the voltage on the pixel electrode receiving grid polar curve is considered as the low-voltage Vgl of gate line.So the voltage at the liquid crystal capacitance two ends after the repairing equals the poor of voltage on the gate line and public voltage signal, i.e. Vpr=Vgl-Vcom.In actual applications, using the pressure reduction of dull gray rank L0 correspondence usually (is V as 6V
L0+=6V, V
L0-The LCD of=-6V), and get Vgh=20V, Vgl=-6V, therefore Vcom=4～5V can draw
|Vpr|＝|Vgl-Vcom|＝10～11V＞|V
L0-|。
As shown in Figure 3, liquid crystal molecule 301 is filled between colored filter substrate 302 and the thin-film transistor array base-plate 303, respectively at the attached one deck compensate film 304 of the outside surface of two substrates.Because the birefringent characteristic of liquid crystal molecule, the light by liquid crystal layer can present elliptically polarized light, also produces a phase differential simultaneously.Because the appearance of phase differential causes observing LCD with different visual angles and can produce different brightness and GTG.Therefore, in order to compensate this phase differential, must use a compensate film to improve the visual angle problem.Yet compensate film is normally at the pressure reduction V of dull gray rank L0 correspondence
L0The phase differential of liquid crystal designs in advance during for 6V.And after repairing, the voltage at liquid crystal capacitance two ends is greater than the pressure reduction V of dull gray rank L0 correspondence
L0, therefore, the phase differential of liquid crystal will be different from the pressure reduction V of dull gray rank L0 correspondence this moment
L0The phase differential of corresponding liquid crystal, this compensate film will not have the effect that improves the visual angle, after repairing is finished, watch from different visual angles having light leakage phenomena.Equal the pressure reduction V of dull gray rank L0 correspondence for the voltage that can make the liquid crystal capacitance two ends after the repairing
L0, because the voltage Vpr=Vgl-Vcom at the liquid crystal capacitance two ends after repairing, so can consider to change Vgl or Vcom.But, because change the TFT electric leakage that Vgl can cause other defect-free pixel, then when dark attitude because the electric leakage of TFT causes the dark value that can not reach actual, and then cause the contrast of LCD to reduce.The GTG of the whole front panel pixel of LCD all can change when changing Vcom, so also be worthless.Owing to be subjected to the restriction that low-voltage Vgl on the gate line and public voltage signal Vcom can't change, the voltage at the liquid crystal capacitance two ends after the repairing can't be conditioned the pressure reduction V that makes it to equal dull gray rank L0 correspondence
L0, therefore, can't solve the problem that when different visual angles are watched, has light leak for this kind method for repairing and mending.
Summary of the invention
In view of this, fundamental purpose of the present invention is to provide a kind of thin-film transistor array base-plate, and this thin-film transistor array base-plate watches Shi Buhui that light leak takes place after repairing from different visual angles.
Second fundamental purpose of the present invention is to provide a kind of method for repairing and mending of thin-film transistor array base-plate, and the thin-film transistor array base-plate after repairing light leak can not take place when different visual angles are watched.
For achieving the above object, technical scheme of the present invention specifically is achieved in that
First aspect according to above-mentioned purpose, the invention provides a kind of thin-film transistor array base-plate, comprise underlay substrate, be formed at many gate lines on the underlay substrate, public electrode wire, with gate line mutually insulated many data lines arranged in a crossed manner, be arranged at the pixel electrode in the pixel region that described data line and described gate line intersect to form mutually, near and the thin film transistor (TFT) of infall that is arranged on described data line and described gate line, in described pixel region, also be provided with first element and second element, first element comprises the gate insulator on direct covering underlay substrate surface, first source electrode and first that is formed at the semiconductor layer on the described gate insulator and is formed on the semiconductor layer drains, second element comprises the gate insulator on direct covering underlay substrate surface, second source electrode and second that is formed at the semiconductor layer on the described gate insulator and is formed on the semiconductor layer drains, first drain electrode of first element is connected with the second source electrode one of second element, projection and the described public electrode wire of first source electrode of first element on the underlay substrate plane overlapped, projection and the gate line of second drain electrode on the underlay substrate plane of second element overlapped, first drain electrode of first element that the projection of described pixel electrode on the underlay substrate plane is connected with one is overlapping with second source electrode portion of second element, wherein the raceway groove in the semiconductor layer of first source electrode and the first drain electrode qualification has first channel width-over-length ratio, raceway groove in the semiconductor layer that second source electrode and second drain electrode limit has second channel width-over-length ratio, described first channel width-over-length ratio is width and first source electrode of first element and the ratio at the interval between first drain electrode of one of first source/drain of first element, described second channel width-over-length ratio is width and second source electrode of second element and the ratio at the interval between second drain electrode of one of second source/drain of second element, by adjusting the resistance that first channel width-over-length ratio or second channel width-over-length ratio are regulated first element or second element in advance, to be connected with first source electrode of first element at public electrode wire, when second drain electrode of the first grid polar curve of first element and second element and second grid line are connected, adjustment is connected the voltage at liquid crystal capacitance two ends between first drain electrode of the public electrode wire and first element, so that this voltage equals the pressure reduction of dull gray rank correspondence.
According to second aspect of above-mentioned purpose, the invention provides a kind of method for repairing and mending of thin-film transistor array base-plate, described method for repairing and mending comprises: for the pixel that fleck defect takes place, cut off the pixel electrode of defect pixel and the electric connection of its thin film transistor (TFT); Electrically connect the one junction of pixel electrode and first drain electrode and second source electrode of described defect pixel; Electrically connect first source electrode and the public electrode wire of described defect pixel; Electrically connect second drain electrode and the gate line of described defect pixel.
As seen from the above technical solutions, a kind of thin-film transistor array base-plate provided by the invention, compared with prior art, first element and second element are set in pixel region, first element comprises the gate insulator on direct covering underlay substrate surface, first source electrode and first that is formed at the semiconductor layer on the described gate insulator and is formed on the semiconductor layer drains, second element comprises the gate insulator on direct covering underlay substrate surface, second source electrode and second that is formed at the semiconductor layer on the described gate insulator and is formed on the semiconductor layer drains, wherein the raceway groove in the semiconductor layer of first source electrode and the first drain electrode qualification has first channel width-over-length ratio, and the raceway groove in the semiconductor layer that second source electrode and second drain electrode limit has second channel width-over-length ratio.Thin-film transistor array base-plate with this pixel preparing structure, by adjusting first, second channel width-over-length ratio W/L of first, second element in advance, after the pixel fleck defect takes place, utilize the method for repairing and mending of thin-film transistor array base-plate provided by the invention: cut off the pixel electrode of defect pixel and the electric connection of its thin film transistor (TFT); Electrically connect the pixel electrode and first drain electrode and second source electrode of described defect pixel; Electrically connect first source electrode and the public electrode wire of described defect pixel; Electrically connect second drain electrode and the gate line of described defect pixel.Thereby public electrode and public electrode wire at colored filter substrate all receive under the situation of public voltage signal Vcom, can regulate the resistance R1 of first element and the resistance R2 of second element, and then the voltage that can adjust the liquid crystal capacitance two ends makes it to approach the pressure reduction V of dull gray rank L0 correspondence
L0, light leak can not take place therefore when different visual angles are watched.
Description of drawings
Fig. 1 is the structural representation of single pixel in the prior art thin-film transistor array base-plate.
Fig. 2 is that the pixel of Fig. 1 is repaired synoptic diagram.
Fig. 3 is the diagrammatic cross-section of prior art liquid crystal panel.
Fig. 4 is the structural representation of single pixel in the thin-film transistor array base-plate of the present invention.
Fig. 5 is the sectional view of the A-A ' intercepting along the line of the single pixel among Fig. 4, and it has disclosed the cross-section structure of thin film transistor (TFT).
Fig. 6 is the sectional view of the B-B ' intercepting along the line of the single pixel among Fig. 4, and it has disclosed the cross-section structure of first element and second element.
Fig. 7 is that the pixel of Fig. 4 is repaired synoptic diagram.
Fig. 8 is the equivalent circuit diagram of the corresponding liquid crystal panel of part in the frame of broken lines of Fig. 7 top.
Fig. 9 is the enlarged drawing of first element and second element among Fig. 4.
Embodiment
For make purpose of the present invention, technical scheme, and advantage clearer, below with reference to the accompanying drawing embodiment that develops simultaneously, the present invention is described in more detail.
The LCD of the embodiment of the invention comprises a liquid crystal panel, and liquid crystal panel comprises thin-film transistor array base-plate, colored filter substrate and is filled in liquid crystal layer between the two substrates.For illustrated clear description, colored filter substrate does not all draw in the accompanying drawing of the embodiment of the invention.Fig. 4 is the structural representation of single pixel in the thin-film transistor array base-plate of the present invention.Gate line 11 and data line 12 vertically insulated cross arrangements on underlay substrate (not shown among Fig. 4), thereby define pixel region, be formed with pixel electrode 16 in the pixel region.Near the infall of data line 12 and gate line 11, be formed with thin film transistor (TFT), this thin film transistor (TFT) comprises source electrode 121, drain electrode 15 and grid 111, wherein source electrode 121 is electrically connected to data line 12, drain electrode 15 is electrically connected to pixel electrode 16, grid 111 is electrically connected to gate line 11, and grid 111 is the part of gate line 11.Public electrode wire 13 is included in the part that is parallel to gate line 11 directions in the pixel region and is parallel to the extension 131 of data line 12 directions.At the offside of thin film transistor (TFT), this pixel also comprises first element 1 and second element 2.As shown in Figure 4, first element 1 comprises first source electrode 401, first drain electrode 402 and the semiconductor layer 405, second element 2 comprises that first drain electrode 402 of second source electrode 403, second drain electrode 404 and semiconductor layer 405, the first elements 1 is connected with second source electrode, 403 one of second element 2.Projection and public electrode wire 13 extension 131 that pixel region in be parallel to data line direction of first source electrode 401 of first element 1 on the underlay substrate plane is partly overlapping, projection and the last gate line 11 of second drain electrode 404 on the underlay substrate plane of second element 2 is partly overlapping, second source electrode 403 of first drain electrode, 402 and second element 2 of first element 1 that the projection of pixel electrode 16 on the underlay substrate plane is connected with one is partly overlapping, and each lap is shown in the shade among Fig. 4.
Fig. 5 is the sectional view of single pixel A-A ' intercepting along the line as shown in Figure 4, and it has disclosed the cross-section structure of thin film transistor (TFT).In Fig. 5, underlay substrate 10 is positioned at orlop, the grid 111 of thin film transistor (TFT) and public electrode wire 13 are positioned on the underlay substrate 10, and, grid 111 and public electrode wire 13 are formed at same one deck of underlay substrate 10 respectively, it is the first metal layer, gate insulator 14 is covered on grid 111 and the public electrode wire 13, with be the semiconductor layer 17 of thin film transistor (TFT) on the grid 111 corresponding gate insulators 14 of thin film transistor (TFT), it on the semiconductor layer 17 of thin film transistor (TFT) the source electrode 121 of thin film transistor (TFT), drain electrode 15, passivation layer 18 is positioned at source electrode 121, on drain electrode 15 and the gate insulator 14, and this passivation layer 18 has a through hole 19, pixel electrode 16 is positioned on this passivation layer 18, and by through hole 19 pixel electrode 16 and drain electrode 15 is electrical connected.
Fig. 6 is the sectional view of single pixel B-B ' intercepting along the line as shown in Figure 4, and it has disclosed the cross-section structure of first element and second element.In Fig. 6, underlay substrate 10 is positioned at orlop, the extension 131 of public electrode wire 13, be used for determining the laser bonding position, thereby increase the metal dots 406 of the welding effect of laser, gate line 11 is positioned on the underlay substrate 10, and, the extension 131 of public electrode wire, metal dots 406 and gate line 11 are formed at same one deck of underlay substrate 10 respectively, it is the first metal layer, gate insulator 14 is covered in the extension 131 of public electrode wire 13, on gate line 11 and the metal dots 406, be the semiconductor layer 405 of first element 1 and second element 2 on the gate insulator 14 that directly is covered in underlay substrate 10, promptly the gate insulator 14 under the semiconductor layer 405 of first element 1 and second element 2 is not cover the first metal layer.Respectively second source electrode 403 and second drain electrode 404 of first source electrode 401 and first drain electrode, 402, second element 2 of first element 1 on the semiconductor layer 405 of first element 1 and second element 2, wherein, first of first element 1 drain electrode 402 is connected with second source electrode, 403 one of second element 2.Passivation layer 18 is covered in second source electrode 403 of first source electrode 401 of semiconductor layer 405, first element 1 and first drain electrode, 402, second element 2 and second drain electrode 404, on the gate insulator 14, pixel electrode 16 is positioned on this passivation layer 18.Wherein, the gate insulator 14 of second source electrode, 403 belows of first drain electrode, 402 and second element 2 of first element 1 that one connects covers metal dots 406, and as can be seen from Figure 4, second source electrode 403 of first drain electrode, 402 and second element 2 of first element 1 that the projection of pixel electrode 16 on underlay substrate 10 planes is connected with one is partly overlapping, so metal dots 406 and pixel electrode 16 are partly overlapping.
Below in conjunction with Fig. 4, Fig. 5, Fig. 6, the method flow of making the thin-film transistor array base-plate with pixel preparing structure is described.
Step 1, on the underlay substrate 10 that is provided, deposit the first metal layer, and to its composition with the grid 111, public electrode wire 13 and the extension 131 thereof that form gate line 11, thin film transistor (TFT), be used for determining the laser bonding position, thereby strengthen the metal dots 406 of laser bonding effect, wherein, metal dots 406 is in the opposite end of thin film transistor (TFT).The material of the first metal layer is one of aluminium, chromium, tungsten, tantalum, titanium, molybdenum and aluminium nickel etc. or alloy combination, and its structure can be individual layer or composite bed.
Step 2, deposit forms gate insulator 14 on the first metal layer.Wherein, gate insulator 14 covers the first metal layer and underlay substrate.Its material can be the good materials of insulativity such as amorphous silicon nitride, amorphous silica, compound crystal silicon nitride, compound crystal monox.
Step 3, deposition forms the semiconductor layer 17 of thin film transistor (TFT) on the gate insulator 14 of cover film transistor gate 111, the semiconductor layer 405 of semiconductor layer 405, the first elements 1 of deposition formation first element 1 and second element 2 and second element 2 is in the opposite end of the semiconductor layer 17 of thin film transistor (TFT) on the gate insulator 14 that directly covers underlay substrate 10.Wherein, the formation method of the semiconductor layer 405 of first element 1 and second element 2 and the semiconductor layer 17 of thin film transistor (TFT) can comprise formation one active layer (a-Si:H earlier, hydrogenated amorphous silicon layer), carry out ion doping then, form an ohmic contact layer (N+a-Si:H, heavy doping hydrogenated amorphous silicon layer) thereon.
Step 4, at gate insulator 14 and semiconductor layer 17, deposition second metal level on 405, and to of source electrode 121 and the drain electrode 15 of its composition to form thin film transistor (TFT), data line 12, the source electrode of first element and second element and drain electrode 401～404, wherein form first source electrode 401 and first drain electrode 402 of first element 1 on the semiconductor layer 405 of first element, form second source electrode 403 and second drain electrode 404 of second element on the semiconductor layer 405 of second element 2, on the semiconductor layer 17 of thin film transistor (TFT), form the source electrode 121 and the drain electrode 15 of thin film transistor (TFT), first drain electrode 402 of first element 1 is connected with second source electrode, 403 one of second element 2, and, second source electrode 403 of first drain electrode, 402 and second element 2 of first element 1 that one connects is formed on the gate insulator 14 of metal dots 406 tops, projection and public electrode wire 13 extension 131 that pixel region in be parallel to data line direction of first source electrode 401 of first element 1 on underlay substrate 10 planes is partly overlapping, and projection and the last gate line 11 of second drain electrode 404 on underlay substrate 10 planes of second element 2 is partly overlapping.The material of second metal level is one of aluminium, chromium, tungsten, tantalum, titanium, molybdenum and aluminium nickel etc. or alloy combination, and its structure can be individual layer or composite bed.
Step 5 forms passivation layer 18, and it is carried out etching formation through hole 19.Wherein, passivation layer 18 covers second metal level, and its material can be the good materials of insulativity such as amorphous silicon nitride, amorphous silica, compound crystal silicon nitride, compound crystal monox.
Step 6, on passivation layer 18, deposit tin indium oxide (ITO), it is carried out composition form pixel electrode 16, wherein, pixel electrode 16 is electrical connected by the drain electrode 15 of through hole 19 with thin film transistor (TFT), and second source electrode 403 of first drain electrode, 402 and second element 2 of first element 1 that the projection of pixel electrode 16 on underlay substrate 10 planes is connected with one is partly overlapping.
When certain pixel fleck defect occurs and need repair, repair synoptic diagram as shown in Figure 7.At the EF place, being connected between the pixel electrode 16 by this pixel of laser cutting and the thin film transistor (TFT) drain electrode 15; At the X point, by metal dots 406 (as shown in Figure 6), laser bonding pixel electrode 16 and second metal level are the lap of second source electrode 403 of first drain electrode, 402 and second element 2 of first element 1 that is connected of one; At the Y point, first source electrode 401 of laser bonding first element 1 and the lap of the extension 131 of public electrode wire, at the Z point, second drain electrode 404 of laser bonding second element 2 and the lap of last gate line 11.
In embodiments of the present invention, when LCD was worked, public electrode on the colored filter substrate and public electrode wire all received public voltage signal V
ComThrough after the above-mentioned repairing, because extension 131 electric connections of first source electrode 401 of first element 1 and public electrode wire 13, so the public voltage signal V that first element 1 obtains on the public electrode wire 13
Com, same owing to second drain electrode 404 of second element 2 and the electric connection of last gate line 11, so the voltage V that second element 2 obtains on the gate lines
GL, and second source electrode 403 of first drain electrode, 402 and second element 2 of first element 1 of pixel electrode 16 electric connection one.Simultaneously, during LCD work, (not shown) backlight in it opens, behind the backlight illumination liquid crystal panel, the semiconductor layer 405 of first element 1 and second element 2 produces photocurrent, thus first source electrode 401 of first element 1 and first drain electrode, 402 conductings, second source electrode 403 of second element 2 and second drain electrode, 404 conductings, therefore, after the repairing, the equivalent circuit diagram of part as shown in Figure 8 in the frame of broken lines of Fig. 7 top.In Fig. 8, X, Y, Z correspond to the repairing point among Fig. 7 respectively, and R1, R2 are respectively the resistance of first element, second element.
Because V
X=V
Y-| V
Y-V
Z|/(R1+R2) * R1, wherein V
X, V
Y, V
ZBe respectively X, Y, the corresponding voltage of Z repairing point;
The voltage V that pixel electrode after the known again repairing (being first end of liquid crystal capacitance) receives
R=V
X, V
Y=V
Com, V
Z=V
GL,
[0041]So draw V
R=V
Com-| V
Com-V
GL|/(R1+R2) * R1.
[0042]Second end of liquid crystal capacitance is that the voltage that the public electrode on the colored filter substrate receives also is public voltage signal V
ComSo, liquid crystal capacitance C after repairing
LCThe voltage at two ends is:
The resistance R2 of the resistance R1 of first element 1 and second element 2 is respectively the resistance of the semiconductor layer 405 of first element 1 and second element 2, semiconductor layer 405 comprises active layer and ohmic contact layer, because minimum can the ignoring of ohmic contact layer resistance in the semiconductor layer 405, thus the resistance R2 of the resistance R1 of first element 1 and second element 2 respectively equivalence be the resistance of the active layer of first element and second element.
According to resistance formula R=ρ L/S, can get:
The resistance R1=ρ L1/S1=ρ L1/ of first element (W1 * T1),
The resistance R2=ρ L2/S2=ρ L2/ of second element (W2 * T2),
Wherein ρ is the active layer resistance coefficient, because first element 1 and second element 2 are to form in the lump in the process of making thin film transistor (TFT), therefore, the active layer resistance coefficient of first element 1 equates with the active layer resistance coefficient of second element 2; L1, L2 are respectively the channel length of the active layer of first element 1 and second element 2; W1, W2 are respectively the channel width of the active layer of first element 1 and second element 2, and L1, W1, L2, W2 can determine when the etching composition forms first element 1 and second element 2; T1, T2 are respectively the channel thickness of the active layer of first element 1 and second element 2, and T1, T2 can determine when the deposition active layer.
L1, W1, L2, W2 specifically as shown in Figure 9, Fig. 9 is the enlarged drawing of first element 1 and second element 2 among Fig. 4.As shown in Figure 9, the channel length L1 of the active layer of first element 1 equals the channel length in first source electrode 401 of first element 1 and the semiconductor layers 405 that first drain electrode 402 limits, be first source electrode 401 of first element 1 and the interval between first drain electrode 402, the channel length L2 of the active layer of second element 2 equals the channel length in second source electrode 403 of second element 2 and the semiconductor layers 405 that second drain electrode 404 limits, be second source electrode 403 of second element 2 and the interval between second drain electrode 404, the channel width W1 of the active layer of first element 1 equals the channel width of first source electrode 401 and the semiconductor layer 405 that first drain electrode 402 limits of first element 1, be the width of one of first source electrode 401/ drain electrode 402 of first element 1, the channel width W2 of the active layer of second element 2 equals the channel width of second source electrode 403 and the semiconductor layers 405 that second drain electrode 404 limits of second element 2, is the width of one of second source electrode, 403/ drain electrode 404 of second element 2.
Because first element and the active layer of second element and the active layer of thin film transistor (TFT) deposit simultaneously, so in general, for the channel thickness of the active layer of first element and second element deposition malleable not, otherwise can influence the characteristic of thin film transistor (TFT) simultaneously.So the resistance R1 of first element is relevant with the first channel width-over-length ratio W1/L1 of the active layer of first element, the resistance R2 of second element is relevant with the second channel width-over-length ratio W2/L2 of the active layer of second element, resistance R and channel width-over-length ratio W/L are inversely proportional to, resistance R reduces along with the increase of channel width-over-length ratio W/L, and resistance R increases along with reducing of channel width-over-length ratio W/L.
In embodiments of the present invention, in order to prevent that from there is the problem of light leak in LCD when different visual angles are watched, the channel width-over-length ratio W/L of active layer that can be by adjusting first element or second element in advance, regulate resistance R1, the R2 of first element or second element, and then can adjust the voltage at liquid crystal capacitance two ends
Thereby reach the voltage that makes the liquid crystal capacitance two ends
Can equal the pressure reduction V of dull gray rank L0 correspondence
L0But,, often be difficult to regulate the voltage at liquid crystal capacitance two ends because may there be error in actual processing procedure
Make it to equal just the pressure reduction V of dull gray rank L0 correspondence
L0Yet,, as long as the voltage at liquid crystal capacitance two ends
With the corresponding pressure reduction V of dull gray rank L0
L0Absolute value in the scope of＜=3V, light leakage phenomena is very little when different visual angles are watched, so be acceptable substantially.
It is worthy of note that though in the above embodiments, liquid crystal panel it is evident that the purpose that reaches this equivalent circuit just is to make the voltage at liquid crystal capacitance two ends through equivalent electrical circuit after repairing as shown in Figure 8
Approach the pressure reduction V of dull gray rank L0 correspondence
L0As long as therefore can make the array base palte after repairing, the voltage at liquid crystal capacitance two ends
Approach the pressure reduction V of dull gray rank L0 correspondence
L0Array base palte and method for repairing and mending thereof, all within protection scope of the present invention.
Claims (5)
1. thin-film transistor array base-plate, comprise underlay substrate, be formed at many gate lines on the underlay substrate, public electrode wire, with gate line mutually insulated many data lines arranged in a crossed manner, be arranged at the pixel electrode in the pixel region that described data line and described gate line intersect to form mutually, near and the thin film transistor (TFT) of infall that is arranged on described data line and described gate line
It is characterized in that, in described pixel region, also be provided with first element and second element, described first element comprises the gate insulator on direct covering underlay substrate surface, first source electrode and first that is formed at the semiconductor layer on the described gate insulator and is formed on the semiconductor layer drains, second element comprises the gate insulator on direct covering underlay substrate surface, second source electrode and second that is formed at the semiconductor layer on the described gate insulator and is formed on the semiconductor layer drains, first drain electrode of first element is connected with the second source electrode one of second element, projection and the described public electrode wire of first source electrode of first element on the underlay substrate plane overlapped, projection and the gate line of second drain electrode on the underlay substrate plane of second element overlapped, first drain electrode of first element that the projection of described pixel electrode on the underlay substrate plane is connected with one is overlapping with second source electrode portion of second element, wherein the raceway groove in the semiconductor layer of first source electrode and the first drain electrode qualification has first channel width-over-length ratio, raceway groove in the semiconductor layer that second source electrode and second drain electrode limit has second channel width-over-length ratio, described first channel width-over-length ratio is width and first source electrode of first element and the ratio at the interval between first drain electrode of one of first source/drain of first element, described second channel width-over-length ratio is width and second source electrode of second element and the ratio at the interval between second drain electrode of one of second source/drain of second element, by adjusting the resistance that first channel width-over-length ratio or second channel width-over-length ratio are regulated first element or second element in advance, to be connected with first source electrode of first element at public electrode wire, when second drain electrode of the first grid polar curve of first element and second element and second grid line are connected, adjustment is connected the voltage at liquid crystal capacitance two ends between first drain electrode of the public electrode wire and first element, so that this voltage equals the pressure reduction of dull gray rank correspondence.
2. thin-film transistor array base-plate as claimed in claim 1 is characterized in that, first element and second element are arranged on the offside of thin film transistor (TFT) in the pixel region.
3. thin-film transistor array base-plate as claimed in claim 1 is characterized in that, first drain electrode of first element covers a metal dots with the gate insulator of the below, one junction of second source electrode of second element.
4. the method for repairing and mending of a thin-film transistor array base-plate as claimed in claim 1 comprises:
Cut off the pixel electrode of defect pixel and the electric connection of its thin film transistor (TFT);
Electrically connect the one junction of pixel electrode and first drain electrode and second source electrode of described defect pixel;
Electrically connect first source electrode and the public electrode wire of described defect pixel;
Electrically connect second drain electrode and the gate line of described defect pixel.
5. method for repairing and mending as claimed in claim 4, it is characterized in that the metal dots that the gate insulator by first drain electrode and below, the one junction of second source electrode covers electrically connects the one junction of the pixel electrode of described defect pixel and first drain electrode and second source electrode.
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| CN103163701B (en) * | 2011-12-16 | 2015-09-30 | 上海中航光电子有限公司 | Netted public electrode structural liquid crystal display part and manufacture method thereof |
| CN103531096B (en) * | 2013-10-17 | 2016-07-06 | 京东方科技集团股份有限公司 | Display base plate and preparation method thereof, display floater and display device |
| CN104252076B (en) * | 2014-09-24 | 2017-02-15 | 深圳市华星光电技术有限公司 | Array substrate and liquid crystal display panel |
| CN104570523B (en) * | 2015-01-16 | 2018-11-13 | 昆山龙腾光电有限公司 | A kind of array substrate, the forming method of array substrate and liquid crystal display device |
| CN104793366B (en) * | 2015-04-23 | 2018-01-16 | 深圳市华星光电技术有限公司 | Liquid crystal panel and its bright spot restorative procedure after bright spot is repaired |
| TWI564645B (en) * | 2015-10-08 | 2017-01-01 | 友達光電股份有限公司 | Pixel array and repair method of pixel unit |
| CN112213894B (en) * | 2019-07-12 | 2023-08-22 | 夏普株式会社 | Manufacturing method of array substrate for display panel |
| CN110716358B (en) * | 2019-10-09 | 2022-09-06 | 上海天马微电子有限公司 | Display panel, manufacturing method and repairing method thereof and display device |
| CN110993617A (en) * | 2019-12-03 | 2020-04-10 | 武汉华星光电技术有限公司 | Array substrate, display panel and display device |
| CN112349205B (en) * | 2020-10-26 | 2022-09-27 | 京东方科技集团股份有限公司 | Array substrate, maintenance method thereof and display panel |
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