CN101419938B - Manufacturing method for integrated schottky diode - Google Patents
Manufacturing method for integrated schottky diode Download PDFInfo
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- CN101419938B CN101419938B CN2007100941838A CN200710094183A CN101419938B CN 101419938 B CN101419938 B CN 101419938B CN 2007100941838 A CN2007100941838 A CN 2007100941838A CN 200710094183 A CN200710094183 A CN 200710094183A CN 101419938 B CN101419938 B CN 101419938B
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Abstract
The invention discloses a manufacturing method of an integrated Schottky diode. A lightly doped drain side wall is formed and subject to low-pressure chemical vapor deposition, dry etching of the oxide film dry etching is performed after photoetching and implantation of N type source/drain and P type source/drain; and a thin thermal oxide layer is grown at the later stage of propelling source/drain nitrogen. The method helps greatly improve the uniformity of breakdown voltage of the Schottky diode without changing the existing process sequence and adding a heating process.
Description
Technical field
The invention belongs to field of semiconductor manufacture, relate to process for fabrication of semiconductor device, particularly a kind of manufacturing method for integrated schottky diode.
Background technology
Schottky diode is because of usually being integrated in the integrated process of IC low, the big electric current of its on-state voltage drop, low-power consumption and extremely short reverse recovery time.Such as utilizing the low characteristics of its on-state voltage drop, the clamp bipolar transistor enters dark saturation region with the frequency response that improves circuit or utilize low, the big electric current of its on-state voltage drop, low in power consumption to be used to export rectification to improve the driving force of circuit to prevent it.But integrated Schottky diode is owing to complex process, and affected factor is more, accomplish electrical quantity very even very difficulty in the silicon chip face.
Present Schottky diode is made flow process as shown in Figure 1, comprises following processing step:
(1) after lightly doped drain side wall (LDD) formed, (SD) preflood 250 dusts (screenoxide APM) were leaked in the source;
(2) (NSD) photoetching, injection are leaked in N type source;
(3) (PSD) photoetching, injection are leaked in P type source;
(4) propelling of (SD) nitrogen is leaked in the source;
(5) 500A low-pressure chemical vapor deposition oxide-film (LPTEOS), silicide barrier layer (SB) photoetching, etching, the titanium sputter, silicide (silicide) forms;
(6) normal pressure chemical gas phase (APM) deposition oxidation film, boron-phosphorosilicate glass (BPSG) deposit, cmp (CMP), plasma chemical vapor deposition oxide-film (PETEOS), contact hole photoetching, etching.
Adopt Schottky diode that this method makes as shown in Figure 2; the oxide layer of Schottky diode guard ring top is aumospheric pressure cvd oxide-film (screen oxide APM); because aumospheric pressure cvd oxide-film (screen oxide APM) silicon chip inner evenness is poor; the guard ring of the integrated schottky pipe that forms in the time of can causing P type source to leak injection is inhomogeneous; the aumospheric pressure cvd oxide-film of suicide surfaces (screen oxide APM) is membranous poor in addition, also can cause integrated schottky pipe breakdown potential to force down.
Summary of the invention
The technical problem to be solved in the present invention provides a kind of manufacturing method for integrated schottky diode, is not changing existing integrated artistic order, does not increase the uniformity that significantly improves the puncture voltage of Schottky diode under the prerequisite of thermal process.
For solving the problems of the technologies described above, the technical scheme that manufacturing method for integrated schottky diode of the present invention adopts may further comprise the steps:
(1) after low-doped leakage side wall forms, in silicon chip surface low-pressure chemical vapor phase deposition oxide-film;
(2) N type source light leak is carved, is injected;
(3) to the low-pressure chemical vapor phase deposition oxide-film dry etching on N type source-drain area surface;
(4) P type source light leak is carved, is injected;
(5) to the low-pressure chemical vapor phase deposition oxide-film dry etching on P type source-drain area surface;
(6) progradation is leaked in the source, adopts first nitrogen, back oxygen growth one thin thermal oxide layer at the source drain surface;
(7) at silicon chip surface low-pressure chemical vapor phase deposition oxide-film, carry out silicide barrier layer photoetching, etching at source and drain areas, the titanium sputter, metal silicide forms;
(8), carry out the low-pressure chemical vapor phase deposition oxide-film, boron-phosphorosilicate glass deposit, cmp, plasma enhanced CVD, contact hole photoetching, etching at silicon chip surface.
Source leakage nitrogen advances the thermal oxide layer of late growing stage can be 100~200 dusts in the step (6).
Manufacturing method for integrated schottky diode of the present invention, after carving, inject, leakage of N type source and P type source light leak carry out low-pressure chemical vapor phase deposition oxide-film dry etching, leak nitrogen in the source and advance late growing stage one thin thermal oxide layer, easier reparation boundary layer helps the uniformity of integrated schottky pipe puncture voltage.In addition; the oxide layer of Schottky diode guard ring top is low-pressure chemical vapor phase deposition oxide-film (LPTEOS); low-pressure chemical vapor phase deposition oxide-film (LPTEOS) silicon chip inner evenness is good; the guard ring of the integrated schottky pipe that forms when injection is leaked in P type source is even; the low-pressure chemical vapor deposition oxide-film (LPTEOS) of suicide surfaces in addition) membranous good, can make the integrated schottky pipe that high breakdown voltage is arranged.
Description of drawings
Below in conjunction with the drawings and the specific embodiments the present invention is described in further detail.
Fig. 1 is present Schottky diode manufacture craft schematic flow sheet;
Fig. 2 is the Schottky diode schematic diagram that existing method is made;
Fig. 3 is a Schottky diode manufacture craft schematic flow sheet of the present invention;
Fig. 4 is the Schottky diode schematic diagram that method of the present invention is made;
Fig. 5 is after the LDD side wall forms, the preflood LPTEOS schematic diagram of SD;
Fig. 6 carries out oxide-film dry etching schematic diagram after being NSD photoetching, injection;
Fig. 7 carries out oxide-film dry etching schematic diagram after being PSD photoetching, injection;
Fig. 8 is that SD nitrogen advances, the thin thermal oxide layer schematic diagram of growth;
Fig. 9 is the LPTEOS deposit, SB photoetching, etching, and the Ti sputter, silicide forms schematic diagram;
Figure 10 is the LPTEOS deposit, BPSG deposit, CMP, PETEOS deposit, contact hole photoetching, etching schematic diagram.
Embodiment
One execution mode of manufacturing method for integrated schottky diode of the present invention may further comprise the steps as shown in Figure 3:
(1) after low-doped leakage side wall (LDD) forms, low-pressure chemical vapor phase deposition oxide-film (LPTEOS);
(2) (NSD) photoetching, injection are leaked in N type source;
(3) LPTEOS dry etching;
(4) (PSD) photoetching, injection are leaked in P type source;
(5) LPTEOS dry etching;
(6) propelling of (SD) nitrogen is leaked in the source; Growth 100~200 dust thermal oxide layers;
(7) 500 dust LPTEOS deposits, silicide layer (SB) photoetching, etching, the titanium sputter, silicide (silicide) forms;
(8) LPTEOS deposit, boron-phosphorosilicate glass deposit (BPSG), cmp (CMP), plasma enhanced chemical vapor deposition oxide-film (PETEOS) deposit, contact hole (CT) photoetching, etching.
The execution mode of above-mentioned manufacturing method for integrated schottky diode, the difference of making flow process with present Schottky diode is: after the LDD side wall formed, the preflood 250 dust aumospheric pressure cvd oxide-films of SD (screen oxide APM) made LPTEOS into; NSD injects the back increases oxide-film (screen oxide) dry etching; PSD injects the back increases oxide-film (screen oxide) dry etching; SD nitrogen advances late growing stage 100~200A thermal oxide layer; In 500A LPTEOS deposit, SB photoetching, etching, the Ti sputter, after silicide forms, the BPSG deposit, CMP, the PETEOS deposit, the APM deposit of carrying out before CT photoetching, the etching makes the LPTEOS deposit into.
Low-pressure chemical vapor deposition oxide-film (LPTEOS) is good and membranous good at the silicon chip inner evenness; The easier reparation boundary layer of growth small amounts film when n 2 annealing is leaked in the source helps the uniformity of integrated schottky pipe puncture voltage.
Adopt integrated schottky diode that this method makes as shown in Figure 4, the thin thermal oxide layer of one 100~200 dusts that nitrogen advances late growing stage is leaked because consume small part silicon in the source, repairs interfacial state easily, helps the uniformity of integrated schottky pipe puncture voltage.The oxide layer of Schottky diode guard ring top is low-pressure chemical vapor deposition oxide-film (LPTEOS); low-pressure chemical vapor deposition oxide-film (LPTEOS) silicon chip inner evenness is good; the guard ring of the integrated schottky pipe that forms when injection is leaked in P type source is even; the low-pressure chemical vapor deposition oxide-film (LPTEOS) of suicide surfaces is membranous good in addition, can make the integrated schottky pipe that high breakdown voltage is arranged.
After Figure 5 shows that the LDD side wall forms, the preflood LPTEOS schematic diagram of SD, the oxide-film of silicon face are low-pressure chemical vapor deposition oxide-film (LPTEOS).
Shown in Figure 6 be the NSD photoetching, inject after, carry out oxide-film (screen oxide) dry etching schematic diagram, remove the surperficial oxide-film in N district by dry etching;
Shown in Figure 7 be the PSD photoetching, inject after, carry out oxide-film (screen oxide) dry etching schematic diagram, remove the surperficial oxide-film in P district by dry etching;
Shown in Figure 8 is that SD nitrogen advances, and growth 100~200 dust thermal oxide layer schematic diagrames are when n 2 annealing is leaked in the source, source drain surface heat growth small amounts film after etching, thickness is about 100~200 dusts, with easy reparation boundary layer, helps the uniformity of integrated schottky pipe puncture voltage;
Shown in Figure 9 is 500 dust LPTEOS deposits, SB photoetching, etching, and the titanium sputter, silicide (silicide) forms schematic diagram;
Shown in Figure 10 is the LPTEOS deposit, BPSG deposit, CMP, PETEOS deposit, CT photoetching, etching schematic diagram.
The method of this patent is in making the Schottky diode technical process, after carving, inject, leakage of N type source and P type source light leak carry out chemical vapor deposition oxide-film dry etching, leak nitrogen in the source and advance late growing stage one thin thermal oxide layer, thereby easier reparation boundary layer has improved the uniformity of integrated schottky pipe puncture voltage; After low-doped leakage side wall (LDD) forms, with low-pressure chemical vapor phase deposition oxide-film (LPTEOS).By revising the individual steps of existing technology, change oxide layer membranous of integrated schottky diode guard ring top, reach and improve the inhomogeneity purpose of puncture voltage, be fit to volume production.Above device architecture figure only is signal, and concrete structure can be made suitable modification according to purposes, requires to increase or remove the high pressure P trap (HVPW) of guard ring and directly use N epitaxial loayer (N-EPI) to form Schottky such as the height according to puncture voltage.
Claims (2)
1. a manufacturing method for integrated schottky diode is characterized in that, may further comprise the steps:
(1) after low-doped leakage side wall forms, in silicon chip surface low-pressure chemical vapor phase deposition oxide-film;
(2) N type source light leak is carved, is injected;
(3) to the low-pressure chemical vapor phase deposition oxide-film dry etching on N type source-drain area surface;
(4) P type source light leak is carved, is injected;
(5) to the low-pressure chemical vapor phase deposition oxide-film dry etching on P type source-drain area surface;
(6) progradation is leaked in the source, adopts first nitrogen, back oxygen growth one thin thermal oxide layer at the source drain surface;
(7) at silicon chip surface low-pressure chemical vapor phase deposition oxide-film, carry out silicide barrier layer photoetching, etching at source and drain areas, the titanium sputter, metal silicide forms;
(8), carry out the low-pressure chemical vapor phase deposition oxide-film, boron-phosphorosilicate glass deposit, cmp, plasma enhanced CVD, contact hole photoetching, etching at silicon chip surface.
2. manufacturing method for integrated schottky diode according to claim 1 is characterized in that, the thermal oxide layer that nitrogen propelling late growing stage is leaked in step (6) source is 100~200 dusts.
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US8368167B1 (en) * | 2011-09-30 | 2013-02-05 | Chengdu Monolithic Power Systems, Inc. | Schottky diode with extended forward current capability |
CN105789333A (en) * | 2014-12-25 | 2016-07-20 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor device, fabrication method thereof and electronic device |
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CN1664998A (en) * | 2004-03-03 | 2005-09-07 | 吴协霖 | Structure of Schottky diode and method for manufacturing same |
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CN1664998A (en) * | 2004-03-03 | 2005-09-07 | 吴协霖 | Structure of Schottky diode and method for manufacturing same |
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