CN101419345B - Display driver and built-in test circuit thereof - Google Patents
Display driver and built-in test circuit thereof Download PDFInfo
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- CN101419345B CN101419345B CN2007101670068A CN200710167006A CN101419345B CN 101419345 B CN101419345 B CN 101419345B CN 2007101670068 A CN2007101670068 A CN 2007101670068A CN 200710167006 A CN200710167006 A CN 200710167006A CN 101419345 B CN101419345 B CN 101419345B
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Abstract
The invention discloses a display driver and a built-in test circuit thereof. The test circuit comprises a test control unit and a switch unit. The test control unit determines a test mode by a control signal, wherein, the test mode comprises a first mode and a second mode. The switch unit is coupled to a first display panel and receives a first grey scale voltage and a second grey scale voltage, wherein, the display panel comprises a first data line and a second data line. Therefore, the switch unit transmits the first grey scale voltage to the first data line and transmits the second grey scale voltage to the second data line in the first mode, and the switch unit transmits the first grey scale voltage to the second data line and transmits the second grey scale voltage to the first data line in the second mode.
Description
Technical field
The present invention relates to the test circuit of a kind of display driver and The built-in, and particularly relate to a kind of display driver of the assembling quality that detects display and the test circuit of The built-in.
Background technology
In recent years, (Liquid Crystal Display LCD) is accepted and use, and has been replaced conventional cathode ray tube display (CRT) LCD at large.Flourish along with semiconductor technology, make LCD have advantages such as low power consumption power, slimming, high resolving power, high color saturation and long service life, thereby be widely used in the electronic product closely bound up such as the LCD screen of mobile phone, notebook computer, desktop PC and LCD TV (LCD TV) with life.Wherein, the good and the bad of display panel is the important key of decision LCD quality.
So in order to ensure the quality of LCD, the assembling quality of testing product is a necessary ring in the process of producing.Traditional LCD MODULE detection method is to use time schedule controller to produce test sample book, and exports this test sample book to display panel, and display panel is then according to the original display frame of test specimens.Therefore, its defective place can be found out, and then the quality of assembling quality in the production run of LCD can be judged by the picture that display panel presented.
Using traditional LCD MODULE detection method to detect in the process of assembling quality, its testing needle that normally utilizes measurement jig and the test point that provides at the X of display circuit board (X-board) are in contact with one another with the input of carrying out data and output and detect quality.Because the time schedule controller of tester table can export this test sample book to X-board by the testing needle on the measurement jig, so directly and after the X-board electric connection can test at measurement jig.Yet measurement jig is rather expensive, makes manufacturer must increase many costs when the assembling quality of testing liquid crystal display.Therefore, need to simplify the assembling attribute test, not only may promote test speed, and allow production cost reduce widely.
Summary of the invention
The invention provides a kind of test circuit, can in test process, reach test purpose by the testing needle with minority, therefore can fill part simplification test process and promote test speed.
The present invention provides a kind of display driver in addition, and it uses the testing needle of minority can produce test sample book, and need not use time schedule controller to produce test sample book, the problem that therefore can effectively solve prior art and faced.
The present invention proposes a kind of test circuit, is used to test a display panel, and it comprises unit of testing and controlling and switch element.Unit of testing and controlling decides test pattern according to a control signal, and wherein, test pattern comprises first pattern and second pattern.Switch element is controlled by unit of testing and controlling, and it couples a display panel, and receives first gray scale voltage and second gray scale voltage, and wherein, display panel comprises first data line and second data line.Hereat, switch element is when first pattern, and it can send first gray scale voltage to first data line, and sends second gray scale voltage to second data line.And switch element is when second pattern, and it can send first gray scale voltage to second data line, and sends second gray scale voltage to first data line.
From another viewpoint, the present invention proposes a kind of display driver, is electrically connected to a display panel by many leads, and it comprises a test circuit.Wherein, test circuit comprises unit of testing and controlling and switch element.Unit of testing and controlling decides test pattern according to a control signal, and wherein test pattern comprises first pattern and second pattern.Switch element is controlled by unit of testing and controlling, and it couples a display panel, and receives first gray scale voltage and second gray scale voltage, and wherein, display panel comprises first data line and second data line.Hereat, switch element is when first pattern, and it can send first gray scale voltage to first data line, and sends second gray scale voltage to second data line.And switch element is when second pattern, and it can send first gray scale voltage to second data line, and sends second gray scale voltage to first data line.
The present invention is the mode that adopts a built-in test circuit in driver, allow driver can produce test sample book, so need not use time schedule controller can reach test purpose, therefore except simplifying test process and promote the test speed, can also effectively solve prior art the problem that is faced.
For above-mentioned feature and advantage of the present invention can be become apparent, preferred embodiment cited below particularly, and conjunction with figs. are described in detail below.
Description of drawings
The test circuit that Fig. 1 shows one embodiment of the invention couples the Organization Chart of a display panel.
Figure 1A shows according to the gray scale voltage of embodiment of the invention display panel under the situation of polar switching and the performance diagram of GTG.
The test circuit that Fig. 2 shows another embodiment of the present invention couples the Organization Chart of a display panel.
Fig. 3 shows a kind of embodiment of Fig. 2 counter under four kinds of test patterns.
Fig. 4 shows a kind of embodiment of Fig. 2 logical block under four kinds of test patterns.
Fig. 5 shows a kind of embodiment of Fig. 2 polarity switched cell under four kinds of test patterns.
Fig. 6 shows a kind of embodiment of Fig. 2 first multiplexer to the, three multiplexers under four kinds of test patterns.
Fig. 7 shows the Organization Chart of the display driver of another embodiment of the present invention.
The reference numeral explanation
100,200,700: display driver
101,201: driving circuit
102,202,710: test circuit
110,210,711: unit of testing and controlling
120,220,712: switch element
130,230: display panel
111,211: counter
112,212: logical block
121,221: the first multiplexers
122,222: the second multiplexers
124,224: polarity switched cell
223: the three multiplexers
L1-L2, L21-L23: data line
V1-V4, V
COM: voltage
S1-S4, SP1-SP3: signal
320,330: trigger
310,521-538: phase inverter
411,413,415,416,501-512: with door
421-423: or door
601-612: transistor
D1, D2, CLK1, CLK2, CLKB1, CLKB2, Q1, Q2, QB1, QB2: in order to the signal end of key diagram 3
FR, FG, FB: in order to the signal end of key diagram 4
R1-R4, G1-G4, B1-B4: in order to the signal end of key diagram 5
P1-P3: in order to the signal end of key diagram 6.
Embodiment
The display driver that Fig. 1 shows one embodiment of the invention couples the Organization Chart of a display panel.In Fig. 1, display driver 100 comprises driving circuit 101 and test circuit 102.Driving circuit 101 electrically connects with display panel 130 by many leads.Test circuit 102 comprises unit of testing and controlling 110 and switch element 120.Unit of testing and controlling 110 determines test pattern according to control signal S1, and wherein test pattern comprises first pattern and second pattern.Switch element 120 is coupled to display panel 130, and receives the first gray scale voltage V1 and the second gray scale voltage V2.Switch element 120 is controlled by unit of testing and controlling 110.By switch element 120, unit of testing and controlling 110 can determine to allow the first gray scale voltage V1 or the second gray scale voltage V2 output to the data line of display panel 130.In Fig. 1, only show the first data line L1 and the second data line L2 and represent many data lines of display panel 130.
In first pattern, switch element 120 is selected to allow the first gray scale voltage V1 send the first data line L1 to, and allows the second gray scale voltage V2 send this second data line L2 to.In second pattern, switch element 120 is selected to allow the first gray scale voltage V1 send the second data line L2 to, and allows the second gray scale voltage V2 send the first data line L1 to.
In display panel 130, the first data line L1 connects the first colored pixels unit in this hypothesis, and the second data line L2 connects the second colored pixels unit.Therefore, by the control of control signal S1, test circuit 102 can drive display panel 130 and demonstrate the first color picture in first pattern, demonstrates the second color picture and drive display panel 130 in second pattern, and detects the assembling quality according to this.
With the display driver of membrane of flip chip, display comprises display panel, is encapsulated in driver and X circuit board on the film.The X circuit board electrically connects with display panel by above-mentioned film.The traditional test mode is to utilize time schedule controller generation sample and pass through the driver drives display panel, and whether determine to assemble quality then according to picture displayed good.Yet it is more to utilize time schedule controller to produce the required input probe of sample, thereby improves testing cost.
And in the present embodiment, test sample book is produced by the test circuit 102 of driver 100, therefore can whether correct without the electric connection that time schedule controller produces between test sample book testing film and the display panel 130, so and can reduce and test required number of probes.
Below another embodiment will be described.Figure 1A illustrates under the application conditions of " polar switching " gray scale voltage of display panel and the performance diagram of GTG according to the embodiment of the invention.If consider the application demand of " polar switching ", above-mentioned switch element 120 can more receive the 3rd gray scale voltage V3 and the 4th gray scale voltage V4.At this hypothesis gray scale voltage V1 and V2 is the positive polarity gray scale voltage, and gray scale voltage V3 and V4 are the negative polarity gray scale voltage.
Please refer to Fig. 1 and Figure 1A, unit of testing and controlling 110 comprises counter 111 and logical block 112 in the present embodiment, and wherein counter 111 couples logical block 112.Switch element 120 comprises first multiplexer 121, second multiplexer 122 and polarity switched cell 124, and wherein, polarity switched cell 124 couples first multiplexer 121, second multiplexer 122 and logical block 112.In addition, display panel 130 has the first data line L1 and the second data line L2, and wherein, the first data line L1 is coupled to first multiplexer 121, and the second data line L2 is coupled to second multiplexer 122.
At first, unit of testing and controlling 110 can decide test pattern according to the control signal S1 that receives, and this test pattern comprises first pattern and second pattern.In more detail, the counter 111 of unit of testing and controlling 110 inside can produce a count value according to the triggering of control signal S1, its inner logical block 112 then is to enable first pattern or second pattern according to this count value, and exports a color signal of corresponding first pattern or second pattern simultaneously.Then, the control of switch element 120 response test control modules 110 color signals, when first pattern, the first gray scale voltage V1 or the 4th gray scale voltage V4 are sent to the first data line L1, and the second gray scale voltage V2 or the 3rd gray scale voltage V3 are sent to the second data line L2, and when second pattern, the first gray scale voltage V1 or the 4th gray scale voltage V4 are sent to the second data line L2, and the second gray scale voltage V2 or the 3rd gray scale voltage V3 are sent to the first data line L1.
That is to say that after polarity switched cell 124 received a switching signal SP1, it can control the output of first multiplexer 121 and second multiplexer 122 according to the color signal that switching signal SP1 and unit of testing and controlling 110 are exported.In other words, first multiplexer 121 is exported the first gray scale voltage V1 or the 4th gray scale voltage V4 in response to the control of polarity switched cell 124 in first pattern, and exports the second gray scale voltage V2 or the 3rd gray scale voltage V3 in second pattern.And second multiplexer 122 is exported the first gray scale voltage V1 or the 4th gray scale voltage V4 in response to the control of polarity switched cell 124 in second pattern, and exports the second gray scale voltage V2 or the 3rd gray scale voltage V3 in first pattern.
So when first pattern, the first data line L1 of display panel 1 30 receives the first gray scale voltage V1 or the 4th gray scale voltage V4 shows the first color picture; When second pattern, the second data line L2 receives the first gray scale voltage V1 or the 4th gray scale voltage V4 shows the second color picture.Therefore,, just can after showing the first color picture or the second color picture, can also take into account the polar switching of liquid crystal molecule, make liquid crystal molecule energy operate as normal by the switching of switching signal SP1.
The display driver that Fig. 2 shows another embodiment of the present invention couples the Organization Chart of a display panel.In Fig. 2, only show many data lines that the first data line L21, the second data line L22 and the 3rd data line L23 represent display panel 230.In Fig. 2, display driver comprises driving circuit 201 and test circuit 202.Driving circuit 201 electrically connects with display panel 230 by many leads.Test circuit 202 comprises unit of testing and controlling 210 and switch element 220.Wherein, unit of testing and controlling 210 couples switch element 220.Unit of testing and controlling 210 receives a control signal S2, and determines test pattern according to control signal S2.Switch element 220 couples display panel 230, and it is in order to receive the first gray scale voltage V1, the second gray scale voltage V2, the 3rd gray scale voltage V3 and the 4th gray scale voltage V4.Further, unit of testing and controlling 210 comprises counter 211 and logical block 212, and wherein counter 211 couples logical block 212.Switch element 220 comprises first multiplexer 221, second multiplexer 222, the 3rd multiplexer 223 and polarity switched cell 224, wherein, polarity switched cell 224 couples first multiplexer 221, second multiplexer 222, the 3rd multiplexer 223 and logical block 212.In addition, display panel 230 has the first data line L21, the second data line L22 and the 3rd data line L23, wherein, the first data line L21 is coupled to first multiplexer 221, the second data line L22 is coupled to second multiplexer, 222, the three data line L23 and is coupled to the 3rd multiplexer 223.
In the present embodiment, the test pattern of unit of testing and controlling 210 has comprised first, second and three-mode, and it elects according to a control signal S2.In more detail, the counter 211 of unit of testing and controlling 210 inside produces a count value according to the triggering of control signal S2, logical block 212 then is to enable first, second or three-mode according to this count value, and output is corresponding to a color signal of first, second or three-mode.
Then, the control of switch element 220 response test control modules 210 is sent to the first data line L21 with the first gray scale voltage V1 when first pattern, and the second gray scale voltage V2 is sent to the second data line L22 and the 3rd data line L23.When second pattern, the first gray scale voltage V1 is sent to the second data line L22, and the second gray scale voltage V2 is sent to the first data line L21 and the 3rd data line L23.When three-mode, the first gray scale voltage V1 is sent to the 3rd data line L23, and the second gray scale voltage V2 is sent to the first data line L21 and the second data line L22.That is to say that first multiplexer 221 of switch element 220 inside can be exported the first gray scale voltage V1 when first pattern according to color signal, and exports the second gray scale voltage V2 when second pattern and three-mode.Second multiplexer 222 is exported the first gray scale voltage V1 according to color signal when second pattern, and exports the second gray scale voltage V2 when first pattern and three-mode.223 of the 3rd multiplexers are exported the first gray scale voltage V1 according to color signal when the three-mode, and export the second gray scale voltage V2 when first pattern and second pattern.In the present embodiment, the GTG that the first gray scale voltage V1 makes corresponding pixel show is bright, and the GTG that the feasible corresponding pixel of the second gray scale voltage V2 shows is for black.
In addition, when considering the situation of liquid crystal polar switching, the polarity switched cell 224 of switch element 220 inside can receive one and switch signal SP2, and controls the output of first multiplexer 221, second multiplexer 222 and the 3rd multiplexer 223 according to switching signal SP2 and color signal.So first multiplexer 221 is exported the first gray scale voltage V1 or the 4th gray scale voltage V4 when first pattern, and when second pattern and three-mode, export the second gray scale voltage V2 or the 3rd gray scale voltage V3.Second multiplexer 222 is exported the first gray scale voltage V1 or the 4th gray scale voltage V4 when second pattern, and exports the second gray scale voltage V2 or the 3rd gray scale voltage V3 when first pattern and three-mode.And the 3rd multiplexer 22 3 is exported the first gray scale voltage V1 or the 4th gray scale voltage V4 when three-mode, and exports the second gray scale voltage V2 or the 3rd gray scale voltage V3 when first pattern and second pattern.Therefore, display panel 230 just can receive the first gray scale voltage V1 according to the first data line L21 when first pattern or the 4th gray scale voltage V4 shows the first color picture, and when second pattern, receive the first gray scale voltage V1 or the 4th gray scale voltage V4 shows the second color picture according to the second data line L22, and when three-mode, receive the first gray scale voltage V1 or the 4th gray scale voltage V4 shows the 3rd color picture according to the 3rd data line L23.In the present embodiment, the GTG that the 4th gray scale voltage V4 makes corresponding pixel show is bright, and the GTG that the feasible corresponding pixel of the 3rd gray scale voltage V3 shows is for black.
What deserves to be mentioned is that when the test pattern of unit of testing and controlling 210 more comprised four-mode, display panel 230 more can show one the 4th color picture.Continue to utilize Fig. 2 that the embodiment of test circuit 202 when having four-mode is described now.At first, similar to the above embodiments, after counter 211 receives a control signal S3, can export a count value according to this signal, logical block 212 then is to enable first, second, third or four-mode according to this count value, and a color signal of output simultaneously corresponding first, second, third or four-mode.Then, switch element 220 can be sent to the first gray scale voltage V1 the first data line L21, the second data line L22 and the 3rd data line L23 simultaneously when four-mode, then similar to the above embodiments to the action of three-mode for first.That is to say that first multiplexer 221 of switch element 220 inside is exported the first gray scale voltage V1 when first pattern and four-mode according to color signal, and export the second gray scale voltage V2 when second pattern and three-mode.Second multiplexer 222 is exported the first gray scale voltage V1 when second pattern and four-mode according to color signal, and export the second gray scale voltage V2 when first pattern and three-mode.And the 3rd multiplexer 223 is exported the first gray scale voltage V1 according to color signal, and when first pattern and second pattern, export the second gray scale voltage V2 when three-mode and four-mode.In addition, under the situation of considering polar switching, the polarity switched cell 224 of switch element 220 inside can receive one and switch signal SP3, and controls the output of first multiplexer 221, second multiplexer 222 and the 3rd multiplexer 223 according to this signal and color signal.So first multiplexer 221 is exported the first gray scale voltage V1 or the 4th gray scale voltage V4 when first pattern and four-mode, and when second pattern and three-mode, export the second gray scale voltage V2 or the 3rd gray scale voltage V3.Second multiplexer 222 is exported the first gray scale voltage V1 or the 4th gray scale voltage V4 when second pattern and four-mode, and exports the second gray scale voltage V2 or the 3rd gray scale voltage V3 when first pattern and three-mode.And the 3rd multiplexer 223 is exported the first gray scale voltage V1 or the 4th gray scale voltage V4 when three-mode and four-mode, and exports the second gray scale voltage V2 or the 3rd gray scale voltage V3 when first pattern and second pattern.
Therefore, display panel 230 just can receive the first gray scale voltage V1 according to the first data line L21 when first pattern or the 4th gray scale voltage V4 shows the first color picture, and when second pattern, receive the first gray scale voltage V1 or the 4th gray scale voltage V4 shows the second color picture according to the second data line L22, and when three-mode, receive the first gray scale voltage V1 or the 4th gray scale voltage V4 shows the 3rd color picture according to the 3rd data line L23.And when four-mode, 230 of display panels receive the first gray scale voltage V1 simultaneously according to data line L21-L23 or the 4th gray scale voltage V4 shows the 4th color picture.That is to say that the 4th color picture is to mix by first to the 3rd color picture.For example, suppose that first to the 3rd color is respectively red, green and blue, then the 4th color then is mixed white.
With the display of tool colored filter, first data line for example is to supply with red pixel, and second data line for example is to supply with green pixel, and the 3rd data line for example is to supply with blue pixel.Therefore, when first pattern, picture displayed is red; During second pattern, picture displayed is green; During three-mode, picture displayed is blue; During four-mode, picture displayed is a white.In each pattern, whether judge its quality unusually and according to this by inspecting picture.The embodiment of each unit in the foregoing description below will be described.Fig. 3 shows a kind of embodiment of Fig. 2 counter 211 under four kinds of test patterns.In Fig. 3, counter 211 comprises phase inverter 310, first trigger 320 and second trigger 330.Wherein, the reversed-phase output QB1 of first trigger 320 is coupled to its input end D1, and its inversion clock input end CLKB1 is coupled to the output terminal of phase inverter 310, and its input end of clock CLK1 is coupled to the input end of phase inverter 310 and receives control signal S3.The reversed-phase output QB2 of second trigger 330 is coupled to its input end D2, and its inversion clock input end CLKB2 is coupled to the output terminal Q1 of first trigger 320, and its input end of clock CLK2 is coupled to the reversed-phase output QB1 of first trigger 320.So, behind the input end input control signal S3 of phase inverter 310, the output terminal Q2 of the output terminal Q1 of first trigger 320 and second trigger 330 respectively as first output terminal and second output terminal of counter 210, just can be obtained count value as shown in the table.
Q2 Q1
0 0
0 1
1 0
1 1
So first group (0 0) in the count value (Q2 Q1) can be set at first pattern, second group (0 1) are set at second pattern, and the 3rd group (1 0) are set at three-mode, and the 4th group (1 1) are set at four-mode.Yet, having in this area and to know that usually the knowledgeable should know, the framework of counter is not limited only to embodiment shown in Figure 3, so long as can produce the corresponding signal person of a little patterns so far, spirit all according to the invention.
Fig. 4 shows a kind of embodiment of Fig. 2 logical block 212 under four kinds of test patterns.In Fig. 4, logical block 212 comprise with the door 411, with the door 413, with the door 415, with the door 416 and or the door 421-423.Be coupled to the reversed-phase output QB1 of first trigger 320 and the reversed-phase output QB2 of second trigger 330 respectively with 411 2 input ends of door.Be coupled to the output terminal Q1 of first trigger 320 and the reversed-phase output QB2 of second trigger 330 respectively with 413 2 input ends of door.Be coupled to the reversed-phase output QB1 of first trigger 320 and the output terminal Q2 of second trigger 330 respectively with 415 2 input ends of door.Be coupled to the output terminal Q1 of first trigger 320 and the output terminal Q2 of second trigger 330 respectively with two input ends of door 416.Or two input ends of door 421 are coupled to respectively and the output terminal of door 411 and 416.Or two input ends of door 42 2 are coupled to respectively and the output terminal of door 413 and 416.Or two input ends of door 423 are coupled to respectively and the output terminal of door 415 and 416.So, after counter 210 outputs one count value, with or door 421,422 and 423 output terminal respectively as the first output terminal FR, the second output terminal FG and the 3rd output terminal FB of logical block 220, just can obtain the following table of comparisons (color signal of corresponding first pattern of numerical value 100 representatives in the table of comparisons, the color signal of corresponding second pattern of numerical value 010 representative, the rest may be inferred for all the other).
| Test pattern | Q2 | Q1 | FR | FG | FB |
| First pattern, the second pattern three-mode four-mode | 0 0 1 1 | 0 1 0 1 | 1 0 0 1 | 0 1 0 1 | 0 0 1 1 |
Fig. 5 shows a kind of embodiment of Fig. 2 polarity switched cell under four kinds of test patterns.In Fig. 5, polarity switched cell 224 comprises and door 501-512 and phase inverter 521-538.Wherein, be divided into circuit structure like three categories with door 501-512 and phase inverter 521-538, with door 501-504 and phase inverter 521-526 be first group, with door 505-508 and phase inverter 527-532 be second group, with door 509-512 and phase inverter 533-538 be the 3rd group.In first group of circuit structure, couple the input end of phase inverter 521 with the output terminal of door 501, and one input end receives switching signal SP3, its another input end couples the first output terminal FR of logical block 220.Couple the input end of phase inverter 522 with the output terminal of door 502, and one input end receives switching signal SP3, the inversion signal that its another input end comes the first output terminal FR of receive logic unit 220 to be exported by phase inverter 523.Receive the inversion signal of switching signal SP3, the inversion signal that its another input end comes the first output terminal FR of receive logic unit 220 to be exported by phase inverter 525 with an input end of door 503 by phase inverter 524.Receive the inversion signal of switching signal SP2, the signal that the first output terminal FR of its another input end receive logic unit 220 is exported with an input end of door 503 by phase inverter 526.
In addition, second group and the 3rd group of circuit structure in Fig. 5, its coupling mode is all similar with first group of circuit structure, difference only is the signal difference that receives, second group of circuit structure is the second output terminal FG of counterlogic unit, and the 3rd group of the 3rd output terminal FB that circuit structure is the counterlogic unit, so do not narrating its coupling mode at this.
Accept above-mentioned, be assumed to be the output terminal R1-R4 of polarity switched cell in regular turn phase inverter 521,522 and with the output terminal of door 503 and 504 now, be assumed to be the output terminal G1-G4 of polarity switched cell in regular turn phase inverter 527,528 and with the output terminal of door 507 and 508, and be assumed to be the output terminal B1-B4 of polarity switched cell in regular turn phase inverter 533,534 and with the output terminal of door 511 and 512, so can obtain the output numerical tabular of following polarity switched cell 224.
| Pattern | SP3 | FR | R1 | R2 | R3 | R4 |
| 2、3 1、4 2、3 1、4 | 0 0 1 1 | 0 1 0 1 | 1 1 1 0 | 1 1 0 1 | 1 0 0 0 | 0 1 0 0 |
| Pattern | SP3 | FR | R1 | R2 | R3 | R4 |
| Pattern | SP3 | FG | G1 | G2 | G3 | G4 |
| 1、3 2、4 1、3 | 0 0 1 | 0 1 0 | 1 1 1 | 1 1 0 | 1 0 0 | 0 1 0 |
| 2、4 | 1 | 1 | 0 | 1 | 0 | 0 |
| Pattern | SP3 | FB | B1 | B2 | B3 | B4 |
| 2、1 3、4 2、1 3、4 | 0 0 1 1 | 0 1 0 1 | 1 1 1 0 | 1 1 0 1 | 1 0 0 0 | 0 1 0 0 |
Fig. 6 shows a kind of embodiment of Fig. 2 first multiplexer 221, second multiplexer 222 and the 3rd multiplexer 223 under four kinds of test patterns.In Fig. 6, first multiplexer 221 comprises P transistor npn npn 601,602 and N transistor npn npn 603,604, second multiplexer 222 comprises that P transistor npn npn 605,606 and N transistor npn npn 607,608, the three multiplexers 223 comprise P transistor npn npn 609,610 and N transistor npn npn 611,612.Continuation is with reference to Fig. 6, the control end of transistor 601-604 is coupled to the output terminal R1-R4 of polarity switched cell 224 in regular turn, and first termination of transistor 601 is received the first gray scale voltage V1, first termination of transistor 602 is received the second gray scale voltage V2, first termination of transistor 603 is received the 3rd gray scale voltage V3, and first termination of transistor 604 is received the 4th gray scale voltage V4.The control end of transistor 605-608 is coupled to the output terminal G1-G4 of polarity switched cell 224 in regular turn, and first termination of transistor 605 is received the first gray scale voltage V1, first termination of transistor 606 is received the second gray scale voltage V2, first termination of transistor 607 is received the 3rd gray scale voltage V3, and first termination of transistor 608 is received the 4th gray scale voltage V4.
As mentioned above, the control end of transistor 609-612 is coupled to the output terminal B1-B4 of polarity switched cell 224 in regular turn, and first termination of transistor 609 is received the first gray scale voltage V1, first termination of transistor 610 is received the second gray scale voltage V2, first termination of transistor 611 is received the 3rd gray scale voltage V3, and first termination of transistor 612 is received the 4th gray scale voltage V4.In addition, second end of transistor 601-604 couples and mutually as the output terminal P1 of first multiplexer 221, second end of transistor 605-608 couples and mutually as the output terminal P2 of second multiplexer 222, and second end of transistor 609-612 couples mutually and as the output terminal P3 of the 3rd multiplexer 223.So, can obtain the output numerical tabular of following each multiplexer.
| Pattern | R1 | R2 | R3 | R4 | P1 |
| 2、3 1、4 2、3 1、4 | 1 1 1 0 | 1 1 0 1 | 1 0 0 0 | 0 1 0 0 | V3 V4 V2 V1 |
| Pattern | G1 | G2 | G3 | G4 | P2 |
| 1、3 2、4 1、3 2、4 | 1 1 1 0 | 1 1 0 1 | 1 0 0 0 | 0 1 0 0 | V3 V4 V2 V1 |
| Pattern | B1 | B2 | B3 | B4 | P3 |
| 2、1 3、4 2、1 3、4 | 1 1 1 0 | 1 1 0 1 | 1 0 0 0 | 0 1 0 0 | V3 V4 V2 V1 |
Therefore, display panel 2 30 just can receive the first gray scale voltage V1 according to the first data line L21 when first pattern or the 4th gray scale voltage V4 shows the first color picture, and when second pattern, receive the first gray scale voltage V1 or the 4th gray scale voltage V4 shows the second color picture according to the second data line L22, and when three-mode, receive the first gray scale voltage V1 or the 4th gray scale voltage V4 shows the 3rd color picture according to the 3rd data line L23.And when four-mode, 230 of display panels are according to first, second and the 3rd data line L21-L2 3 receives the first gray scale voltage V1 simultaneously or the 4th gray scale voltage V4 shows the 4th color picture.
Fig. 7 shows the Organization Chart of the display driver of another embodiment of the present invention.In Fig. 7, display driver 700 comprises test circuit 710.Test circuit 710 comprises unit of testing and controlling 711 and switch element 712, and wherein unit of testing and controlling 711 is coupled to switch element 712.When display driver 700 couples a display panel, unit of testing and controlling 711 receives a control signal S4, and decide test pattern according to this signal, and switch element 712 receives first to fourth gray scale voltage V1-V4, and its control according to unit of testing and controlling 711 is exported the gray scale voltage that received to display panel.And can then no longer repeat at this with reference to the foregoing description for the integrated operation of test circuit 710.
In sum, embodiments of the invention are built-in test circuits in driver, allow driver can utilize this test circuit to produce test sample book, and export the display panel that couples to, originally judge the quality of assembling quality by the demonstration test specimens, so need not use time schedule controller can reach test purpose.In addition, in test process, the test circuit of embodiments of the invention and display driver only must input control signal and switching signals, so can use the testing needle of minority can reach test purpose, therefore except simplifying test process and promoting the test speed, can also effectively reduce production costs.
Though the present invention discloses as above with preferred embodiment; right its is not in order to limit the present invention; have in the technical field under any and know the knowledgeable usually; without departing from the spirit and scope of the present invention; when can doing a little change and retouching, so protection scope of the present invention is as the criterion when looking the claim person of defining of the present invention.
Claims (36)
1. test circuit, this test circuit is built in the display driver, and in order to test a display panel, this test circuit comprises:
Unit of testing and controlling, it determines test pattern according to a control signal, wherein, this test pattern comprises one first pattern and one second pattern; And
Switch element, it is coupled to this display panel and receives first gray scale voltage and second gray scale voltage, and this switch element is controlled by this unit of testing and controlling;
Wherein, this display panel comprises one first data line and one second data line;
This switch element is selected to allow this first gray scale voltage send this first data line in this first pattern, and allows this second gray scale voltage send this second data line to; And
This switch element is selected to allow this first gray scale voltage send this second data line in this second pattern, and allows this second gray scale voltage send this first data line to.
2. test circuit as claimed in claim 1, wherein, this test pattern more comprises three-mode, and this display panel more comprises the 3rd data line;
This switch element is selected to allow this first gray scale voltage send this first data line in this first pattern, and allows this second gray scale voltage send this second data line and the 3rd data line to;
This switch element is selected to allow this first gray scale voltage send this second data line in this second pattern, and allows this second gray scale voltage send this first data line and the 3rd data line to; And
This switch element is selected to allow this first gray scale voltage send the 3rd data line in this three-mode, and allows this second gray scale voltage send this first data line and this second data line to.
3. test circuit as claimed in claim 2, wherein, this test pattern more comprises four-mode; And
This switch element is selected to allow this first gray scale voltage send this first data line, this second data line and the 3rd data line in this four-mode.
4. test circuit as claimed in claim 1, wherein, this display panel shows one first color picture and one second color picture respectively in this first pattern and this second pattern.
5. test circuit as claimed in claim 2, wherein, this display panel shows one the 3rd color picture at this three-mode.
6. test circuit as claimed in claim 3, wherein, this display panel shows the 4th color picture at this four-mode.
7. test circuit as claimed in claim 1, wherein, this unit of testing and controlling comprises:
Counter, it is according to triggering for generating one count value of this control signal; And
Logical block, it selects to enable this first pattern or this second pattern according to this count value, and exports a color signal.
8. test circuit as claimed in claim 7, wherein, this switch element comprises:
First multiplexer is coupled to this first data line, and it selects this first gray scale voltage of output when this first pattern according to this color signal, and selects this second gray scale voltage of output when this second pattern; And
One second multiplexer is coupled to this second data line, and it selects this first gray scale voltage of output when this second pattern according to this color signal, and selects this second gray scale voltage of output when this first pattern.
9. test circuit as claimed in claim 8, wherein, this switch element more receives the 3rd gray scale voltage and the 4th gray scale voltage.
10. test circuit as claimed in claim 9, wherein, this switch element more comprises:
Polarity switched cell couples this first multiplexer and this second multiplexer, and it controls the output of this first multiplexer and this second multiplexer according to switching signal and this color signal;
Wherein, this first multiplexer is selected this first gray scale voltage of output or the 4th gray scale voltage when this first pattern in response to the control of this polarity switched cell, and selects this second gray scale voltage of output or the 3rd gray scale voltage when this second pattern; And
This second multiplexer is selected this first gray scale voltage of output or the 4th gray scale voltage when this second pattern in response to the control of this polarity switched cell, and select this second gray scale voltage of output or the 3rd gray scale voltage when this first pattern.
11. test circuit as claimed in claim 2, wherein, this unit of testing and controlling comprises:
Counter, it is according to the triggering for generating count value of this control signal; And
Logical block, it selects to enable this first pattern, this second pattern or this three-mode according to this count value, and exports a color signal.
12. test circuit as claimed in claim 11, wherein, this switch element comprises:
First multiplexer is coupled to this first data line, and it selects this first gray scale voltage of output when this first pattern according to this color signal, and selects this second gray scale voltage of output when this second pattern and this three-mode;
Second multiplexer is coupled to this second data line, and it selects this first gray scale voltage of output when this second pattern according to this color signal, and selects this second gray scale voltage of output when this first pattern and this three-mode; And
The 3rd multiplexer is coupled to the 3rd data line, and it selects this first gray scale voltage of output when this three-mode according to this color signal, and selects this second gray scale voltage of output when this first pattern and this second pattern.
13. test circuit as claimed in claim 12, wherein, this switch element more receives the 3rd gray scale voltage and the 4th gray scale voltage.
14. test circuit as claimed in claim 13, wherein, this switch element more comprises:
Polarity switched cell, couple this first multiplexer, this second multiplexer and the 3rd multiplexer, it controls the output of this first multiplexer, this second multiplexer and the 3rd multiplexer according to a switching signal and this color signal;
Wherein, this first multiplexer is selected this first gray scale voltage of output or the 4th gray scale voltage when this first pattern in response to the control of this polarity switched cell, and select this second gray scale voltage of output or the 3rd gray scale voltage when this second pattern and this three-mode;
This second multiplexer is selected this first gray scale voltage of output or the 4th gray scale voltage when this second pattern in response to the control of this polarity switched cell, and select this second gray scale voltage of output or the 3rd gray scale voltage when this first pattern and this three-mode; And
The 3rd multiplexer is selected this first gray scale voltage of output or the 4th gray scale voltage when this three-mode in response to the control of this polarity switched cell, and select this second gray scale voltage of output or the 3rd gray scale voltage when this first pattern and this second pattern.
15. test circuit as claimed in claim 3, wherein, this unit of testing and controlling comprises:
Counter, it is according to triggering for generating one count value of this control signal; And
Logical block, it selects to enable this first pattern, this second pattern, this three-mode or this four-mode according to this count value, and exports a color signal.
16. test circuit as claimed in claim 15, wherein, this switch element comprises:
First multiplexer is coupled to this first data line, and it selects this first gray scale voltage of output when this first pattern and this four-mode according to this color signal, and selects this second gray scale voltage of output when this second pattern and this three-mode;
Second multiplexer is coupled to this second data line, and it selects this first gray scale voltage of output when this second pattern and this four-mode according to this color signal, and selects this second gray scale voltage of output when this first pattern and this three-mode; And
The 3rd multiplexer is coupled to the 3rd data line, and it selects this first gray scale voltage of output when this three-mode and this four-mode according to this color signal, and selects this second gray scale voltage of output when this first pattern and this second pattern.
17. test circuit as claimed in claim 16, wherein, this switch element more receives the 3rd gray scale voltage and the 4th gray scale voltage.
18. test circuit as claimed in claim 17, wherein, this switch element more comprises:
Polarity switched cell, couple this first multiplexer, this second multiplexer and the 3rd multiplexer, it controls the output of this first multiplexer, this second multiplexer and the 3rd multiplexer according to a switching signal and this color signal;
Wherein, this first multiplexer is selected this first gray scale voltage of output or the 4th gray scale voltage when this first pattern and this four-mode in response to the control of this polarity switched cell, and select this second gray scale voltage of output or the 3rd gray scale voltage when this second pattern and this three-mode;
This second multiplexer is selected this first gray scale voltage of output or the 4th gray scale voltage when this second pattern and this four-mode in response to the control of this polarity switched cell, and select this second gray scale voltage of output or the 3rd gray scale voltage when this first pattern and this three-mode; And
The 3rd multiplexer is selected this first gray scale voltage of output or the 4th gray scale voltage when this three-mode and this four-mode in response to the control of this polarity switched cell, and select this second gray scale voltage of output or the 3rd gray scale voltage when this first pattern and this second pattern.
19. a display driver electrically connects with a display panel by many leads, this display driver comprises:
Test circuit comprises:
Unit of testing and controlling, it determines test pattern according to a control signal, wherein, this test pattern comprises one first pattern and one second pattern; And
Switch element, it is coupled to this display panel and receives one first gray scale voltage and one second gray scale voltage, and this switch element is controlled by this unit of testing and controlling;
Wherein, this display panel comprises first data line and second data line;
Wherein, this switch element is selected to allow this first gray scale voltage send this first data line in this first pattern, and allows this second gray scale voltage send this second data line to; And
Wherein, this switch element is selected to allow this first gray scale voltage send this second data line in this second pattern, and allows this second gray scale voltage send this first data line to.
20. display driver as claimed in claim 19, wherein, this test pattern more comprises a three-mode, and this display panel more comprises one the 3rd data line;
This switch element is selected to allow this first gray scale voltage send this first data line in this first pattern, and allows this second gray scale voltage send this second data line and the 3rd data line to;
This switch element is selected to allow this first gray scale voltage send this second data line in this second pattern, and allows this second gray scale voltage send this first data line and the 3rd data line to; And
This switch element is selected to allow this first gray scale voltage send the 3rd data line in this three-mode, and allows this second gray scale voltage send this first data line and this second data line to.
21. display driver as claimed in claim 20, wherein, this test pattern more comprises four-mode; And
This switch element is selected to allow this first gray scale voltage send this first data line, this second data line and the 3rd data line in this four-mode.
22. display driver as claimed in claim 19, wherein, this display panel shows the first color picture and the second color picture respectively in this first pattern and this second pattern.
23. display driver as claimed in claim 20, wherein, this display panel shows the 3rd color picture at this three-mode.
24. display driver as claimed in claim 21, wherein, this display panel shows the 4th color picture at this four-mode.
25. display driver as claimed in claim 19, wherein, this unit of testing and controlling comprises:
Counter, it is according to triggering for generating one count value of this control signal; And
Logical block, it selects to enable this first pattern or this second pattern according to this count value, and the output color signal.
26. display driver as claimed in claim 25, wherein, this switch element comprises:
First multiplexer is coupled to this first data line, and it selects this first gray scale voltage of output when this first pattern according to this color signal, and selects this second gray scale voltage of output when this second pattern; And
Second multiplexer is coupled to this second data line, and it selects this first gray scale voltage of output when this second pattern according to this color signal, and selects this second gray scale voltage of output when this first pattern.
27. display driver as claimed in claim 26, wherein, this switch element more receives the 3rd gray scale voltage and the 4th gray scale voltage.
28. display driver as claimed in claim 27, wherein, this switch element more comprises:
Polarity switched cell couples this first multiplexer and this second multiplexer, and it controls the output of this first multiplexer and this second multiplexer according to switching signal and this color signal;
Wherein, this first multiplexer is selected this first gray scale voltage of output or the 4th gray scale voltage when this first pattern in response to the control of this polarity switched cell, and selects this second gray scale voltage of output or the 3rd gray scale voltage when this second pattern; And
This second multiplexer is selected this first gray scale voltage of output or the 4th gray scale voltage when this second pattern in response to the control of this polarity switched cell, and select this second gray scale voltage of output or the 3rd gray scale voltage when this first pattern.
29. display driver as claimed in claim 20, wherein, this unit of testing and controlling comprises:
Counter, it is according to triggering for generating one count value of this control signal; And
Logical block, it selects to enable this first pattern, this second pattern or this three-mode according to this count value, and the output color signal.
30. display driver as claimed in claim 29, wherein, this switch element comprises:
First multiplexer is coupled to this first data line, and it selects this first gray scale voltage of output when this first pattern according to this color signal, and selects this second gray scale voltage of output when this second pattern and this three-mode;
Second multiplexer is coupled to this second data line, and it selects this first gray scale voltage of output when this second pattern according to this color signal, and selects this second gray scale voltage of output when this first pattern and this three-mode; And
The 3rd multiplexer is coupled to the 3rd data line, and it selects this first gray scale voltage of output when this three-mode according to this color signal, and selects this second gray scale voltage of output when this first pattern and this second pattern.
31. display driver as claimed in claim 30, wherein, this switch element more receives the 3rd gray scale voltage and the 4th gray scale voltage.
32. display driver as claimed in claim 31, wherein, this switch element more comprises:
Polarity switched cell, couple this first multiplexer, this second multiplexer and the 3rd multiplexer, it controls the output of this first multiplexer, this second multiplexer and the 3rd multiplexer according to a switching signal and this color signal;
Wherein, this first multiplexer is selected this first gray scale voltage of output or the 4th gray scale voltage when this first pattern in response to the control of this polarity switched cell, and select this second gray scale voltage of output or the 3rd gray scale voltage when this second pattern and this three-mode;
This second multiplexer is selected this first gray scale voltage of output or the 4th gray scale voltage when this second pattern in response to the control of this polarity switched cell, and select this second gray scale voltage of output or the 3rd gray scale voltage when this first pattern and this three-mode; And
The 3rd multiplexer is selected this first gray scale voltage of output or the 4th gray scale voltage when this three-mode in response to the control of this polarity switched cell, and select this second gray scale voltage of output or the 3rd gray scale voltage when this first pattern and this second pattern.
33. display driver as claimed in claim 21, wherein, this unit of testing and controlling comprises:
Counter, it is according to triggering for generating one count value of this control signal; And
Logical block, it selects to enable this first pattern, this second pattern, this three-mode or this four-mode according to this count value, and exports a color signal.
34. display driver as claimed in claim 33, wherein, this switch element comprises:
First multiplexer is coupled to this first data line, and it selects this first gray scale voltage of output when this first pattern and this four-mode according to this color signal, and selects this second gray scale voltage of output when this second pattern and this three-mode;
Second multiplexer is coupled to this second data line, and it selects this first gray scale voltage of output when this second pattern and this four-mode according to this color signal, and selects this second gray scale voltage of output when this first pattern and this three-mode; And
The 3rd multiplexer is coupled to the 3rd data line, and it selects this first gray scale voltage of output when this three-mode and this four-mode according to this color signal, and selects this second gray scale voltage of output when this first pattern and this second pattern.
35. display driver as claimed in claim 34, wherein, this switch element more receives the 3rd gray scale voltage and the 4th gray scale voltage.
36. display driver as claimed in claim 35, wherein, this switch element more comprises:
Polarity switched cell, couple this first multiplexer, this second multiplexer and the 3rd multiplexer, it controls the output of this first multiplexer, this second multiplexer and the 3rd multiplexer according to a switching signal and this color signal;
Wherein, this first multiplexer is selected this first gray scale voltage of output or the 4th gray scale voltage when this first pattern and this four-mode in response to the control of this polarity switched cell, and select this second gray scale voltage of output or the 3rd gray scale voltage when this second pattern and this three-mode;
This second multiplexer is selected this first gray scale voltage of output or the 4th gray scale voltage when this second pattern and this four-mode in response to the control of this polarity switched cell, and select this second gray scale voltage of output or the 3rd gray scale voltage when this first pattern and this three-mode; And
The 3rd multiplexer is selected this first gray scale voltage of output or the 4th gray scale voltage when this three-mode and this four-mode in response to the control of this polarity switched cell, and select this second gray scale voltage of output or the 3rd gray scale voltage when this first pattern and this second pattern.
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| CN107481684B (en) * | 2017-07-24 | 2019-05-31 | 武汉华星光电技术有限公司 | Multiplexer control circuitry |
| US20190197929A1 (en) * | 2017-12-26 | 2019-06-27 | Novatek Microelectronics Corp. | Driving apparatus of display panel and operation method thereof |
| WO2021232230A1 (en) * | 2020-05-19 | 2021-11-25 | 京东方科技集团股份有限公司 | Display panel, display apparatus, testing method, and crack detection method |
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