CN107613233B - Television processing system capable of compatibly processing two signals - Google Patents
Television processing system capable of compatibly processing two signals Download PDFInfo
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- CN107613233B CN107613233B CN201710939239.9A CN201710939239A CN107613233B CN 107613233 B CN107613233 B CN 107613233B CN 201710939239 A CN201710939239 A CN 201710939239A CN 107613233 B CN107613233 B CN 107613233B
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Abstract
The invention discloses a television processing system capable of compatibly processing two signals, which comprises a core board, wherein the core board is provided with an SOC (system on chip), a mode configuration circuit, eight groups of differential DATA lines DATA0-DATA7, eight groups of differential DATA lines DATA8-DATA11, a point to point socket and a v-by-one socket, the mode configuration circuit is electrically connected with the SOC, a TCON (transistor control on) module is arranged in the core board, and the mode configuration circuit is configured with an IO port level state electrically connected with the TCON module; the DATA0-DATA7 eight groups of differential DATA lines, the DATA8-DATA11 eight groups of differential DATA lines, the point to point socket and the v-by-one socket are respectively electrically connected with the system-on-chip SOC, the point to point socket is respectively electrically connected with the DATA0-DATA7 eight groups of differential DATA lines and the DATA8-DATA11 eight groups of differential DATA lines, and the v-by-one socket is electrically connected with the DATA0-DATA7 eight groups of differential DATA lines. The invention can compatibly process two signals of v-by-one and point to point, the machine core board reserves two sockets of a v-by-one socket and a point to point socket, and meanwhile, the DATA routing and the control routing of the v-by-one signal and the point to point signal part can be multiplexed.
Description
Technical Field
The invention relates to the field of intelligent televisions, in particular to a television processing system capable of compatibly processing two signals.
Background
In recent years, the flat panel television industry is in a micro-profit era due to intense competition, and the cost reduction is urgently required under the condition of ensuring the quality. The integration of the integrated flat-panel television functional module IC reduces the number of ICs and corresponding peripheral devices, and becomes a feasible method for reducing the cost and improving the profit margin under the current condition.
The SOC in the flat-panel television saves a TCON signal time sequence processing IC by a built-in TCON module, and can greatly lower the system cost, which is commonly called as a TCONLESS scheme. However, in the transition period, the standard screen scheme and the TCONLESS scheme coexist, and the v-by-one signal of the standard screen and the point to point signal of the TCONLESS scheme have a great difference, and two sets of core platforms are required to develop and produce hardware and software, so that the problems of high system development cost, long development period, various materials and the like are caused.
Disclosure of Invention
Aiming at the defects in the prior art, the invention aims to provide a television processing system which can compatibly process two signals of v-by-one and point to point.A machine core board is reserved with two sockets of a v-by-one socket and a point to point socket, a V-by-one and point to point part DATA wiring and a control wiring can be multiplexed, the v-by-one signal is normally connected to a screen, and when the point to point signal is used, a separate driving board is additionally arranged to be matched with the V-by-one and point to point signal to drive a liquid crystal screen to display.
The purpose of the invention is realized by the following technical scheme:
a television processing system capable of compatibly processing two signals comprises a core board, wherein the core board is provided with a system-on-chip SOC, a mode configuration circuit, eight groups of differential DATA lines DATA0-DATA7, eight groups of differential DATA lines DATA8-DATA11, a point to point socket and a v-by-one socket, the mode configuration circuit is electrically connected with the system-on-chip SOC, a TCON module is arranged in the core board, the mode configuration circuit is configured with an IO port level state electrically connected with the TCON module, and the mode configuration circuit is used for detecting the IO port level state when the system-on-chip SOC is started to determine that the format of an output signal is a v-by-one signal or a point to point signal; the DATA0-DATA7 eight groups of differential DATA lines, the DATA8-DATA11 eight groups of differential DATA lines, the point to point socket and the v-by-one socket are respectively electrically connected with the system-on-chip SOC, the point to point socket is respectively electrically connected with the DATA0-DATA7 eight groups of differential DATA lines and the DATA8-DATA11 eight groups of differential DATA lines, and the v-by-one socket is electrically connected with the DATA0-DATA7 eight groups of differential DATA lines.
To better implement the invention, the invention further comprises a driver board electrically connected to the point to point socket.
The preferable driving plate structure technical scheme of the invention is as follows: the driving board internally comprises a Power IC and a Pgmma IC, and the Power IC and the Pgmma IC of the driving board output Power voltage or/and Pgmma voltage; the driving board also comprises eight groups of differential DATA lines DATA0-DATA7 and eight groups of differential DATA lines DATA8-DATA11, the eight groups of differential DATA lines DATA0-DATA7 in the driving board are electrically connected with the eight groups of differential DATA lines DATA0-DATA7 in the core board correspondingly, and the eight groups of differential DATA lines DATA8-DATA11 in the driving board are electrically connected with the eight groups of differential DATA lines DATA8-DATA11 in the core board correspondingly.
Preferably, the point to point socket includes a control panel a therein.
Preferably, the v-by-one socket internally comprises a control panel B.
Preferably, the invention further comprises a TCONLESS screen which is electrically connected with the driving board and the point socket respectively.
Preferably, the present invention further comprises a standard screen electrically connected to the v-by-one socket.
When the display screen is a standard screen, the SOC outputs a v-by-one signal, and the system comprises: the system comprises a system on chip SOC, a v-by-one socket and a standard screen. When the display screen is a TCONLESS screen, the upper system SOC outputs a point to point signal, and the system comprises: upper system SOC, point to point socket, driver board, TCONLESS screen.
Compared with the prior art, the invention has the following advantages and beneficial effects:
(1) the same main board of the invention can simultaneously carry out the project development of the standard screen and the TCONLESS screen, thereby shortening the development period. The invention does not need to typeset a TCONLESS mainboard again, reduces software development platforms and reduces development cost; for TCONLESS screens of different manufacturers, only corresponding driving plates need to be replaced due to different control voltages, and the core board does not need to be changed, so that the production efficiency is improved.
(2) The invention can compatibly process two signals of v-by-one and point to point, the machine core board reserves two sockets of a v-by-one socket and a point to point socket, the DATA routing and the control routing of the v-by-one and point to point part can be multiplexed, the v-by-one signal is normally connected to a screen, and when the point to point signal is used, a separate driving board is additionally arranged to be matched with the v-by-one and point to point signal to drive the liquid crystal display to display.
Drawings
FIG. 1 is a block diagram of the principle structure of the present invention;
FIG. 2 is a point to point signal processing system of the present invention connected to a TCONLESS screen through a point to point socket;
FIG. 3 is a v-by-one signal processing system of the present invention connected to a standard screen through a v-by-one socket.
Detailed Description
The present invention will be described in further detail with reference to the following examples:
examples
As shown in fig. 1 to 3, a television processing system capable of compatibly processing two signals includes a core board and a driving board, where the core board is provided with a system on chip SOC, a mode configuration circuit, eight groups of differential DATA lines DATA0-DATA7, eight groups of differential DATA lines DATA8-DATA11, a point to point socket, and a v-by-one socket, the mode configuration circuit is electrically connected to the system on chip SOC, a TCON module is built in the core board, the mode configuration circuit is configured with an IO port level state electrically connected to the TCON module, and the mode configuration circuit is configured to detect the IO port level state when the system on chip SOC is turned on to determine that a format of an output signal is a v-by-one signal or a point to point signal; when the system is used, when the TCONLESS screen is inserted into the point to point socket, the mode configuration circuit is configured to detect the IO port level state when the SOC is started, and determine that the SOC is to input a point to point signal, and indicates the SOC to input the point to point signal to the point to point socket and the TCONLESS screen according to a point to point signal processing flow method; when the standard screen is inserted into the v-by-one socket, the mode configuration circuit is configured to detect the level state of the IO port when the SOC is started, determine that the SOC should input a v-by-one signal, and instruct the SOC to input the v-by-one signal to the v-by-one socket and the standard screen according to a v-by-one signal processing flow method. point to point signal. The DATA0-DATA7 eight groups of differential DATA lines, the DATA8-DATA11 eight groups of differential DATA lines, the point to point socket and the v-by-one socket are respectively electrically connected with the system-on-chip SOC, the point to point socket is respectively electrically connected with the DATA0-DATA7 eight groups of differential DATA lines and the DATA8-DATA11 eight groups of differential DATA lines, and the v-by-one socket is electrically connected with the DATA0-DATA7 eight groups of differential DATA lines. The driver board is electrically connected to the point to point socket. As shown in fig. 1, a point to point signal output by a system on chip SOC (SOC is abbreviated as SOC in fig. 2 and fig. 3) is input to a driver board through a point to point socket and then input to a TCONLESS screen for display; and a v-by-one signal output by the SOC (system on chip) (SOC for short in fig. 2 and fig. 3) is input to a v-by-one socket and then is input to a standard screen for display.
As shown in fig. 2, the inside of the point to point socket includes a CONTROL panel a (CONTROL-1 inside the point to point socket shown in fig. 2 and CONTROL inside the point to point socket shown in fig. 3). The invention also comprises a TCONLESS screen which is respectively and electrically connected with the driving board and the point to point socket. The driving board internally comprises a Power IC and a Pgmma IC, and the Power IC and the Pgmma IC of the driving board output Power voltage or/and Pgmma voltage; the driving board also comprises eight groups of differential DATA lines DATA0-DATA7 and eight groups of differential DATA lines DATA8-DATA11, the eight groups of differential DATA lines DATA0-DATA7 in the driving board are electrically connected with the eight groups of differential DATA lines DATA0-DATA7 in the core board correspondingly, and the eight groups of differential DATA lines DATA8-DATA11 in the driving board are electrically connected with the eight groups of differential DATA lines DATA8-DATA11 in the core board correspondingly. As shown in fig. 2, when the display screen is a TCONLESS screen, the mode configuration circuit configures an SOC (system on chip SOC for short) to output a point to point signal and a corresponding control signal, the point to point socket is connected to the driver board, the Power IC on the driver board outputs a Power voltage according to the control signal, the pgma IC outputs a gmma voltage according to the control signal, and the Power voltage, the gmma voltage and the point to point data signal are output to the TCONLESS screen together to drive the liquid crystal display. The point to point signal includes EPI/ISP/CEDS/USITCMPI. The point to point DATA signal comprises 12 groups of differential DATA lines (including DATA0-DATA7 eight groups of differential DATA lines and DATA8-DATA11 eight groups of differential DATA lines), a part of control signals v-by-one are used, but the point to point is not used, and the corresponding pin of the driving board is disconnected.
As shown in fig. 3, the present invention further includes a standard screen, which is electrically connected to the v-by-one socket, and the v-by-one socket includes a CONTROL panel B therein (e.g., a CONTROL inside the v-by-one socket shown in fig. 3). As shown in fig. 3, when the display screen is a standard screen, the mode configuration circuit configures an SOC (short for system on chip SOC) to output a v-by-one signal, and the v-by-one signal transmits 8 groups (i.e., eight groups of differential DATA lines DATA0-DATA 7) of 12 groups of differential DATA lines using a point to point signal, that is, the v-by-one control signal selects a point to point partial control signal line for multiplexing. And the DATA signals of the v-by-one socket and the DATA0-DATA7 eight groups of differential DATA lines are added with corresponding control signals and output to a standard screen driving liquid crystal display. The DATA signals of 8 groups of v-by-one (namely eight groups of differential DATA lines DATA0-DATA 7) are connected in series with a blocking capacitor between the v-by-one socket and the point to point socket, the blocking capacitor is close to the point to point socket, if the quality of the transmission signal is poor when the point to point signal is processed, the 8 groups of blocking capacitors can be considered to be disconnected, and the purpose of improving the quality of the point to point signal by disconnecting the v-by-one socket is achieved.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents and improvements made within the spirit and principle of the present invention are intended to be included within the scope of the present invention.
Claims (5)
1. A television processing system compatible for processing two signals, comprising: the system comprises a core board, wherein the core board is provided with an SOC (system on chip), a mode configuration circuit, eight groups of differential DATA lines DATA0-DATA7, eight groups of differential DATA lines DATA8-DATA11, a point to point socket and a v-by-one socket, the mode configuration circuit is electrically connected with the SOC, a TCON (transistor control on) module is arranged in the core board, the mode configuration circuit is configured with an IO port level state electrically connected with the TCON module, and the mode configuration circuit is used for detecting the IO port level state to determine the format of an output signal to be a v-by-one signal or a point to point signal when the SOC is started; the DATA0-DATA7 eight groups of differential DATA lines, the DATA8-DATA11 eight groups of differential DATA lines, the point to point socket and the v-by-one socket are respectively electrically connected with the system-on-chip SOC, the point to point socket is respectively electrically connected with the DATA0-DATA7 eight groups of differential DATA lines and the DATA8-DATA11 eight groups of differential DATA lines, and the v-by-one socket is electrically connected with the DATA0-DATA7 eight groups of differential DATA lines; the device also comprises a driving plate which is electrically connected with the point to point socket; the driving board internally comprises a Power IC and a Pgmma IC, and the Power IC and the Pgmma IC of the driving board output Power voltage or/and Pgmma voltage; the driving board also comprises eight groups of differential DATA lines DATA0-DATA7 and eight groups of differential DATA lines DATA8-DATA11, the eight groups of differential DATA lines DATA0-DATA7 in the driving board are electrically connected with the eight groups of differential DATA lines DATA0-DATA7 in the core board correspondingly, and the eight groups of differential DATA lines DATA8-DATA11 in the driving board are electrically connected with the eight groups of differential DATA lines DATA8-DATA11 in the core board correspondingly.
2. A television processing system compatible for processing two signals according to claim 1, wherein: the inside of the point to point socket comprises a control panel A.
3. A television processing system compatible for processing two signals according to claim 1, wherein: the v-by-one socket internally comprises a control panel B.
4. A television processing system compatible for processing two signals according to claim 1 or 2, characterized in that: the TCONLESS screen is electrically connected with the driving board and the point to point socket respectively.
5. A television processing system compatible for processing two signals according to claim 1 or 3, characterized in that: the novel LED lamp also comprises a standard screen, wherein the standard screen is electrically connected with the v-by-one socket.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201710939239.9A CN107613233B (en) | 2017-09-30 | 2017-09-30 | Television processing system capable of compatibly processing two signals |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201710939239.9A CN107613233B (en) | 2017-09-30 | 2017-09-30 | Television processing system capable of compatibly processing two signals |
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| CN107613233A CN107613233A (en) | 2018-01-19 |
| CN107613233B true CN107613233B (en) | 2020-06-30 |
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| CN201710939239.9A Active CN107613233B (en) | 2017-09-30 | 2017-09-30 | Television processing system capable of compatibly processing two signals |
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Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110087008A (en) * | 2019-04-01 | 2019-08-02 | 晶晨半导体(上海)股份有限公司 | A kind of compatible apparatus of Tconless interface |
| CN110381273B (en) * | 2019-06-06 | 2021-09-21 | 深圳康佳电子科技有限公司 | Liquid crystal television circuit system and interface |
| WO2020258392A1 (en) * | 2019-06-25 | 2020-12-30 | 咸阳彩虹光电科技有限公司 | Active matrix display apparatus and driving circuit board component |
| CN110347631A (en) * | 2019-07-02 | 2019-10-18 | 深圳市华星光电技术有限公司 | VBO interface turns the electronic device that UART and USB interface are shared |
| CN111405202B (en) * | 2020-03-24 | 2022-11-01 | 深圳创维－Rgb电子有限公司 | TCONLESS mainboard signal conversion device and detection system |
| CN113539194B (en) * | 2020-04-22 | 2023-05-02 | 咸阳彩虹光电科技有限公司 | Display device |
| CN114495851B (en) * | 2020-11-11 | 2023-12-08 | 咸阳彩虹光电科技有限公司 | Display device |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7532043B1 (en) * | 2007-10-26 | 2009-05-12 | National Semiconductor Corporation | Signal detector output for cable driver applications |
| CN104363405A (en) * | 2014-10-31 | 2015-02-18 | 深圳创维－Rgb电子有限公司 | Ultrahigh-definition signal conversion device and conversion method thereof |
| CN105975315A (en) * | 2016-05-19 | 2016-09-28 | 四川长虹电器股份有限公司 | Automatic program writing method for TCON chip |
| CN106878814A (en) * | 2017-03-22 | 2017-06-20 | 四川长虹电器股份有限公司 | The system and method for compatible LCD TV standard screen and Tconless screens |
| CN106875908A (en) * | 2017-03-15 | 2017-06-20 | 四川长虹电器股份有限公司 | It is a kind of to realize system, screen display method and signal processing method that color depth 8K high shows |
-
2017
- 2017-09-30 CN CN201710939239.9A patent/CN107613233B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7532043B1 (en) * | 2007-10-26 | 2009-05-12 | National Semiconductor Corporation | Signal detector output for cable driver applications |
| CN104363405A (en) * | 2014-10-31 | 2015-02-18 | 深圳创维－Rgb电子有限公司 | Ultrahigh-definition signal conversion device and conversion method thereof |
| CN105975315A (en) * | 2016-05-19 | 2016-09-28 | 四川长虹电器股份有限公司 | Automatic program writing method for TCON chip |
| CN106875908A (en) * | 2017-03-15 | 2017-06-20 | 四川长虹电器股份有限公司 | It is a kind of to realize system, screen display method and signal processing method that color depth 8K high shows |
| CN106878814A (en) * | 2017-03-22 | 2017-06-20 | 四川长虹电器股份有限公司 | The system and method for compatible LCD TV standard screen and Tconless screens |
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