CN101388657A

CN101388657A - Press-key signal de-jitter apparatus based on block sustaining D trigger

Info

Publication number: CN101388657A
Application number: CNA2008102014234A
Authority: CN
Inventors: 谈进
Original assignee: Shanghai Polytechnic University
Current assignee: Shanghai Polytechnic University
Priority date: 2008-10-21
Filing date: 2008-10-21
Publication date: 2009-03-18

Abstract

The invention discloses a press key signal tremble removing device on the basis of maintaining obstruction type D triggers, which comprises a sampling circuit and a differential circuit, wherein the sampling circuit is composed of at least two maintaining obstruction type D triggers, wherein one zero setting end of one maintaining obstruction type D trigger is an input signal end, an output end is connected with the zero setting end of the other maintaining obstruction type D trigger, the differential circuit generates an output signal which is corresponding to the clock width according to a sampling signal which is output by the sampling circuit, a tremble removing circuit which is formed thereby is simple, and the expansion of the sampling signal can be realized through increasing the number of the maintaining obstruction type D triggers.

Description

Based on the push button signalling de-jitter apparatus of keeping the obstructive type d type flip flop

Technical field

The present invention relates to a kind of push button signalling de-jitter apparatus, relate in particular to a kind of based on the push button signalling de-jitter apparatus of keeping the obstructive type d type flip flop.

Background technology

Existing key mode all is to adopt mechanical switch structure mostly, and therefore regular meeting produces the clutter of beating back and forth in critical point when button, directly imports such signal and may produce once above misoperation.See also Fig. 1, there is clutter in the push button signalling of input at critical point T1 place, and therefore according to formed corresponding sampled signal, its output signal has produced a misoperation at the T2 place.Certainly can adopt the problem that sampling frequency solves misoperation of adjusting, as shown in Figure 2, because the misoperation shown in Fig. 1 has been avoided in the raising of sampled signal frequency.Yet sampling frequency can not unconfinedly improve, otherwise loses useful signal very easily.Usually ordinary people's key scroll is 10 times/second at the most, that is the one-touch time be 100MS, can be estimated as 50MS so press the time of key.If the sampling period is decided to be 8MS, in the time that key is pressed, can take a sample 6 times.And unsettled noise is generally within the 4MS scope, so only be extracted into once at the most.Because the operating frequency of circuit (as scanning circuit and display circuit) is about 24HZ usually, institute thinks the elimination misoperation, and the sampling frequency of existing de-twitter circuit is chosen to be 125HZ.The situation of misoperation so unavoidably will take place because of the noise jamming of critical point.

The existing other method of misoperation problem that solves is for adopting the rest-set flip-flop de-twitter circuit, as shown in Figure 3, it is the schematic diagram of a rest-set flip-flop de-twitter circuit, obtain respective waveforms figure after this circuit compiled emulation, as shown in Figure 4, as seen from the figure, described rest-set flip-flop de-twitter circuit is comparatively complicated, and two continuous sampling pulses are only depended in its output.In addition,, increase common d type flip flop number, will increase the time expand of output, can design and the simulating, verifying this point with pattern input mode equally if in the trigger de-twitter circuit.As shown in Figure 5, it is the input schematic diagram of the RS type de-twitter circuit of a trigger of increase, obtain corresponding analogous diagram after it is compiled emulation, as shown in Figure 6, as seen from the figure, in RS type de-twitter circuit, increase d type flip flop quantity, can not increase the sampling pulse number of useful signal, just prolonged the reaction time of circuit output.

Therefore develop a kind of more efficiently debouncing circuit and become the technical task that those skilled in the art need to be resolved hurrily in fact.

Summary of the invention

The object of the present invention is to provide a kind ofly based on the push button signalling de-jitter apparatus of keeping the obstructive type d type flip flop, so that the debouncing circuit circuit is simple, reaction speed realizes the expandability of circuit soon, simultaneously.

To achieve the above object, the invention provides a kind of based on the push button signalling de-jitter apparatus of keeping the obstructive type d type flip flop, it comprises: keep the sampling circuit that the obstructive type d type flip flop forms by at least two, wherein, a zero setting end of keeping the obstructive type d type flip flop is the input signal end, and its output is connected with another zero setting end of keeping the obstructive type d type flip flop; And the differential circuit that produces the output signal of a corresponding clock width according to the sampled signal of described sampling circuit output.

Wherein, the number of keeping the obstructive type d type flip flop in described sampling circuit increase can make the number of the sampled signal of described sampling circuit output increase.

Preferable, described two inputs of keeping the obstructive type d type flip flop all connect high level.

Preferable, described differential circuit by first NAND gate, first d type flip flop, second NAND gate, second d type flip flop, and form with being connected in series.

In sum, of the present invention based on the push button signalling de-jitter apparatus of keeping the obstructive type d type flip flop by realizing the shake of going to push button signalling by keeping sampling circuit that the obstructive type d type flip flop forms, and formed de-twitter circuit is simple, and the number of keeping the obstructive type d type flip flop by increase can realize the expansion of sampled signal.

Description of drawings

Fig. 1 produces the principle schematic of misoperation for existing because of clutter.

Fig. 2 is a principle schematic of having eliminated misoperation after the adjustment sampling frequency.

Fig. 3 is the schematic diagram of existing rest-set flip-flop de-twitter circuit.

Fig. 4 is to obtaining the simulation result schematic diagram after the rest-set flip-flop de-twitter circuit emulation shown in Figure 3.

Fig. 5 is the existing schematic diagram that increases the formed rest-set flip-flop de-twitter circuit of a trigger.

Fig. 6 is to obtaining the simulation result schematic diagram after the rest-set flip-flop de-twitter circuit emulation shown in Figure 5.

Fig. 7 is the circuit theory diagrams based on the push button signalling de-jitter apparatus of keeping the obstructive type d type flip flop of the present invention.

Fig. 8 for will be shown in Figure 7 import circuit simulation figure behind the emulation platform based on the push button signalling de-jitter apparatus of keeping the obstructive type d type flip flop.

Fig. 9 is analogous diagram shown in Figure 8 simulation result schematic diagram through obtaining after the emulation.

Figure 10 keeps the formed circuit theory diagrams based on the push button signalling de-jitter apparatus of keeping the obstructive type d type flip flop of obstructive type d type flip flop for increasing by one.

Figure 11 is the simulation result schematic diagram based on the push button signalling de-jitter apparatus of keeping the obstructive type d type flip flop shown in Figure 10.

Embodiment

Below will be described in further detail based on the push button signalling de-jitter apparatus of keeping the obstructive type d type flip flop of the present invention.

See also Fig. 7, it is the circuit theory diagrams based on the push button signalling de-jitter apparatus of keeping the obstructive type d type flip flop.Describedly comprise: sampling circuit and differential circuit based on the push button signalling de-jitter apparatus of keeping the obstructive type d type flip flop.

Described sampling circuit comprises: keep obstructive type d type flip flop A and keep obstructive type d type flip flop B, both inputs (being the D end) all connect high level (being VCC).Wherein, the described zero setting end (being the CLRN end) of keeping obstructive type d type flip flop A is the input signal end, insert push button signalling KEY, its output (being the Q end) is connected with the zero setting end of keeping obstructive type d type flip flop B, the signal that all the other each ends of two triggers are inserted describes in detail no longer one by one at this respectively as shown in Figure 5.

Described differential circuit by first NAND gate, first d type flip flop, second NAND gate, second d type flip flop, and form with being connected in series, its sampled signal according to described sampling circuit output produces the output signal (being DLY_OUT) of a corresponding clock width, can all be locked in the width of a clock signal to effectively button sampling each time thus.

When the zero setting termination of keeping obstructive type d type flip flop A is gone into push button signalling, corresponding to first sampled signal rising edge, to keep the output of obstructive type d type flip flop A and put 1, the input of corresponding B is also put 1, and B output 1 provides condition during for rising edge arrival next time.When second sampled signal rising edge arrived, the output of keeping obstructive type d type flip flop B was 1, after this, if the 3rd rising edge arrives, the output of first d type flip flop is 1 with 0 from saltus step, at the differential circuit output, will obtain the square-wave signal of a sampling pulse periodic width.Because the zero setting end of keeping obstructive type d type flip flop A and keeping obstructive type d type flip flop B is not controlled by sampling clock signal, is the asynchronous signal input that works immediately, so should remain to by key input signal in the arrival of the 3rd rising edge.

Below with wave simulation figure to being described further based on the push button signalling de-jitter apparatus of keeping the obstructive type d type flip flop.At first, with MAX+plusII platform graphics input function input analogous diagram, as shown in Figure 8, by compiling postedit simulation waveform map file, hold again by obtaining analogous diagram after the emulation as shown in Figure 9, as seen from the figure, at 220ns place and 470ns place and the 590ns place keep the obstructive type d type flip flop and put 0 and put 1 " immediately " and act on high-visible.

In addition, described have " dilatation " property based on the push button signalling de-jitter apparatus of keeping the obstructive type d type flip flop.Because various situations all might take place in the reality, such as the hesitation of casual shake or moment, have increased complexity and the difficulty of judging effective push button signalling greatly.In order to increase reliability, can increase the hazard free flip flop number in based on the push button signalling de-jitter apparatus of keeping the obstructive type d type flip flop described, so the continuous sampling pulse number can be increased, and then the push button signalling of input can be effectively judged.As shown in figure 10, sampling circuit is kept the obstructive type d type flip flop by 3 and constituted, and is same, described circuit is carried out obtaining corresponding emulation schematic diagram after the emulation, as shown in figure 11, as seen from the figure, increase by one and kept the obstructive type d type flip flop, correspondingly just increased a sampling pulse.

In sum, the push button signalling de-jitter apparatus based on keeping the obstructive type d type flip flop of the present invention is compared to existing RS type De-twitter circuit, its circuit is simple, and Output rusults is also fast a pulse period, and can keep obstructive type D by increase and trigger The number of device is expanded the number of sampled signal, and the number that existing RS type de-twitter circuit increases trigger just makes circuit output Reaction the time increase. Therefore, the advantage of described push button signalling de-jitter apparatus based on keeping the obstructive type d type flip flop is apparent, Be that reaction speed is fast, circuit is simple, expandability is good, the more important thing is that increase is kept obstructive type d type flip flop quantity and can be expanded Exhibition sampling pulse number, this is for judging that the useful signal under the complex situations is very useful.

Claims

1. one kind based on the push button signalling de-jitter apparatus of keeping the obstructive type d type flip flop, it is characterized in that, comprising:

Keep the sampling circuit that the obstructive type d type flip flop forms by at least two, wherein, a zero setting end of keeping the obstructive type d type flip flop is the input signal end, and its output is connected with another zero setting end of keeping the obstructive type d type flip flop; And the differential circuit that produces the output signal of a corresponding clock width according to the sampled signal of described sampling circuit output.

2. as claimed in claim 1 based on the push button signalling de-jitter apparatus of keeping the obstructive type d type flip flop, it is characterized in that: described two inputs of keeping the obstructive type d type flip flop all connect high level.

3. as claimed in claim 1 based on the push button signalling de-jitter apparatus of keeping the obstructive type d type flip flop, it is characterized in that: described differential circuit by first NAND gate, first d type flip flop, second NAND gate, second d type flip flop, and form with being connected in series.

4. as claimed in claim 1 based on the push button signalling de-jitter apparatus of keeping the obstructive type d type flip flop, it is characterized in that: the number of keeping the obstructive type d type flip flop in described sampling circuit increase can make the number of the sampled signal of described sampling circuit output increase.