CN101373757A - Mask target and method for forming the same - Google Patents

Mask target and method for forming the same Download PDF

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Publication number
CN101373757A
CN101373757A CNA2007101433999A CN200710143399A CN101373757A CN 101373757 A CN101373757 A CN 101373757A CN A2007101433999 A CNA2007101433999 A CN A2007101433999A CN 200710143399 A CN200710143399 A CN 200710143399A CN 101373757 A CN101373757 A CN 101373757A
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China
Prior art keywords
alignment mark
layer
field oxide
gate polysilicon
polysilicon layer
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CNA2007101433999A
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Chinese (zh)
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CN101373757B (en
Inventor
石亮
黄清俊
王雪丹
施晓东
武斌
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Hejian Technology Suzhou Co Ltd
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Hejian Technology Suzhou Co Ltd
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Abstract

The invention provides an alignment mark and a forming method thereof. The method comprises the following steps: forming a field oxide layer, a grid polysilicon layer and a metal antemedium layer in sequence on a substrate; forming communicated trenches in sequence on the field oxide layer, the grid polysilicon layer and the metal antemedium layer; and taking the stacked multi-layer trenches as the alignment mark. The alignment mark and the forming method enable the trench depth of the alignment mark of the metal antemedium layer to be deepened, and enable the acquisition of optical signals of the alignment mark to be easier when photoetching is conducted, thereby solving the problem that the alignment precision is reduced or alignment can not be realized because the alignment mark is too shallow.

Description

A kind of alignment mark and forming method thereof
Technical field
The present invention relates to the technical field of transistorized manufacture method, alignment mark of particularly a kind of novel contact hole layer and forming method thereof.
Background technology
Common contact hole layer alignment mark is to be made on the active area of Cutting Road, utilizes the photoetching and the etching of contact hole layer, produces channel shaped and become alignment mark on before-metal medium layer.During crystal face metal level lithography alignment, the lithography alignment board reaches the purpose of aligning by the optical signalling that obtains contact hole layer alignment mark.As shown in Figure 1, the formation of contact hole layer alignment mark is on the before-metal medium layer 12 on the monocrystalline substrate 11 in Cutting Road zone in the known technology, utilizes light shield to come photoetching and etching field before-metal medium layer to form groove, obtains contact hole layer alignment mark.In the manufacturing process of planar power transistor, usually the thickness of before-metal medium layer is about 1-1.1 μ m, so the degree of depth of contact hole layer alignment marking channel is also in the 1-1.1 mu m range, yet the crystal face metal layer thickness is generally more than 3 μ m, this just makes after the crystal face layer metal deposition gets on, contact hole layer alignment marking channel place is tending towards smooth, causes the lithography alignment board to be difficult to obtain the optical signalling of contact hole layer alignment mark, produces the problem that alignment precision descends and maybe can't aim at.
Summary of the invention
The object of the present invention is to provide a kind of new alignment mark and forming method thereof, solve alignment difficulties, registration signal such as is difficult to obtain at problem, and the precision of aligning is improved.
The invention provides a kind of alignment mark, on a substrate, be formed with field oxide, gate polysilicon layer and before-metal medium layer successively, in field oxide, gate polysilicon layer and before-metal medium layer, form the groove communicate respectively successively, with the multilayer groove that stacks as this alignment mark.
The invention provides a kind of formation method of alignment mark, comprise at least:
One substrate is provided;
Form field oxide and cover this substrate, on the field oxide in the alignment mark zone on the Cutting Road, form groove;
Form the gate polysilicon layer and cover this field oxide, on the above-mentioned gate polysilicon layer in the alignment mark zone that covers above-mentioned Cutting Road place, form groove again;
Form before-metal medium layer and cover this gate polysilicon layer, on the above-mentioned before-metal medium layer in the alignment mark zone that covers above-mentioned Cutting Road place, form groove again, to form an alignment mark.
As preferably, utilize photoetching and etching to form above-mentioned groove in this formation method.
As preferably, above-mentioned alignment mark is stepped in this formation method.
Alignment mark provided by the invention and forming method thereof makes the gash depth of alignment mark of before-metal medium layer deepen, aim at the optical signalling that board obtains alignment mark during photoetching and become more easy, solve because of alignment mark and cross the problem that the shallow alignment precision decline that produces maybe can't be aimed at.
Below in conjunction with accompanying drawing, the specific embodiment of the present invention is described in further detail.For the person of ordinary skill in the field, from detailed description of the invention, above-mentioned and other purposes of the present invention, feature and advantage will be apparent.
Description of drawings
Fig. 1 is the schematic diagram of alignment mark of the prior art.
Fig. 2 A represents the active layer light shield of a preferred embodiment of the present invention.
Fig. 2 B is the profile of the field oxide after the photoetching of a preferred embodiment of the present invention.
Fig. 3 A represents gate polysilicon layer light shield and the active layer light shield after the overlay of a preferred embodiment of the present invention.
Fig. 3 B is the field oxide after the photoetching of a preferred embodiment of the present invention and the profile of gate polysilicon layer.
Fig. 4 A represents gate polysilicon layer light shield, active layer light shield and the contact hole layer light shield after the overlay of a preferred embodiment of the present invention.
Fig. 4 B is the profile of field oxide, gate polysilicon layer and before-metal medium layer after the photoetching of a preferred embodiment of the present invention.
Embodiment
Be described in further detail below in conjunction with the alignment mark of the drawings and specific embodiments a kind of novel contact hole layer of the present invention.
Fig. 2 A and 2B are the first step of the alignment mark of a preferred embodiment of the present invention, utilize the field oxide 22 on 31 pairs of monocrystalline substrate 21 of active layer light shield to carry out photoetching or etch processes, the beginning etching of alignment mark zone forms groove on Cutting Road, and shape is shown in Fig. 2 B, in the present embodiment, the thickness of field oxide 22 is 1 μ m, certainly, and the thickness of field oxide, groove number and shape can be arbitrarily, are not subjected to the restriction of present embodiment.
Fig. 3 A and 3B are second step of the alignment mark of a preferred embodiment of the present invention, at first on field oxide 22, increase one deck gate polysilicon layer 23, utilize gate polysilicon layer light shield 32 that gate polysilicon layer 23 is carried out photoetching or etch processes, alignment mark zone beginning etching on Cutting Road, form groove, shown in Fig. 3 B, wherein, the groove of gate polysilicon layer 23 is greater than the groove of field oxide 22, therefore the groove place is stepped, gate polysilicon layer light shield 32 is bigger than the opening of active layer light shield 31, and in the present embodiment, the thickness of gate polysilicon layer 23 is 0.6 μ m, certainly, the thickness of gate polysilicon layer, groove number and shape can be arbitrarily, are not subjected to the restriction of present embodiment.
Fig. 4 A and 4B are the 3rd step of the alignment mark of a preferred embodiment of the present invention, at first on gate polysilicon layer 23, increase layer of metal front medium layer 24, utilize light shield 33 that before-metal medium layer 24 is carried out photoetching or etch processes again, alignment mark zone beginning etching on Cutting Road, form groove, it is alignment mark, shown in Fig. 4 B, wherein, the groove of before-metal medium layer 24 is greater than the groove of gate polysilicon layer 23, so the groove place is stepped, and light shield 33 is bigger than the opening of gate polysilicon layer light shield 32, in the present embodiment, the thickness of before-metal medium layer 24 is 1-1.1 μ m, certainly, and the thickness of before-metal medium layer, groove number and shape can be arbitrarily, are not subjected to the restriction of present embodiment.
The degree of depth of alignment mark of the prior art is approximately the thickness of before-metal medium layer, promptly be about 1-1.1 μ m, the alignment mark that forms in the present embodiment is compared with alignment mark of the prior art, the degree of depth is about 2.6-2.7 μ m, be about 2.5 times of the degree of depth of former alignment mark, therefore, when lithography alignment, the problem that alignment precision decline maybe can't be aimed at just can be resolved.
The above is preferred embodiment of the present invention only, is not to be used for limiting practical range of the present invention; If do not break away from the spirit and scope of the present invention, the present invention is made amendment or is equal to replacement, all should be encompassed in the middle of the protection range of claim of the present invention.

Claims (4)

1. alignment mark, it is characterized in that on a substrate, forming successively field oxide, gate polysilicon layer and before-metal medium layer, in field oxide, gate polysilicon layer and before-metal medium layer, form the groove communicate respectively successively, with the multilayer groove that stacks as this alignment mark.
2. the formation method of an alignment mark is characterized in that comprising at least:
One substrate is provided;
Form field oxide and cover this substrate, on the field oxide in the alignment mark zone on the Cutting Road, form groove;
Form the gate polysilicon layer and cover this field oxide, on the above-mentioned gate polysilicon layer in the alignment mark zone that covers above-mentioned Cutting Road place, form groove again;
Form before-metal medium layer and cover this gate polysilicon layer, on the above-mentioned before-metal medium layer in the alignment mark zone that covers above-mentioned Cutting Road place, form groove again, to form an alignment mark.
3. formation method according to claim 2 is characterized in that: utilize photoetching and etching to form above-mentioned groove.
4. formation method according to claim 3 is characterized in that: above-mentioned alignment mark is stepped.
CN2007101433999A 2007-08-23 2007-08-23 Mask target and method for forming the same Expired - Fee Related CN101373757B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2007101433999A CN101373757B (en) 2007-08-23 2007-08-23 Mask target and method for forming the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2007101433999A CN101373757B (en) 2007-08-23 2007-08-23 Mask target and method for forming the same

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CN101373757A true CN101373757A (en) 2009-02-25
CN101373757B CN101373757B (en) 2010-06-02

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Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101587824B (en) * 2008-05-21 2010-09-22 北大方正集团有限公司 Registration mark and manufacturing method thereof
CN102339747A (en) * 2010-07-22 2012-02-01 上海华虹Nec电子有限公司 Zero scale forming method
CN102420214A (en) * 2010-09-25 2012-04-18 中芯国际集成电路制造(上海)有限公司 Method for forming strengthened aligning marks and semiconductor device
CN102931171A (en) * 2012-11-08 2013-02-13 杭州士兰集成电路有限公司 Pattern mark and corresponding manufacture method thereof
CN103000616A (en) * 2011-09-15 2013-03-27 上海华虹Nec电子有限公司 Method for manufacturing photoetching alignment marks for thin metal layers
CN103872019A (en) * 2012-12-17 2014-06-18 上海华虹宏力半导体制造有限公司 Photoetching mark applied to epitaxial process and manufacturing method for photoetching mark
CN104181016A (en) * 2013-05-22 2014-12-03 上海华虹宏力半导体制造有限公司 Physical analysis method for positioning deep trench bottom of deep trench product
CN104716016A (en) * 2013-12-12 2015-06-17 上海华虹宏力半导体制造有限公司 Method for manufacturing thin dielectric layer photoetching alignment mark
CN106229255A (en) * 2016-07-27 2016-12-14 上海华虹宏力半导体制造有限公司 Optimize method and the semiconductor device of autoregistration double exposure developing process
CN106919015A (en) * 2015-12-25 2017-07-04 株洲南车时代电气股份有限公司 A kind of semiconductor devices makes lithography alignment method

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US6495912B1 (en) * 2001-09-17 2002-12-17 Megic Corporation Structure of ceramic package with integrated passive devices
CN1245749C (en) * 2002-11-28 2006-03-15 华邦电子股份有限公司 Method of making shallow trench arrangement of self-aligning floating grid

Cited By (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101587824B (en) * 2008-05-21 2010-09-22 北大方正集团有限公司 Registration mark and manufacturing method thereof
CN102339747A (en) * 2010-07-22 2012-02-01 上海华虹Nec电子有限公司 Zero scale forming method
CN102420214B (en) * 2010-09-25 2017-06-13 中芯国际集成电路制造(上海)有限公司 Form the method and semiconductor devices of reinforcing alignment mark
CN102420214A (en) * 2010-09-25 2012-04-18 中芯国际集成电路制造(上海)有限公司 Method for forming strengthened aligning marks and semiconductor device
CN103000616A (en) * 2011-09-15 2013-03-27 上海华虹Nec电子有限公司 Method for manufacturing photoetching alignment marks for thin metal layers
CN103000616B (en) * 2011-09-15 2015-12-02 上海华虹宏力半导体制造有限公司 The manufacture method of thin metal layer photoetching alignment mark
CN102931171A (en) * 2012-11-08 2013-02-13 杭州士兰集成电路有限公司 Pattern mark and corresponding manufacture method thereof
CN102931171B (en) * 2012-11-08 2015-04-29 杭州士兰集成电路有限公司 Pattern mark and corresponding manufacture method thereof
CN103872019A (en) * 2012-12-17 2014-06-18 上海华虹宏力半导体制造有限公司 Photoetching mark applied to epitaxial process and manufacturing method for photoetching mark
CN103872019B (en) * 2012-12-17 2016-08-17 上海华虹宏力半导体制造有限公司 It is applied to photo-etching mark and the manufacture method thereof of epitaxy technique
CN104181016A (en) * 2013-05-22 2014-12-03 上海华虹宏力半导体制造有限公司 Physical analysis method for positioning deep trench bottom of deep trench product
CN104181016B (en) * 2013-05-22 2016-11-02 上海华虹宏力半导体制造有限公司 The Physical Analysis Methods of the location, deep trench bottom of deep trench product
CN104716016A (en) * 2013-12-12 2015-06-17 上海华虹宏力半导体制造有限公司 Method for manufacturing thin dielectric layer photoetching alignment mark
CN104716016B (en) * 2013-12-12 2018-04-17 上海华虹宏力半导体制造有限公司 The production method of film dielectric layer photoetching alignment mark
CN106919015A (en) * 2015-12-25 2017-07-04 株洲南车时代电气股份有限公司 A kind of semiconductor devices makes lithography alignment method
CN106229255A (en) * 2016-07-27 2016-12-14 上海华虹宏力半导体制造有限公司 Optimize method and the semiconductor device of autoregistration double exposure developing process
CN106229255B (en) * 2016-07-27 2020-02-21 上海华虹宏力半导体制造有限公司 Method of self-aligned double exposure development process and semiconductor device

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