CN101326710A - 供rf下变频混频器用的共栅共源跨导级 - Google Patents
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Abstract
在一个实施例中,一种无线设备接收机链包括具有共栅共源(CGCS)输入级的混频器。来自片外匹配网络的差分信号可被输入到该混频器的CGCS输入级,该混频器将这些信号下变频至基带或某一中频。此输入级包括共栅配置的一对NMOS晶体管和共源配置的一对PMOS晶体管。此CGCS输入级超过现有的CGO跨导级配置的潜在优势在于藉由通过PMOS差分对来添加共源级,使得跨导增益与高Q匹配网络解耦。
Description
相关申请的交叉引用
本申请要求2005年12月8日提交且题为“COMMON-GATECOMMON-SOURCE TRANSCONDUCTANCE STAGE FOR RFDOWNCONVERSION MIXER(供RF下变频混频器用的共栅共源跨导级)的美国临时专利申请No.60/748,854的优先权。
背景
无线通信网络被广泛地部署以提供诸如语音、分组数据、广播、消息接发等的各种通信服务。此类无线网络的示例包括码分多址(CDMA)网络、时分多址(TDMA)网络、频分多址(FDMA)网络、和正交FDMA(OFDMA)网络。这些无线网络也可利用诸如宽带CDMA(W-CDMA)、cdma2000、和全球移动通信系统(GSM)等的各种无线电技术。
此类无线网络中使用的无线设备包括用于将天线所接收到的射频(RF)信号转换成基带信号供数字处理的接收机段。图1示出了无线设备中的示例性接收机链100的一部分。无线地传送的RF信号由天线102来接收。这些RF信号由LNA(低噪声放大器)104来放大。经放大的信号被传递给典型地为声表面波(SAW)滤波器的RF级间带通滤波器106,而经滤波的信号被传回给混频器108。
LNA 104和混频器108通常被设在集成电路(“IC”或“芯片”)110上,而带通滤波器106通常被设在芯片外。可设匹配网络(MN)112以供在将来自带通滤波器106的经滤波信号传回芯片110时作阻抗匹配之用。这些来自匹配网络112的信号作为差分信号被输入到混频器108的输入级114,该混频器将信号下变频至基带或某一中频。
该混频器的输入级114可如图2中所示地具有常规的唯共栅(CGO)配置。分别在NMOS晶体管206、208的源处提供来自匹配网络的彼此相同但相位相差180°的差分输入信号202、204。NMOS晶体管206、208的栅极通过电阻器210、212被耦合,从而提供了此电路的“共栅”方面。每个NMOS晶体管206、208的栅极还被交叉耦合至与提供给其源极的相反的输入信号。PMOS晶体管220、222在其栅极处通过电阻器224、226被连接至恒定电压Vg228,并且在其源极处被连接至电源电压Vdd 230。所产生的通过每个NMOS晶体管的电流是归因于其栅极和源极处的输入信号。通过每个PMOS晶体管的电流因在其栅极和源极处提供的恒定电压而是恒定的。总电流It是通过此电路的每一列上的PMOS晶体管和NMOS晶体管的电流之和。
对于CGO输入级,为了实现高增益,NMOS晶体管的跨导gmn必须相对较大,这要求匹配网络具有十分高的Q匹配因子。由此推知,CGO输入级潜在可能的不利之处是对输入Q匹配因子的高敏感性。
概述
在一个实施例中,一种无线设备接收机链包括具有共栅共源(CGCS)输入级的混频器。来自片外(off-chip)匹配网络的差分信号可被输入到该混频器的CGCS输入级,该混频器将这些信号下变频至基带或某一中频。此输入级包括:共栅级,其可包括在其栅极和源极处耦合至差分输入的一对NMOS晶体管;以及共源级,其可包括在其源极处耦合至电流源、在其栅极处耦合至差分输入、并且在其漏极处耦合至该共栅级的一对PMOS晶体管;以及耦合在差分输入与地之间的RF扼流圈电感器。
此CGCS输入级超过现有CGO跨导级配置的潜在优势在于藉由通过PMOS差分对来添加共源级,使得跨导增益与高Q匹配网络解耦。
附图简述
图1示出了无线设备的收发机中的接收链的一部分。
图2是图1的接收链中混频器的唯共栅(CGO)输入级的框图。
图3示出了无线设备的收发机中的接收链的一部分,其在混频器中纳入了共栅共源(CGCS)输入级。
图4图解了示例性CGCS输入级。
图5是向/从匹配网络输入和输出的信号的框图。
详细描述
图3是根据一个实施例的无线设备接收机链的一部分的框图,其纳入了具有共栅共源(CGCS)输入级的混频器。
天线302所接收到的RF信号由设在芯片303上的LNA 304放大。经放大的信号被片外地传递给带通滤波器306。匹配网络308提供阻抗匹配以将经滤波器的信号310、311传回到芯片303上。差分信号被输入到混频器314的CGCS输入级312,该混频器将这些信号下变频至基带或某一中频。
图4是根据一个实施例的CGCS输入级312的电路图。在NMOS晶体管M1 406和M2 408的源极处分别提供来自匹配网络的差分输入信号wimx_inp310和wmix_inm 311。这些差分输入信号相位相差180°。NMOS晶体管406、408的栅极通过电阻410、411耦合,从而提供此电路的“共栅”方面。每个NMOS晶体管406、408的栅极还分别通过电容器412、413交叉耦合至与其源极相反的输入信号。响应于NMOS晶体管的栅极和源极处的输入信号,产生通过每个NMOS晶体管的电流。
PMOS晶体管M3420和M4 422在其栅极处通过电阻器424、425连接。这些PMOS晶体管的源极被束缚到电流源430,从而提供此电路的“共源”方面。类似于NMOS晶体管306、408,每个PMOS晶体管420、422的栅极分别通过电容器432、433交叉耦合至与其源极相反的输入信号。响应于在PMOS晶体管栅极处的输入信号和由电流源320提供的电流,产生通过每个PMOS晶体管的电流。总电流It是通过此输入级的每一列上的PMOS晶体管和NMOS晶体管的电流之和。
电感器450和451分别被耦合在NMOS晶体管406和408的源极与接地端子之间。这些电感器充当RF扼流圈电感器并在工作频率处呈现高阻抗,从而使得在工作期间绝大部分信号电流不是流到接地而是代之以向上流入这些晶体管中。
此CGCS输入级超过现有CGO跨导级配置的潜在优势在于藉由通过PMOS差分对420、422来添加共源级,使得跨导增益与高Q匹配网络308解耦。图5示出了匹配网络308的输入和输出处的信号。假定匹配网络308是无损的,则有:
回到图4,CGCS输入级312的输出电流It由下式给出:
此共源级的添加导致加入了第二项并且在gmn不够高的情况下将对增益作补偿,而且还放宽了Q匹配因子。直观地,为了从CGO跨导级得到高增益,电压Vin应当尽可能小,但是低Q匹配将导致Vin增大并导致来自CGO级的增益下降。然而,在添加了电压驱动的共级PMOS差分对的情况下,Vin增大会导致从共源级产生更多的电流,并由此补偿了共栅NMOS级中的增益损失。不引入功率消耗惩罚地组合共栅和共源级的优势。
在一个实施例中,供接收机链用的CGCS输入级包括宽度为300μm且长度为0.24μm的NMOS晶体管M1 406和M2 408,以及宽度为240μm且长度为0.24μm的PMOS晶体管M3 420和M4 422。供NMOS晶体管用的交叉耦合电容器412、413可约为6pF,而供PMOS晶体管用的交叉耦合电容器432、433可约为3pF。四个电阻器410、411、424、和425可约为10kΩ,而两个电感器450、451可约为9nH。
已描述了数个实施例。但是,将可理解,可作出各种修改而不会脱离本发明的精神和范围。例如,此CSCG混频器输入级可用在各种具有类似接收机的通信设备中,包括设计用在无线网络系统、无线局域网、和/或无线个域网中的那些。因此,其它实施例也落在所附权利要求的范围内。
Claims (11)
1.一种无线设备接收机,包括:
匹配网络;
混频器;以及
共栅共源(CGCS)混频器输入级,其包括:
输入,其用于接收来自所述匹配网络的差分输入信号;
电流源,
共源级,其包括耦合至所述输入和所述电流源的晶体管,
共栅级,其包括耦合至所述输入和所述共源级的晶体管,以及
输出,其耦合至所述混频器。
2.如权利要求1所述的无线设备接收机,其特征在于,所述CGCS混频器输入级还包括耦合在所述输入与接地端子之间的多个电感器。
3.如权利要求1所述的无线设备接收机,其特征在于,所述共栅级包括一对NMOS晶体管。
4.如权利要求3所述的无线设备接收机,其特征在于,所述共栅级中的每个NMOS晶体管包括漏极、栅极、和源极,其中所述漏极耦合至所述共源级,所述栅极耦合至所述差分输入信号中的一个,并且所述源极耦合至所述差分信号中的另一个。
5.如权利要求1所述的无线设备接收机,其特征在于,所述共源级包括一对PMOS晶体管。
6.如权利要求5所述的无线设备接收机,其特征在于,所述共栅级中的每个PMOS晶体管包括漏极、栅极、和源极,其中所述漏极耦合至所述共栅级,所述栅极耦合至所述差分输入信号中的一个,并且所述源极耦合至所述电流源。
7.如权利要求1所述的无线设备接收机,其特征在于,来自所述CGCS混频器输入级的所述输出的输出电流满足下式:
8.一种共栅共源(CGCS)跨导级,包括:
电流源;
包括第一对晶体管的共源级,所述第一对晶体管包括:
第一晶体管,其具有源极、漏极、和栅极,其中所述源极耦合至所述电流源,并且所述栅极耦合至第一差分输入信号,以及
第二晶体管,其具有源极、漏极、和栅极,其中所述源极耦合至所述电流源,并且所述栅极耦合至第二差分输入信号和所述第一晶体管的所述栅极;
包括第二对晶体管的共栅级,所述第二晶体管对包括:
第三晶体管,其具有漏极、栅极、和源极,其中所述漏极耦合至所述第一晶体管的所述漏极,所述栅极耦合至所述第一差分输入信号,并且所述源极耦合至所述第二差分输入信号,以及
第四晶体管,其具有漏极、栅极、和源极,其中所述漏极耦合至所述第二晶体管的所述漏极,所述栅极耦合至所述第二差分输入信号和所述第三晶体管的所述栅极,并且所述源极耦合至所述第一差分输入信号;
耦合在所述第一和第三晶体管的所述漏极之间的去往混频器的第一输出;以及
耦合在所述第二和第四晶体管的所述漏极之间的去往所述混频器的第二输出。
9.如权利要求7所述的CGCS跨导级,其特征在于,还包括:
第一电感器,其被耦合在所述第三晶体管的所述源极与接地端子之间;以及
第二电感器,其被耦合在所述第四晶体管的所述源极与所述接地端子之间。
10.如权利要求7所述的CGCS跨导级,其特征在于,所述第一和第二晶体管包括PMOS晶体管。
11.如权利要求7所述的CGCS跨导级,其特征在于,所述第三和第四晶体管包括NMOS晶体管。
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
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US74885405P | 2005-12-08 | 2005-12-08 | |
US60/748,854 | 2005-12-08 | ||
US11/470,556 US7801504B2 (en) | 2005-12-08 | 2006-09-06 | Common-gate common-source transconductance stage for RF downconversion mixer |
US11/470,556 | 2006-09-06 | ||
PCT/US2006/061819 WO2007117322A2 (en) | 2005-12-08 | 2006-12-08 | Common-gate common-source transconductance stage for rf downconversion mixer |
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CN101326710A true CN101326710A (zh) | 2008-12-17 |
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US7801504B2 (en) * | 2005-12-08 | 2010-09-21 | Qualcomm Incorporated | Common-gate common-source transconductance stage for RF downconversion mixer |
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US8731506B2 (en) * | 2008-07-28 | 2014-05-20 | Marvell World Trade Ltd. | Complementary low noise transductor with active single ended to differential signal conversion |
WO2011152896A1 (en) * | 2010-02-12 | 2011-12-08 | Newlans, Inc. | Broadband analog radio-frequency components |
WO2012061385A1 (en) | 2010-11-01 | 2012-05-10 | Newlans, Inc. | Method and apparatus for power amplifier linearization |
WO2012064551A2 (en) | 2010-11-08 | 2012-05-18 | Newlans, Inc. | Field programmable analog array |
EP2582042B1 (en) * | 2011-10-13 | 2016-04-20 | ST-Ericsson SA | A low-noise amplifier circuit |
KR20150053784A (ko) | 2012-09-05 | 2015-05-18 | 뉴랜스, 인코포레이티드. | 바이쿼드 캘리브레이션 |
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2006
- 2006-09-06 US US11/470,556 patent/US7801504B2/en active Active
- 2006-12-08 CN CN2006800464442A patent/CN101326710B/zh active Active
- 2006-12-08 JP JP2008544671A patent/JP4875104B2/ja not_active Expired - Fee Related
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JP2011182430A (ja) | 2011-09-15 |
JP4875104B2 (ja) | 2012-02-15 |
US20100323655A1 (en) | 2010-12-23 |
EP1958327A2 (en) | 2008-08-20 |
JP2009518983A (ja) | 2009-05-07 |
WO2007117322A2 (en) | 2007-10-18 |
CN101326710B (zh) | 2011-09-21 |
KR20080078881A (ko) | 2008-08-28 |
US20070146071A1 (en) | 2007-06-28 |
KR100988181B1 (ko) | 2010-10-18 |
US8401510B2 (en) | 2013-03-19 |
EP1958327B1 (en) | 2018-02-21 |
US7801504B2 (en) | 2010-09-21 |
JP5301606B2 (ja) | 2013-09-25 |
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