CN101325201B - Array substrate structure of transparent film transistor and manufacturing method thereof - Google Patents

Array substrate structure of transparent film transistor and manufacturing method thereof Download PDF

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CN101325201B
CN101325201B CN200710118879XA CN200710118879A CN101325201B CN 101325201 B CN101325201 B CN 101325201B CN 200710118879X A CN200710118879X A CN 200710118879XA CN 200710118879 A CN200710118879 A CN 200710118879A CN 101325201 B CN101325201 B CN 101325201B
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transparent
active layer
semiconductor active
electrode
grid line
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CN101325201A (en
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龙春平
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BOE Technology Group Co Ltd
Gaochuang Suzhou Electronics Co Ltd
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Beijing BOE Optoelectronics Technology Co Ltd
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Abstract

The invention discloses an array substrate structure composed of a transparent thin-film transistor, which comprises a substrate; a grid line formed on the substrate; a transparent grid electrode formed on the substrate and partially covering the grid line; a grid electrode insulating layer formed on the grid line, the grid electrode and the substrate; a transparent semiconductor active layer formed on the grid electrode insulating layer; a data line formed on the transparent semiconductor active layer, which is crossed over with the grid line to define a pixel unit, and part of which is positioned on the semiconductor active layer corresponding to the grid electrode to form a source electrode of the thin-film transistor; and a passivation layer formed above the transparent semiconductor active layer on the upper side of the data line and the grid line. The invention also discloses a manufacturing method of the array substrate structure. The inventive array substrate structure can improve the aperture opening ratio of display devices, so as to achieve display with higher brightness and contrast.

Description

A kind of array base-plate structure of transparent film transistor and manufacture method thereof
Technical field
The present invention relates to the structure and the manufacture method thereof of thin film transistor LCD device, relate in particular to array base-plate structure and manufacture method thereof that a kind of transparent film transistor forms.
Background technology
Because the weight of liquid crystal display device is low, volume thin and power consumption is little, it is just developing into display device of future generation.LCD is a kind of display device of non-radiation type, has optically anisotropic liquid crystal molecule and is sandwiched between array base palte and the color membrane substrates display image by the difference of refraction coefficient.Because the superiority and the high definition of its display quality, active matrix liquid crystal display develops into device commonly used.Active matrix liquid crystal display has a thin-film transistor as switching device in each pixel, use an electrode to carry out ON state and OFF state control, and another electrode is as public electrode.
Shown in Figure 1 is the vertical view of a kind of thin-film transistor and array base palte.The array base palte of this kind back of the body raceway groove corrosion bottom grating structure mainly is made up of thin-film transistor, pixel electrode 10, grid line 1 and data wire 5.Thin-film transistor is made up of gate electrode 2, gate insulator 4, semiconductor active layer 3 and source electrode 6, drain electrode 7.Gate electrode 2 directly is connected with grid line 1, and source electrode 6 directly is connected with data wire 5.A part of lug boss 11 of grid line 1 is overlapping with pixel electrode 10, forms storage capacitance together.One deck passivation protection film 8 covers the array base palte surface, and the drain electrode 7 of thin-film transistor is connected with ITO pixel electrode 10 by the via hole 9 of passivation layer 8.Grid line 1 provides the sweep signal of gate electrode 2 to open or close thin-film transistor, the pixel electrode 10 that the raceway groove of the data-signal that data wire 5 provides source electrode 6 by thin-film transistor is transferred to drain electrode 7 and is attached thereto.
Above-mentioned array base palte can be by the traditional 5Mask fabrication techniques shown in Fig. 2 a to 2e.Deposition layer of copper metallic film on glass substrate uses the gate mask version to form gate electrode 2 and lead-in wire grid line 1 thereof by wet etching method, and cross section is shown in Fig. 2 a; Successive sedimentation gate insulator 4 and semiconductor active layer film on gate metal use the active layer mask to form the semiconductor active layer 3 of thin-film transistor, and cross section is shown in Fig. 2 b; Metallic film is leaked in deposition one deck source, uses the source-drain electrode mask to form source, drain electrode 6,7 and data wire 5, and cross-sectional view is shown in Fig. 2 c; Deposition one deck passivation protection film uses the passivation layer mask to form passivation layer 8 and via hole 9 thereof, and cross section is shown in Fig. 2 d; Deposition layer of transparent conductive film uses the pixel electrode mask to form pixel electrode 10, and cross-sectional view is shown in Fig. 2 e.
Thin-film transistor in the liquid crystal display device adopts amorphous silicon as active layer usually, and silicon nitride is as gate insulator.Because amorphous silicon can form by the plasma reinforced chemical vapour deposition method in the temperature below 400 ℃, can on glass substrate, form the active layer of thin-film transistor.Amorphous silicon and silicon nitride that chemical vapour deposition (CVD) forms have good interface state property matter, and the electron mobility of amorphous silicon reaches 0.5cm simultaneously 2/ Vsec satisfies the signal transmission of array base palte and the charging of pixel electrode.So amorphous silicon film transistor obtains using very widely in LCD, the liquid crystal display device of present various sizes, comprise mobile phone screen and palmtop PC screen below 10 inches, 14 inches to 30 inches notebook and computer screen, and the large scale liquid crystal TV more than 20 inches, all use the switch control device of amorphous silicon film transistor as display pixel.
But it is, more and more higher for the performance requirement of liquid crystal display device along with popularizing of flat panel display product.Liquid crystal display device especially LCD TV just develops towards the direction of high brightness and high-contrast, and the improvement of backlight and colored filter can improve the brightness and contrast, but has increased material cost and manufacturing cost simultaneously.The variation of dot structure design and the use of new material are the another kind of approach that improves the brightness and contrast.Traditional amorphous silicon film transistor makes the pixel region area reduce because active layer partly is lighttight, causes pixel aperture ratio to descend, and reduces the brightness and contrast.Display device is swift and violent at high picture quality and high definition development in recent years, requires elemental area to reduce.In the liquid crystal display device that amorphous silicon film transistor drives, because amorphous silicon material has light sensitive characteristic, make the film crystal tube portion can not accept rayed, the design of colored filter and array base palte need prevent that illumination is mapped to thin-film transistor, to guarantee the accurate work of thin-film transistor.Amorphous silicon absorbs visible light on the other hand, can't realize that illumination passes through the dot structure of film crystal tube portion.Along with the minimizing of pixel region area, pixel aperture ratio (pixel electrode part contrasts lighttight amorphous silicon film transistor part) descends and causes the problem of light transmittance reduction and picture blackening, also increases power consumption simultaneously.
Summary of the invention
The objective of the invention is defective at the low aperture opening ratio of prior art, the array base palte that provides a kind of transparent film transistor to form, the aperture opening ratio of raising display device is realized more high brightness and the more demonstration of high-contrast.The invention provides a kind of simple manufacturing method and realize that the aforementioned display device part comprises the array base palte that thin-film transistor forms, and cuts down the consumption of energy.
To achieve these goals, the invention provides a kind of array base-plate structure of transparent film transistor, comprising:
One substrate;
One grid line is formed on the described substrate;
One transparent gate electrode is formed on the described substrate, and part covers described grid line;
One gate insulator is formed on described grid line, gate electrode and the substrate;
One transparent semiconductor active layer is formed on the described gate insulator, and the material of described transparent semiconductor active layer is a zinc oxide;
One data wire is formed on the described transparent semiconductor active layer, intersect with described grid line to define a pixel cell, and data wire partly is positioned on the transparent semiconductor active layer of described gate electrode correspondence the source electrode of formation thin-film transistor;
One pixel electrode, be formed at the pixel cell zone of described data wire and described grid line intersection definition, and part is positioned on the transparent semiconductor active layer of described gate electrode top, constitute the drain electrode of thin-film transistor, the material of described pixel electrode comprises tin indium oxide, indium zinc oxide or indium oxide;
One passivation layer is formed on the transparent semiconductor active layer of described data wire and grid line part top.
In the such scheme, described transparent semiconductor active layer covers whole described gate insulators or only covers the gate insulator on described transparent gate electrode top.The material of described gate electrode is tin indium oxide, indium zinc oxide or indium oxide etc.Described grid line and described data wire are preferably the metallic film of molybdenum/aluminium neodymium/molybdenum, aluminium neodymium/molybdenum, molybdenum/aluminium/molybdenum, aluminium/molybdenum etc. or the composite construction of metallic film.This array structure also can comprise a transparent common electrode, is formed on the described substrate, is positioned at the middle part of described pixel cell, and the material of transparent common electrode is tin indium oxide, indium zinc oxide or indium oxide etc.
To achieve these goals, the present invention provides a kind of manufacture method of array base-plate structure of transparent film transistor simultaneously, comprising:
One substrate is provided;
On described substrate, form grid line;
On described substrate and grid line, form transparent gate electrode, wherein make transparent gate electrode partly cover described grid line;
On described substrate, grid line and gate electrode, form gate insulator;
On described gate insulator, form the transparent semiconductor active layer, the material of described transparent semiconductor active layer is a zinc oxide;
On described transparent semiconductor active layer, form data wire, and data wire partly is positioned on the transparent semiconductor active layer of described gate electrode correspondence, constitute the source electrode of thin-film transistor;
On the semiconductor active layer of described data wire and grid line correspondence partly, form the passivation protection film; On described semiconductor active layer, between the passivation protection film, form pixel electrode, the partial pixel electrode is formed on the transparent semiconductor active layer of gate electrode correspondence, the material of described pixel electrode comprises tin indium oxide, indium zinc oxide or indium oxide.
In the such scheme, the transparent semiconductor active layer of described formation makes its gate insulator that all covers described formation, also can make it only cover the gate insulator of the transparent gate electrode top of described formation.Can also when forming transparent gate electrode, form transparent common electrode simultaneously.The material of transparent gate electrode of described formation and transparent common electrode is tin indium oxide, indium zinc oxide or indium oxide.When the transparent gate electrode of described formation, form transparent common electrode simultaneously.Described formation transparent semiconductor active layer is to form by magnetron sputtering, and sputter vacuum degree is in 10Pa, and substrate temperature is between 20 ℃ to 250 ℃, and the mist that uses argon gas and oxygen is as the bombarding ion carrier gas.Described formation grid line can be identical with the method that forms data wire.Described formation gate insulator can be identical with the method that forms the passivation protection film.The transparent gate electrode of described formation can be identical with the method that forms pixel electrode.
With respect to prior art, the array base-plate structure that the present invention forms by a kind of clear films transistor that provides, effectively reduce the light tight area of pixel region, improved pixel aperture ratio, be applicable to the large scale liquid crystal TV screen that requires high brightness and high-contrast.The present invention has simultaneously effectively reduced the area in the light tight zone of pixel region by a kind of array base-plate structure with transparent common electrode is provided, and has improved pixel aperture ratio, is applicable to the large scale liquid crystal TV screen that requires high brightness and high-contrast.Moreover the present invention forms the manufacture method of the zinc oxide thin-film transistor with transparent common electrode by a kind of 5 photoetching processes are provided, equipment identical and similar manufacturing process be can use, development cost and manufacturing cost reduced with existing amorphous silicon film transistor technology.
Below in conjunction with the drawings and specific embodiments the present invention is further illustrated in more detail.
Description of drawings
Fig. 1 is the vertical view of single dot structure on the prior art TFT-LCD array base palte;
Fig. 2 a is that prior art forms behind gate electrode and the grid line A-A position cross-sectional view among Fig. 1;
Fig. 2 b is that prior art forms behind gate insulator and the active layer A-A position cross-sectional view among Fig. 1;
Fig. 2 c is that prior art forms behind data wire and the source-drain electrode A-A partial cross sectional view among Fig. 1;
Fig. 2 d is that prior art forms after the passivation layer via hole A-A position cross-sectional view among Fig. 1;
Fig. 2 e is that prior art forms behind the pixel electrode A-A position cross-sectional view among Fig. 1;
Fig. 3 is the vertical view of single dot structure on the array base palte that forms of specific embodiment of the invention transparent film transistor device;
Fig. 4 a is the cross-sectional view of specific embodiment of the invention Fig. 3 along the B-B position;
Fig. 4 b is the cross-sectional view of specific embodiment of the invention Fig. 3 along the C-C position;
Fig. 5 a is the single pixel vertical view after manufacture method of the present invention forms grid line and transparent grid electrode;
Fig. 5 b is that manufacture method of the present invention forms Fig. 5 a after grid line and the transparent grid electrode along the cross-sectional view at B-B position;
Fig. 5 c is that manufacture method of the present invention forms Fig. 5 a after grid line and the transparent grid electrode along the cross-sectional view at C-C position;
Fig. 6 a is the single dot structure vertical view after manufacture method of the present invention forms gate insulator, ZnO layer and data wire;
Fig. 6 b is the cross-sectional view along B-B position among Fig. 6 a after manufacture method of the present invention forms gate insulator, ZnO layer and data wire;
Fig. 6 c is the cross-sectional view along C-C position among Fig. 6 a after manufacture method of the present invention forms gate insulator, ZnO layer and data wire;
Fig. 7 a is the vertical view of the single dot structure behind the manufacture method formation passivation protection film of the present invention;
Fig. 7 b is the cross-sectional view along B-B position among Fig. 7 a after manufacture method of the present invention forms the passivation protection film;
Fig. 7 c is the cross-sectional view along C-C position among Fig. 7 a after manufacture method of the present invention forms the passivation protection film;
The cross-sectional view at Fig. 8 a B-B position that is another specific embodiment of the present invention in Fig. 3;
The cross-sectional view at Fig. 8 b C-C position that is another specific embodiment of the present invention in Fig. 3;
Fig. 9 a is that another manufacture method of the present invention forms behind gate insulator, ZnO layer and data wire the cross-sectional view along B-B position among Fig. 6 a;
Fig. 9 b is that another manufacture method of the present invention forms behind gate insulator, ZnO layer and data wire the cross-sectional view along C-C position among Fig. 6 a.
Mark among the figure: 1, grid line; 2, gate electrode; 3, semiconductor active layer; 4, gate insulator; 5, data wire; 6, source electrode; 7, drain electrode; 8, passivation layer; 9, via hole; 10, pixel electrode; 11, grid protuberance; 12, transparent gate electrode; 13, transparent common electrode; 15, zinc-oxide film; 16, the conducting channel of thin-film transistor.
Embodiment
Describe specific embodiments of the invention in detail below in conjunction with accompanying drawing.It is to be noted that each layer film thickness and area size shape in the accompanying drawing do not reflect the true ratio of device architecture, just for illustrative content of the present invention clearly.
Specific embodiment 1
Shown in Figure 3 is the vertical view of a pixel cell of the array base palte that forms of a kind of zinc oxide thin-film transistor of the present invention; Fig. 4 a and Fig. 4 b are respectively the cross-sectional views at film transistor device B-B position and C-C position.In conjunction with Fig. 3, Fig. 4 a and Fig. 4 b, this pixel cell comprises as can be seen: transparency carrier, the grid line 1 that the layer of metal film constitutes, the data wire 5 that the layer of metal film constitutes, cross one another grid line 1 and pixel cell of data wire 5 definition.Each pixel cell comprises: a film transistor device, a pixel electrode 10.Wherein, thin-film transistor is formed at the intersection of grid line 1 and data wire 5, and it comprises that one is formed at transparent gate electrode 12 on the grid line 1, one as the data wire 5 of thin-film transistor source electrode, a semiconductor active layer and the gate insulator 4 that the pixel electrode 10 as the thin-film transistor drain electrode, one deck zinc-oxide film 15 constitute.
Wherein, transparency carrier can be insulation or conduction, can be amorphous state or crystalline state.A kind of transparency carrier of first-selection is the amorphous glass substrate of insulation, is widely used in liquid crystal display device.Other transparency carrier also comprises transparent inorganic material as quartz, sapphire, magnesium oxide etc., perhaps polymer-based plates such as transparent organic material such as macromolecule resin, epoxy resin, polyethylene.Wherein the metal material of grid line 1 can be identical with the grid line metal material of existing amorphous silicon film transistor, from electric conducting materials such as molybdenum, aluminium, aluminium neodymium alloy, chromium, titanium, copper, select, the metal material of first-selected grid line 1 is the complex thin film structure of molybdenum, aluminium neodymium alloy, the formation of molybdenum three-layer thin-film, secondly is aluminium neodymium alloy, the film formed complex thin film structure of molybdenum two layers of thin.The metal material of data wire 5 also can be identical with the grid line metal material of existing amorphous silicon film transistor, from electric conducting materials such as molybdenum, aluminium, aluminium neodymium alloy, chromium, titanium, copper, select, the metal material of preference data line 5 is molybdenum films, secondly is the complex thin film structure of molybdenum, aluminium neodymium alloy, the formation of molybdenum three-layer thin-film.The difference of thin-film transistor of the present invention and traditional amorphous silicon film transistor is, directly uses the drain electrode of pixel electrode 10 as thin-film transistor, and the transparent gate electrode 12 of use and the formation of pixel electrode materials similar.The part of data wire 5 is positioned on the transparent gate electrode 12 fully, form the source electrode of thin-film transistor, the part of pixel electrode 10 is positioned on the transparent gate electrode 12, form the drain electrode of thin-film transistor, by the part of the transparent gate electrode 12 of data wire 5 and pixel electrode 10 coverings, its corresponding zinc-oxide film 15 does not constitute the conducting channel 16 of thin-film transistors.Another characteristics of thin-film transistor of the present invention are to use transparent conductive material to form the public electrode 13 of pixel storage capacitor, transparent common electrode 13 is positioned at the pixel middle part, constitute storage capacitance with pixel electrode 10, the storage capacitance medium is zinc-oxide film 15 and gate insulator 4.The material of transparent common electrode 13, transparent gate electrode 12 and pixel electrode 10 can be identical or similar, selects from materials such as indium zinc oxide, tin indium oxide, indium oxide, and first-selected transparent electrode material is the amorphous state tin indium oxide.Gate insulator 4 can be the gate insulator layer material silicon nitride of traditional amorphous silicon film transistor, and also can select from subordinate's material: aluminium oxide titanium, silicon dioxide, aluminium oxide, hafnium oxide etc., first-selected grid insulating film is a silicon nitride.Transparent semiconductor active layer of the present invention, at first be zinc-oxide film, because zinc oxide can form crystalline film in the temperature below 200 ℃, it can be formed on and comprise monocrystalline silicon and amorphous glass on the various substrates, with respect to the nitride of high temperature film forming, have more production cheaply.In addition, the zinc oxide (ZnO) that has 80% above transmitance in visible wavelength range is a kind of excellent material of making the transparent semiconductor device, and it has 3.4 electron-volts the direct energy gap that can be with.Mode as an alternative, the transparent semiconductor active layer also can also be made of general transparent metal oxide film or metal nitride, requires to have the bandwidth of broad and higher electron mobility.Bandwidth decision metal oxide is transparent for visible light, and does not absorb visible light, the feasible metal oxide not occurrence features deterioration under illumination that constitutes thin film transistor active layer.The transistorized current characteristics of electron mobility decision transparent metal oxide film, and the ratio of the ON state of thin-film transistor and off-state current are realized the high ON state current under the low-voltage, cut down the consumption of energy.Further, higher electron mobility is for being absolutely necessary at integrated drive electronics on glass.
Fig. 4 a and Fig. 4 b are respectively the cross-sectional view of film transistor device and the cross-sectional view of transparent common electrode.Shown in Fig. 4 a, on glass substrate, there is a layer thickness to constitute grid line 1 at the metallic film of 100 to 500 nanometers, constitute transparent gate electrode 12 at the transparent conductive film that has a layer thickness on the grid line 1 between 10 to 200 nanometers, transparent gate electrode 12 just in time covers metal grid lines 1, and its marginal portion is consistent with the edge of grid line 1.On the other parts of transparent gate electrode 12 and glass substrate, there is a layer thickness to constitute gate insulator 4 at the transparent insulation film of 100 to 1000 nanometers, except that the grid line pin of outside circuit, it covers whole transparent grid lines 1, gate electrode 12 and glass substrate.On gate insulator 4, the zinc-oxide film 15 of a layer thickness in 100 to 500 nanometers arranged, constitute the semiconductor active layer of thin-film transistor, it forms the conducting channel 16 of thin-film transistor.On zinc-oxide film 15 corresponding to the marginal portion of transparent gate electrode 12, the metallic film composition data line 5 of one layer thickness in 100 to 500 nanometers arranged, on zinc-oxide film 15,, there be the transparent conductive film of a layer thickness between 10 to 500 nanometers to constitute pixel electrode 10 corresponding to the core of transparent gate electrode 12.As shown in Figure 3, pixel electrode 10 covers pixel regions, and align with grid line 1 in its marginal portion and data wire 5 keeps 1 to 20 micron spacing, and the zinc-oxide film 15 between pixel electrode 10 and the data wire 5 forms the conducting channel 16 of thin-film transistors.Covering the insulation film formation passivation layer 8 of a layer thickness between 100 to 500 nanometers on zinc-oxide film 15 and the data wire 5, there is not passivation layer 8 on the pixel electrode 10.Pixel electrode 10 and data wire 5, transparent gate electrode 12 and the zinc-oxide film between them 15, gate insulator 4 common formation thin-film transistors, the opening and closing of control pixel, the part of pixel electrode 10 forms the drain electrode of thin-film transistor, and the part of data wire 5 forms the source electrode of thin-film transistor.
Shown in Fig. 4 b, on glass substrate, there is a layer thickness to constitute grid line 1 at the metallic film of 100 to 500 nanometers, constitute transparent gate electrode 12 at the transparent conductive film that has a layer thickness on the grid line 1 between 10 to 200 nanometers, on this part, form grid line 1 and the zinc oxide thin-film transistor shown in the earlier figures 4a.On the glass substrate of another part, there be the transparent conductive film of a layer thickness between 10 to 500 nanometers to constitute transparent common electrode 13, the same with shown in Fig. 4 a, transparent common electrode 13 is positioned at the pixel region mid portion and grid line 1 is configured in parallel, live width is to the length in pixels from 5 microns, at regular intervals with data wire 1 and transparent gate electrode 12, in the distance more than 10 microns to guarantee yields.The gate insulator 4 of one layer thickness in the transparent insulation film formation of 100 to 1000 nanometers arranged on transparent common electrode 13, on gate insulator 4, the zinc-oxide film 15 of the semiconductor active layer of the formation thin-film transistor of a layer thickness between 50 to 500 nanometers is arranged.On zinc-oxide film 15 corresponding to the marginal portion of pixel electrode 10, the metallic film composition data line 5 of one layer thickness in 100 to 500 nanometers arranged, on zinc-oxide film 15,, the pixel electrode 10 of the transparent conductive film formation of a layer thickness between 10 to 500 nanometers is arranged corresponding to the part of pixel region.Pixel electrode 10 and corresponding transparent common electrode 13 thereof, and the zinc-oxide film between the two 15, gate insulator 4 constitute the storage capacitance of pixel.Shown in Fig. 4 b, data wire 5 and transparent common electrode 13 have part to intersect, the zinc-oxide film 15 of they and cross section, gate insulator 4 constitute the parasitic capacitance of pixels, work for thin-film transistor has negative effect, therefore the live width of data wire 5 is more little, help the influence of deflate parasitic capacitance more, also help improving aperture ratio of pixels.Cover the insulation film of a layer thickness between 100 to 500 nanometers on the data wire 5 and form passivation layer 8, be distributed between data wire 5 and the pixel electrode 10, also be distributed between the adjacent pixel electrodes 10.
Characteristics of the present invention are to use the semiconductor active layer of transparent material such as zinc oxide as thin-film transistor, can accept illumination and do not damage the operating characteristic of thin-film transistor, also can see through the incident light more than 80%.Another characteristics of the present invention are to use tin indium oxide or indium zinc oxide gate electrode and the drain electrode as thin-film transistor, the part of pixel electrode is positioned on the transparent gate electrode, form transparent drain electrode, because the transparency of tin indium oxide or indium zinc oxide, make and effectively increased elemental area by the same complete printing opacity of thin-film transistor with pixel electrode.The 3rd characteristics of the present invention are to use same material to form the source electrode of thin-film transistor and the data wire of array base palte, and the part that is positioned at the data wire on the transparent gate electrode forms the source electrode of thin-film transistor, and it is positioned at beyond the pixel region.The present invention also can be further, at pixel region storage capacitance is set, and the electrode of storage capacitance constitutes by transparent material, its upper electrode is a pixel electrode, its underpart electrode is that the same material with transparent gate electrode constitutes public electrode, forms transparent storage capacitance.The storage capacitance lower electrode of traditional array substrate is made of the same material with metal grid lines, makes that the storage capacitance part can not printing opacity.Because the semiconductor active layer of thin-film transistor of the present invention does not absorb visible light, does not need to form light barrier layer (the black matrix part in the display device of traditional amorphous silicon film transistor), the operating characteristic of thin-film transistor is not influenced by transmitted light.Therefore, the display device that thin-film transistor of the present invention constitutes, its pixel cell has less lightproof part, and higher light transmittance is arranged, and pixel has high aperture opening ratio, so display device has higher brightness and contrast, and picture quality is better.On the other hand, transparent film transistor forms the more dot structure of high aperture, makes pixel design to develop towards the direction that reduces elemental area, can form more pixel cell on array base palte, makes to have the more display device of high definition.
The process for making and the method for zinc oxide thin-film transistor and array base palte thereof are described in detail in detail below.
At first, pass through the metallic film composite construction of magnetron sputtering deposition one layer thickness on the surface of whole glass substrate in 100 nanometer to 500 nanometers, it generally is molybdenum/aluminium neodymium/molybdenum, perhaps aluminium neodymium/molybdenum, perhaps molybdenum/aluminium/molybdenum, the thickness of molybdenum film generally is between 10 nanometer to 100 nanometers, and the thickness of aluminum metal film or aluminium neodymium metallic film is generally between 100 nanometer to 500 nanometers.The metallic film sputter generally is that the vacuum below 10Pa is carried out, and sputtering power is generally between 0.5 to 50 watt/square centimeter.The sputter of composite metal film is generally installed two metal targets at a sputter vacuum chamber and is realized successive sedimentation.When sputtering equipment forms composite metal film, the general argon gas that uses is as the bombarding ion carrier gas, gas flow and sputter energy depend on the size of sputter vacuum chamber and target and glass substrate, for five generation glass substrates of 1100 millimeters x1300 millimeters, argon flow amount during the sputter of grid line metallic film is (per minute standard cubic centimeter) between 10sccm to 500sccm, and the plasma power during sputter is between 10 kilowatts to 500 kilowatts.Form the photoresist that one deck has the grid line pattern by photoetching process on grid line metallic film surface, utilize the mask of photoresist as etching, the unnecessary metallic film of erosion removal in by the mixed liquor of acetic acid, nitric acid, phosphoric acid and other additive, in the stripper that contains isopropyl alcohol alcohol, remove photoresist again, form metal grid lines 1 by high pressure and spray pressure.When using different metal material to form grid line, also can use different corrosive liquids, as hydrogen peroxide, sulfuric acid, ferric acid solution etc.Identical therewith stripper and the stripping means of the general employing of the removal of photoresist in the subsequent process steps.On the glass substrate that forms grid line 1, by the mode of similar grid line metallic film sputter, deposit the transparent conductive film of a layer thickness between 10 nanometer to 200 nanometers, first-selected transparent conductive film is indium zinc oxide or tin indium oxide.Membrance casting condition such as vacuum degree and sputtering power and grid line deposit metal films condition are similar, just in bombarding ion carrier gas such as argon gas, add minor amounts of oxygen or steam, the flow (per minute standard cubic centimeter) between 0.1sccm to 10sccm of general oxygen or steam, by with preceding similar photoetching and etching process, transparent gate electrode 12 and the transparent common electrode 13 of formation shown in Fig. 5 a to 5c, transparent common electrode 13 is between adjacent grid line 1, and the part of transparent gate electrode 12 covers grid line 1.The corrosive liquid first-selection of indium zinc oxide or tin indium oxide generally is the mixed liquor of hydrochloric acid and acetic acid, also can be the acid solution of sulfuric acid or iron.
Subsequently, utilize the method for plasma enhanced chemical vapor deposition, deposit 100 nanometers constitute the gate insulator 4 shown in Fig. 6 b and 6c to the silicon nitride film of 1000 nanometers on substrate, and the gate insulator layer material also can use silica and silicon oxynitride etc.General methane, ammonia, nitrogen, the hydrogen of using forms silicon nitride film as reacting gas, the vacuum degree of film forming vacuum chamber is generally between 1 holder is held in the palm to 10, generally between 300 ℃ to 400 ℃, plasma power is generally between 0.05 to 0.5 watt/square centimeter for substrate temperature.Gas flow and plasma power changed according to production line generation and glass size.The method that also can use magnetron sputtering is more than the vacuum of 100 millitorrs, as the argon gas that feeds 10 to 500sccm (per minute standard cubic centimeters) is as the bombarding ion carrier gas, suitably add minor amounts of oxygen (as 1 to 10sccm), form the aluminum oxide film of thickness between 100 nanometer to 1000 nanometers, constitute the gate insulator 14 shown in Fig. 6 b and 6c.Utilize the method for magnetron sputtering, on gate insulator 4, form the zinc-oxide film 15 of a layer thickness, constitute the thin film transistor active layer shown in Fig. 6 b and 6c in 50 to 500 nanometers.The vacuum degree of sputtering chamber is more than 100 millitorrs, substrate temperature is controlled between 20 ℃ to 250 ℃, the mist that uses argon gas and oxygen is as the bombarding ion carrier gas, and sputtering power changes according to the size of glass substrate, generally between 0.1 to 50 watt/square centimeter.The interfacial characteristics of gate insulator 4 and zinc-oxide film 15 has considerable influence for the operating characteristic of thin-film transistor, generally in technical process, can increase the hydrogen plasma treatment step, in and dangling bonds with passivation interface, as before or after chemical vapour deposition (CVD) or magnetron sputtering, feed hydrogen to vacuum chamber and load certain power, carry out 1 second to 1000 seconds plasma bombardment.Method by magnetron sputtering on zinc-oxide film 15, forming metallic film or the metallic film composite construction of a layer thickness between 100 nanometer to 500 nanometers, generally is molybdenum/aluminium neodymium/molybdenum, perhaps molybdenum, perhaps molybdenum/aluminium/molybdenum, membrance casting condition and grid line metallic film formation condition are similar.By with grid line 1 similar manufacture method and process conditions and corrosive liquid, form data wire 5 shown in Fig. 6 a to 6c by photoetching and corrosion.
At last, use the method for plasma enhanced chemical vapor deposition, deposit 100 nanometers form passivation protection film 8 shown in Fig. 7 b and 7c to the silicon nitride film of 1000 nanometers by photoetching and dry etching on substrate.The sedimentary condition of the membrance casting condition of passivation protection film 8 and gate insulator silicon nitride film is similar; its dry etching can use the mist of sulphur hexafluoride, oxygen and helium; feed the etching chamber of vacuum degree between 10 to 500 millitorrs; between 20 ℃ to 100 ℃ temperature; erosion removal is not subjected to the passivation protection film 8 of photoresist protection, forms the pattern shown in Fig. 7 a to 7c.Use is similar to film build method and the process conditions and the raw material of transparent gate electrode 12 and transparent common electrode 13, form the transparent conductive film of a layer thickness between 10 to 500 nanometers in sputter on the substrate, as tin indium oxide or indium zinc oxide, by being similar to the lithography corrosion process and the corrosive liquid of transparent gate electrode 12 and transparent common electrode 13, form thin-film transistor and dot structure shown in Fig. 3, Fig. 4 a and Fig. 4 b.
A kind of zinc oxide thin-film transistor provided by the invention and array base palte effectively reduce the light tight area of pixel region, have improved pixel aperture ratio, are applicable to the large scale liquid crystal TV screen that requires high brightness and high-contrast.The invention provides a kind of array base palte, effectively reduce the light tight area of pixel region, improved pixel aperture ratio, be applicable to the large scale liquid crystal TV screen that requires high brightness and high-contrast with transparent common electrode.The invention provides the manufacture method that a kind of 5 photoetching processes form the zinc oxide thin-film transistor with transparent common electrode, equipment identical and similar manufacturing process be can use, development cost and manufacturing cost reduced with existing amorphous silicon film transistor technology.
Specific embodiment 2
In the present embodiment, the semiconductor active layer 15 that the transparent oxide of pixel region constitutes is removed, and the pixel electrode 10 of transparent metal oxide is formed on the gate insulator 4.Shown in Figure 3 is the vertical view of a pixel cell on the array base palte of present embodiment; Fig. 8 a and Fig. 8 b are respectively the cross-sectional view of film transistor device and the cross-sectional view of transparent common electrode.Be with specific embodiment 1 difference: shown in Fig. 8 a, the semiconductor active layer 15 that transparent oxide constitutes only is formed on the gate insulator 4 of transparent gate electrode 12 parts; And the semiconductor active layer 15 that the transparent oxide in the specific embodiment 1 constitutes is formed on whole gate insulators 4.Shown in Fig. 8 b, pixel electrode 10 is formed on the gate insulator 4, and data wire 5 is formed on the gate insulator 4, is formed on the gate insulator 4 at the passivation layer between the adjacent pixel electrodes 10 8; Be with the dot structure difference of specific embodiment 1: the semiconductor active layer that these regional transparent oxides constitute is removed.
Compare the processing step that the array base palte manufacturing process of this specific embodiment is increased with the manufacturing process of aforementioned specific embodiment 1.Use the method identical to form grid line 1, transparent gate electrode 12, gate insulator 4 and transparent oxide semiconductor active layer 15 with aforementioned specific embodiment.After forming zinc-oxide film 15 by magnetron sputtering, form the photoresist that one deck has semiconductor active layer isolated island pattern by photoetching process on zinc-oxide film 15 surfaces, be that photoresist only covers the zinc-oxide film on the transparent gate electrode 12, other parts such as pixel zone and data wire zone then do not have photoresist.Utilize the mask of photoresist as etching, the zinc-oxide film that erosion removal exposes in by the mixed liquor of acetic acid, nitric acid, phosphoric acid and other additive, the perhaps zinc-oxide film that erosion removal exposes in the mixed liquor of acetic acid, hydrochloric acid and other additive, in the stripper that contains isopropyl alcohol alcohol, remove photoresist again, form the semiconductor active layer isolated island by high pressure and spray pressure.Use the method identical with aforementioned specific embodiment to form data wire 5 afterwards, the sectional view of this moment is shown in Fig. 9 a and Fig. 9 b; Use the method identical to form passivation layer 8 and pixel electrode 10 at last with aforementioned specific embodiment.
It should be noted that at last, above embodiment is only unrestricted in order to technical scheme of the present invention to be described, although the present invention is had been described in detail with reference to preferred embodiment, those of ordinary skill in the art is to be understood that, can use different materials and equipment to realize it as required, promptly can make amendment or be equal to replacement, and not break away from the spirit and scope of technical solution of the present invention technical scheme of the present invention.

Claims (16)

1. the array base-plate structure of a transparent film transistor is characterized in that, comprising:
One substrate;
One grid line is formed on the described substrate;
One transparent gate electrode is formed on the described substrate, and part covers described grid line;
One gate insulator is formed on described grid line, gate electrode and the substrate;
One transparent semiconductor active layer is formed on the described gate insulator, and the material of described transparent semiconductor active layer is a zinc oxide;
One data wire is formed on the described transparent semiconductor active layer, intersect with described grid line to define a pixel cell, and data wire partly is positioned on the transparent semiconductor active layer of described gate electrode correspondence the source electrode of formation thin-film transistor;
One pixel electrode, be formed at the pixel cell zone of described data wire and described grid line intersection definition, and part is positioned on the transparent semiconductor active layer of described gate electrode top, constitute the drain electrode of thin-film transistor, the material of described pixel electrode comprises tin indium oxide, indium zinc oxide or indium oxide;
One passivation layer is formed on the transparent semiconductor active layer of described data wire and grid line top.
2. array base-plate structure according to claim 1 is characterized in that: described transparent semiconductor active layer covers whole described gate insulators.
3. array base-plate structure according to claim 1 is characterized in that: described transparent semiconductor active layer only covers the gate insulator on described transparent gate electrode top.
4. array base-plate structure according to claim 1 is characterized in that: also comprise a transparent common electrode, be formed on the described substrate, be positioned at the middle part of described pixel cell.
5. array base-plate structure according to claim 4 is characterized in that: the material of described transparent common electrode is tin indium oxide, indium zinc oxide or indium oxide.
6. according to the arbitrary described array base-plate structure of claim 1 to 5, it is characterized in that: the material of described gate electrode is tin indium oxide, indium zinc oxide or indium oxide.
7. according to the arbitrary described array base-plate structure of claim 1 to 5, it is characterized in that: described grid line and described data wire are the metallic film of molybdenum/aluminium neodymium/molybdenum, aluminium neodymium/molybdenum, molybdenum/aluminium/molybdenum, aluminium/molybdenum or the composite construction of metallic film.
8. the manufacture method of the array base-plate structure of a transparent film transistor is characterized in that, comprising:
One substrate is provided;
On described substrate, form grid line;
On described substrate and grid line, form transparent gate electrode, wherein make transparent gate electrode partly cover described grid line;
On described substrate, grid line and gate electrode, form gate insulator;
On described gate insulator, form the transparent semiconductor active layer, the material of described transparent semiconductor active layer is a zinc oxide;
On described transparent semiconductor active layer, form data wire, and data wire partly is positioned on the transparent semiconductor active layer of described gate electrode correspondence, constitute the source electrode of thin-film transistor;
On the semiconductor active layer of described data wire and grid line correspondence partly, form the passivation protection film;
On described semiconductor active layer, between the passivation protection film, form pixel electrode, the partial pixel electrode is formed on the transparent semiconductor active layer of gate electrode correspondence, the material of described pixel electrode comprises tin indium oxide, indium zinc oxide or indium oxide.
9. manufacture method according to claim 8 is characterized in that: the transparent semiconductor active layer of described formation makes it all cover the gate insulator of described formation.
10. manufacture method according to claim 8 is characterized in that: the transparent semiconductor active layer of described formation makes it only cover the gate insulator of the transparent gate electrode top of described formation.
11. manufacture method according to claim 8 is characterized in that: when the transparent gate electrode of described formation, form transparent common electrode simultaneously.
12. manufacture method according to claim 11 is characterized in that: the material of transparent gate electrode of described formation and transparent common electrode is tin indium oxide, indium zinc oxide or indium oxide.
13. manufacture method according to claim 8, it is characterized in that: described formation transparent semiconductor active layer is to form by magnetron sputtering, sputter vacuum degree is in 10Pa, and substrate temperature is between 20 ℃ to 250 ℃, and the mist that uses argon gas and oxygen is as the bombarding ion carrier gas.
14. to 13 arbitrary described manufacture methods, it is characterized in that according to Claim 8: described formation grid line is identical with the method that forms data wire.
15. to 13 arbitrary described manufacture methods, it is characterized in that according to Claim 8: described formation gate insulator is identical with the method that forms the passivation protection film.
16. to 13 arbitrary described manufacture methods, it is characterized in that according to Claim 8: the transparent gate electrode of described formation is identical with the method that forms pixel electrode.
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