CN101317178A - 统计时序分析中关键度预测的系统和方法 - Google Patents
统计时序分析中关键度预测的系统和方法 Download PDFInfo
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- CN101317178A CN101317178A CNA2006800440965A CN200680044096A CN101317178A CN 101317178 A CN101317178 A CN 101317178A CN A2006800440965 A CNA2006800440965 A CN A2006800440965A CN 200680044096 A CN200680044096 A CN 200680044096A CN 101317178 A CN101317178 A CN 101317178A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/32—Circuit design at the digital level
- G06F30/33—Design verification, e.g. functional simulation or model checking
- G06F30/3308—Design verification, e.g. functional simulation or model checking using simulation
- G06F30/3312—Timing analysis
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2119/00—Details relating to the type or aim of the analysis or the optimisation
- G06F2119/12—Timing analysis or timing optimisation
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Evolutionary Computation (AREA)
- Geometry (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
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Abstract
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Claims (14)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/303,792 US7437697B2 (en) | 2005-12-16 | 2005-12-16 | System and method of criticality prediction in statistical timing analysis |
US11/303,792 | 2005-12-16 | ||
PCT/EP2006/069589 WO2007068690A1 (en) | 2005-12-16 | 2006-12-12 | System and method of criticality prediction in statistical timing analysis |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101317178A true CN101317178A (zh) | 2008-12-03 |
CN101317178B CN101317178B (zh) | 2010-07-21 |
Family
ID=37708166
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2006800440965A Expired - Fee Related CN101317178B (zh) | 2005-12-16 | 2006-12-12 | 统计时序分析中关键度预测的系统和方法 |
Country Status (6)
Country | Link |
---|---|
US (1) | US7437697B2 (zh) |
EP (1) | EP1969502B1 (zh) |
JP (1) | JP5004965B2 (zh) |
KR (1) | KR100998798B1 (zh) |
CN (1) | CN101317178B (zh) |
WO (1) | WO2007068690A1 (zh) |
Cited By (6)
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CN103403719A (zh) * | 2010-12-16 | 2013-11-20 | 辛奥普希斯股份有限公司 | 使用基于样本的静态时序基础结构的同步多角静态时序分析 |
CN108228919A (zh) * | 2016-12-09 | 2018-06-29 | 厦门紫光展锐科技有限公司 | 一种集成电路接口的时序生成方法及装置 |
CN108733832A (zh) * | 2018-05-28 | 2018-11-02 | 北京阿可科技有限公司 | 有向无环图的分布式存储方法 |
CN114239444A (zh) * | 2021-12-21 | 2022-03-25 | 东南大学 | 一种基于块的电路延时模型的建立方法 |
CN114818570A (zh) * | 2022-03-11 | 2022-07-29 | 西北工业大学 | 一种基于蒙特卡罗仿真的嵌入式系统时序分析方法 |
CN117574820A (zh) * | 2024-01-15 | 2024-02-20 | 中科亿海微电子科技(苏州)有限公司 | 一种增量时序分析方法 |
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JP4774294B2 (ja) * | 2005-12-26 | 2011-09-14 | 富士通株式会社 | 集積回路レイアウト装置、その方法及びプログラム |
US7480880B2 (en) * | 2006-02-21 | 2009-01-20 | International Business Machines Corporation | Method, system, and program product for computing a yield gradient from statistical timing |
JP4734141B2 (ja) * | 2006-02-28 | 2011-07-27 | 富士通株式会社 | 遅延解析プログラム、該プログラムを記録した記録媒体、遅延解析方法、および遅延解析装置 |
US7698674B2 (en) * | 2006-12-01 | 2010-04-13 | International Business Machines Corporation | System and method for efficient analysis of point-to-point delay constraints in static timing |
US8151229B1 (en) * | 2007-04-10 | 2012-04-03 | Cadence Design Systems, Inc. | System and method of computing pin criticalities under process variations for timing analysis and optimization |
US7861199B2 (en) * | 2007-10-11 | 2010-12-28 | International Business Machines Corporation | Method and apparatus for incrementally computing criticality and yield gradient |
JP5076832B2 (ja) * | 2007-11-22 | 2012-11-21 | 富士通株式会社 | 遅延解析支援プログラム、該プログラムを記録した記録媒体、遅延解析支援装置、および遅延解析支援方法 |
US8245167B1 (en) * | 2008-02-14 | 2012-08-14 | Cadence Design Systems, Inc. | Branch and bound techniques for computation of critical timing conditions |
US7844933B2 (en) * | 2008-05-01 | 2010-11-30 | International Business Machines Corporation | Methods of optimizing timing of signals in an integrated circuit design using proxy slack values |
US8056035B2 (en) | 2008-06-04 | 2011-11-08 | International Business Machines Corporation | Method and system for analyzing cross-talk coupling noise events in block-based statistical static timing |
US8028260B1 (en) * | 2008-10-14 | 2011-09-27 | Altera Corporation | Determination of most critical timing paths in digital circuits |
US9098661B1 (en) * | 2008-12-10 | 2015-08-04 | The Mathworks, Inc. | Extensible platform for back-annotation of target-specific characterization onto a model of a hardware system |
JP2010160787A (ja) * | 2008-12-11 | 2010-07-22 | Jedat Inc | パラメータ情報作成システム、歩留まり算出システム、プログラム及び記録媒体 |
US8141025B2 (en) * | 2009-01-15 | 2012-03-20 | International Business Machines Corporation | Method of performing timing analysis on integrated circuit chips with consideration of process variations |
JPWO2010092825A1 (ja) * | 2009-02-13 | 2012-08-16 | パナソニック株式会社 | 回路解析方法 |
US8122404B2 (en) * | 2009-02-19 | 2012-02-21 | International Business Machines Corporation | Performing a statistical timing abstraction for a hierarchical timing analysis of VLSI circuits |
US8781792B2 (en) * | 2009-10-31 | 2014-07-15 | International Business Machines Corporation | Yield computation and optimization for selective voltage binning |
CN102231130B (zh) * | 2010-01-11 | 2015-06-17 | 国际商业机器公司 | 计算机系统性能分析方法和装置 |
US8266565B2 (en) * | 2010-01-29 | 2012-09-11 | International Business Machines Corporation | Ordering of statistical correlated quantities |
US8365116B2 (en) | 2010-12-06 | 2013-01-29 | University Of Utah Research Foundation | Cycle cutting with timing path analysis |
US9235675B2 (en) * | 2011-04-01 | 2016-01-12 | Taiwan Semiconductor Manufacturing Company, Ltd. | Multidimensional monte-carlo simulation for yield prediction |
KR20130111061A (ko) * | 2012-03-30 | 2013-10-10 | 한국전자통신연구원 | 이진 분할 트리를 이용한 영상 인코딩 방법 |
US8977998B1 (en) * | 2013-02-21 | 2015-03-10 | Altera Corporation | Timing analysis with end-of-life pessimism removal |
US9342639B1 (en) * | 2015-02-17 | 2016-05-17 | International Business Machines Corporation | Method of hierarchical timing closure of VLSI circuits using partially disruptive feedback assertions |
KR102398596B1 (ko) | 2015-06-15 | 2022-05-16 | 삼성전자주식회사 | 집적 회로의 수율 예측 방법 및 집적 회로의 설계 최적화 방법 |
US9760664B2 (en) * | 2015-07-07 | 2017-09-12 | International Business Machines Corporation | Validating variation of timing constraint measurements |
US9690899B2 (en) * | 2015-08-13 | 2017-06-27 | International Business Machines Corporation | Prioritized path tracing in statistical timing analysis of integrated circuits |
US9600617B1 (en) * | 2015-09-01 | 2017-03-21 | International Business Machines Corporation | Automated timing analysis |
US9865486B2 (en) | 2016-03-29 | 2018-01-09 | Globalfoundries Inc. | Timing/power risk optimized selective voltage binning using non-linear voltage slope |
US10318686B2 (en) | 2016-10-11 | 2019-06-11 | Intel Corporation | Methods for reducing delay on integrated circuits by identifying candidate placement locations in a leveled graph |
US9767239B1 (en) | 2016-10-20 | 2017-09-19 | International Business Machines Corporation | Timing optimization driven by statistical sensitivites |
JP6787045B2 (ja) * | 2016-10-31 | 2020-11-18 | 富士通株式会社 | 検証支援プログラム、検証支援方法、および情報処理装置 |
US10747924B2 (en) * | 2018-07-16 | 2020-08-18 | Taiwan Semiconductor Manufacturing Company Ltd. | Method for manufacturing integrated circuit with aid of pattern based timing database indicating aging effect |
WO2022125978A1 (en) * | 2020-12-11 | 2022-06-16 | Synopsys, Inc. | Machine learning delay estimation for emulation systems |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5365463A (en) * | 1990-12-21 | 1994-11-15 | International Business Machines Corporation | Method for evaluating the timing of digital machines with statistical variability in their delays |
JP2002279012A (ja) * | 2000-11-22 | 2002-09-27 | Matsushita Electric Ind Co Ltd | 遅延分布計算方法、回路評価方法およびフォールスパス抽出方法 |
US6637014B2 (en) * | 2001-03-06 | 2003-10-21 | Nec Corporation | Crosstalk mitigation method and system |
US20040002844A1 (en) * | 2002-06-27 | 2004-01-01 | Jess Jochen A.G. | System and method for statistical modeling and statistical timing analysis of integrated circuits |
US7000205B2 (en) | 2003-05-29 | 2006-02-14 | International Business Machines Corporation | Method, apparatus, and program for block-based static timing analysis with uncertainty |
US7111260B2 (en) | 2003-09-18 | 2006-09-19 | International Business Machines Corporation | System and method for incremental statistical timing analysis of digital circuits |
US7086023B2 (en) | 2003-09-19 | 2006-08-01 | International Business Machines Corporation | System and method for probabilistic criticality prediction of digital circuits |
US7428716B2 (en) | 2003-09-19 | 2008-09-23 | International Business Machines Corporation | System and method for statistical timing analysis of digital circuits |
US7350171B2 (en) * | 2005-11-17 | 2008-03-25 | Lizheng Zhang | Efficient statistical timing analysis of circuits |
-
2005
- 2005-12-16 US US11/303,792 patent/US7437697B2/en not_active Expired - Fee Related
-
2006
- 2006-12-12 JP JP2008544986A patent/JP5004965B2/ja not_active Expired - Fee Related
- 2006-12-12 KR KR1020087014021A patent/KR100998798B1/ko not_active IP Right Cessation
- 2006-12-12 WO PCT/EP2006/069589 patent/WO2007068690A1/en active Application Filing
- 2006-12-12 CN CN2006800440965A patent/CN101317178B/zh not_active Expired - Fee Related
- 2006-12-12 EP EP06830545A patent/EP1969502B1/en not_active Not-in-force
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103403719A (zh) * | 2010-12-16 | 2013-11-20 | 辛奥普希斯股份有限公司 | 使用基于样本的静态时序基础结构的同步多角静态时序分析 |
CN103403719B (zh) * | 2010-12-16 | 2017-10-13 | 辛奥普希斯股份有限公司 | 使用基于样本的静态时序基础结构的同步多角静态时序分析 |
CN108228919A (zh) * | 2016-12-09 | 2018-06-29 | 厦门紫光展锐科技有限公司 | 一种集成电路接口的时序生成方法及装置 |
CN108733832A (zh) * | 2018-05-28 | 2018-11-02 | 北京阿可科技有限公司 | 有向无环图的分布式存储方法 |
CN114239444A (zh) * | 2021-12-21 | 2022-03-25 | 东南大学 | 一种基于块的电路延时模型的建立方法 |
CN114239444B (zh) * | 2021-12-21 | 2023-08-29 | 东南大学 | 一种基于块的电路延时模型的建立方法 |
CN114818570A (zh) * | 2022-03-11 | 2022-07-29 | 西北工业大学 | 一种基于蒙特卡罗仿真的嵌入式系统时序分析方法 |
CN114818570B (zh) * | 2022-03-11 | 2024-02-09 | 西北工业大学 | 一种基于蒙特卡罗仿真的嵌入式系统时序分析方法 |
CN117574820A (zh) * | 2024-01-15 | 2024-02-20 | 中科亿海微电子科技(苏州)有限公司 | 一种增量时序分析方法 |
Also Published As
Publication number | Publication date |
---|---|
US7437697B2 (en) | 2008-10-14 |
JP2009519528A (ja) | 2009-05-14 |
US20070143722A1 (en) | 2007-06-21 |
EP1969502A1 (en) | 2008-09-17 |
KR20080075868A (ko) | 2008-08-19 |
CN101317178B (zh) | 2010-07-21 |
WO2007068690A1 (en) | 2007-06-21 |
EP1969502B1 (en) | 2012-08-01 |
KR100998798B1 (ko) | 2010-12-06 |
JP5004965B2 (ja) | 2012-08-22 |
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Effective date of registration: 20171120 Address after: Grand Cayman, Cayman Islands Patentee after: GLOBALFOUNDRIES INC. Address before: American New York Patentee before: Core USA second LLC Effective date of registration: 20171120 Address after: American New York Patentee after: Core USA second LLC Address before: American New York Patentee before: International Business Machines Corp. |
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