CN101286830A - Double redundant high-speed IO network system based on dual-core controller for cards - Google Patents
Double redundant high-speed IO network system based on dual-core controller for cards Download PDFInfo
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- CN101286830A CN101286830A CNA2008101007657A CN200810100765A CN101286830A CN 101286830 A CN101286830 A CN 101286830A CN A2008101007657 A CNA2008101007657 A CN A2008101007657A CN 200810100765 A CN200810100765 A CN 200810100765A CN 101286830 A CN101286830 A CN 101286830A
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Abstract
The invention discloses a dual-redundancy high-speed IO network system which is used in a card and based on a binuclear controller, which comprises the binuclear controller and two redundant buses, wherein, the binuclear controller comprises a master CPU, a subordinate CPU and a dual-port RAM; the master CPU and the subordinate CPU carry out data interaction by the dual-port RAM; in normal condition, the two redundant buses carry out communication periodically in turn; when one bus is damaged, the other bus is used for continuing communication and releasing warning information; when both two buses are damaged, warning information is released and bus detection is carried out once at a specified time interval; if the hardware of the buses recovers to be normal, normal communication continues, otherwise the bus detection of next interval continues to be carried out; the master CPU processes concrete communication protocols while the subordinate CPU is responsible for the data transmission of a link layer. The system applies the dual-redundancy technology to the high-speed IO network, which is correct and reliable, processes IO data in real time and can meet the tough work operating environment of the IO card of the existing DCS.
Description
Technical field
The present invention relates to two redundancy communication networks of the IO communication of a kind of DCS of being used for, specifically a kind of two redundant high-speed IO network systems based on the double-core controller.
Background technology
As long flow process, important downstream user, precious material, dangerous process etc., the security reliability of automatic control system is of crucial importance for the control of important production process.Because of it not only is related to production efficiency, safety of life and property even.The continuous summing up experience of people has in this respect reached high level.Any link of control appliance or element all might lose efficacy theoretically, and analyzed infringement and the danger that thus production is brought, so that take corresponding counter-measure.For example to valve " air to open " and " gas-tight " in case selection suppose that exactly the valve source of the gas breaks down, valve can reach a comparatively safe position automatically, promptly is a simple case.
Along with improving constantly of electronic devices and components reliability and manufacturing quality assurance level, control appliance unit reliability has reached very high level at present, can satisfy the not too big process control requirement of those scales and risk fully, as the application of most of PLC.But then also think not enough for those high-risk, high value, the large-scale production process of long flow process.DCS normally adopts the measure of " redundancy " further to improve its security reliability.Use double backup to influence the overall situation to prevent the one dawn from damaging for the link of those concentrations of risk.Therefore for the high DCS of security reliability, must realize the redundancy of IO network.But excessive redundancy has not only increased the complexity of network, and has increased the cost of network.
Summary of the invention
Take all factors into consideration the factor of each side, the purpose of this invention is to provide a kind of two redundant high-speed IO network systems based on the double-core controller, the present invention is used for the High-speed I network with two redundant techniques, accurately, reliably, carry out the IO data in real time, can satisfy the abominable work running environment of IO fastener of current DCS.
The objective of the invention is to be achieved through the following technical solutions:
A kind of two redundant high-speed IO network systems that are used for fastener based on the double-core controller, it is characterized in that: it comprises double-core controller and two redundant bus, the double-core controller comprises host CPU, from CPU and dual port RAM, host CPU and carry out data interaction by dual port RAM from CPU; Under the normal condition, two redundant bus cycle wheel circulation news when damaging for one, are just used other one to continue communication, and are provided warning message; If two all damage, then provide warning message and bus detection of every interval certain hour execution, if at this moment bus hardware recovers normal, then proceed normal communication, otherwise proceed the bus detection of next blanking time; Host CPU is handled concrete communications protocol; Be responsible for the transfer of data of link layer from CPU.
Among the present invention, host CPU packages to the data of needs transmission, writes the transmission buffering area in the dual port RAM, sends to interrupt to from CPU again; Send each sub data packets to current communication bus from CPU, again the subdata bag of accepting is formed the buffering area of accepting that a data flow sends to dual port RAM, interrupt notification host CPU packet returns.
The concrete communications protocol of fastener is handled by host CPU (application layer), from the transfer of data that CPU only is responsible for link layer, revises the controller that causes for the communications protocol of fastener and upgrades more convenient.Two IO interfaces of the A B of a fastener damage the normal scan that does not influence other fasteners.
For conveniently being applied to various IO network environments, match by RS485 communication interface card or profibus communication interface card or CAN communication interface card from CPU.
The present invention adopts modularized design, and dual port RAM, single-chip microcomputer and RS485 have constituted two 485 redundant address cards, and application layer can be managed this address card, just drives the dual port RAM of reading and writing address card by address card and can realize communication.
Among the present invention, host CPU is equivalent to the application layer in the osi model, be responsible for concrete protocol encapsulation and the parsing of fastener, be equivalent to data link layer the osi model from CPU in the double-core, be responsible for the foundation of IO network, the redundant switching, transfer of data, the IO network of two redundancies is quite and the physical layer in the osi model.This network system is applicable to the IO network communication among the DCS.
The present invention is used for the High-speed I network with two redundant techniques, and is accurately reliable, carries out the IO data in real time, can satisfy the abominable work running environment of IO fastener of current DCS.And not needing excessive redundancy, network configuration is simple, has reduced the cost of network.
Description of drawings
Fig. 1 is a structural representation of the present invention;
Fig. 2 is the frame diagram of double-core controller among the present invention;
Fig. 3 is the transmission in the dual port RAM of the present invention and accepts the schematic diagram that buffering area is a fixed size;
Fig. 4 is the transmission in the dual port RAM of the present invention and accepts the schematic diagram that buffering area is a variable-size.
Embodiment
A kind of two redundant high-speed IO network systems based on the double-core controller that are used for fastener of the present invention are seen accompanying drawing 1.It comprises double-core controller and two redundant bus, two redundant bus and one group of fastener communication.The double-core controller comprises host CPU, from CPU and dual port RAM, host CPU and carry out data interaction by dual port RAM from CPU; Under the normal condition, two redundant bus cycle wheel circulation news when damaging for one, are just used other one to continue communication, and are provided warning message; If two all damage, then provide warning message and bus detection of every interval certain hour execution, if at this moment bus hardware recovers normal, then proceed normal communication, otherwise proceed the bus detection of next blanking time; Host CPU is handled concrete communications protocol, and host CPU packages to the data of needs transmission, writes the transmission buffering area in the dual port RAM, sends to interrupt to from CPU again; Be responsible for the transfer of data of link layer from CPU, send each sub data packets to current communication bus from CPU, again the subdata bag of accepting is formed the buffering area of accepting that a data flow sends to dual port RAM, interrupt notification host CPU packet returns.
The framework architecture of double-core controller of the present invention is seen accompanying drawing 2.
Host CPU is generally ARM9 or MPC8247 high-performance 32bits processor, and dual port RAM is taken all factors into consideration size from price and capacity and is 2K, need not carry out complex calculations from CPU, just is responsible for the processing forward of data, is generally low-cost 51 or the AVR single-chip microcomputer.
The IO data scanning of host CPU is finished by the one-period task, only need the packing data that send be write into dual port RAM according to the IO communications protocol, waits for the data of returning from CPU again, promptly finishes one-period scanning.The redundant state of managing I bus not under the host CPU situation, communication is overtime etc., has comprised these information from the data that CPU returns.
From CPU realized based on one much more main from redundant IO bus communication, two redundant bus of A B take turns communication under the normal condition, in case wherein a path loss is bad, can in local internal memory, this road of slave unit be changed to bad, and automatically switch to another bus, if 2 redundant bus all is bad, carries out 8S bus state once and survey, up to bus recovery is arranged.
Communications protocol between master-slave cpu is based on stream format, is packaged by the data of host CPU to needs transmission, writes the transmission buffering area in the dual port RAM, sends to interrupt to from CPU again.Unpack from CPU, generate CRC check, send each sub data packets to current communication bus, again the subdata bag of accepting is formed the buffering area of accepting that a data flow sends to dual port RAM, interrupt notification host CPU packet returns.
The Memory Allocation of dual port RAM is as follows:
Transmission in the dual port RAM and accept buffer size two kinds of methods for designing are arranged.
1, dual port RAM sends and accepts the buffering area fixed size, sees accompanying drawing 3.
Preceding 32 bytes are configuring area in the dual port RAM of 2K, comprise the version number from CPU, by being provided with from CPU.
Send buffering area and account for 800 bytes, accept buffering area and account for 1214 bytes.Last 2 bytes interrupt using to dual port RAM.
2, dual port RAM sends and to accept buffer size variable, sees accompanying drawing 4.Total size is fixed as 2014 bytes.
Preceding 32 bytes are configuring area in the dual port RAM of 2K, comprise the version number from CPU, by being provided with from CPU.Also comprise the size (txLen) that sends buffering area, by the host CPU setting.
Send buffering area and account for the txLen byte, accept buffering area and account for (2014-txLen) byte.Last 2 bytes interrupt using to dual port RAM.
The data format of configuring area is:
Sending the buffer data stream format is:
For each subdata bag, form is:
Accepting the buffer data stream format is:
For each subdata bag, form is:
For the state of each subdata bag, concrete form is:
Dual port RAM, single-chip microcomputer and RS485 have constituted an address card on the logical meaning, and these card configuring area 32 bytes send and accept buffering area length overall 2014 bytes, discontinuity area 2 bytes.This logic address card has been realized privately owned communications protocol in data link layer, can use agreement such as modbus to carry out transfer of data in application layer, has very high flexibility, and modularized design makes agreement be easy to upgrading.
The present invention is used for the High-speed I network with two redundant techniques, and is accurately reliable, carries out the IO data in real time, can satisfy the abominable work running environment of IO fastener of current DCS.And not needing excessive redundancy, network configuration is simple, has reduced the cost of network.
Claims (4)
1, a kind of two redundant high-speed IO network systems that are used for fastener based on the double-core controller, it is characterized in that: it comprises double-core controller and two redundant bus, the double-core controller comprises host CPU, from CPU and dual port RAM, host CPU and carry out data interaction by dual port RAM from CPU; Under the normal condition, two redundant bus cycle wheel circulation news when damaging for one, are just used other one to continue communication, and are provided warning message; If two all damage, then provide warning message and bus detection of every interval certain hour execution, if at this moment bus hardware recovers normal, then proceed normal communication, otherwise proceed the bus detection of next blanking time; Host CPU is handled concrete communications protocol; Be responsible for the transfer of data of link layer from CPU.
2, the two redundant high-speed IO network systems based on the double-core controller that are used for fastener according to claim 1 is characterized in that: host CPU packages to the data of needs transmission, writes the transmission buffering area in the dual port RAM, sends to interrupt to from CPU again; Send each sub data packets to current communication bus from CPU, again the subdata bag of accepting is formed the buffering area of accepting that a data flow sends to dual port RAM, interrupt notification host CPU packet returns.
3, the two redundant high-speed IO network systems based on the double-core controller that are used for fastener according to claim 1 is characterized in that: matched by RS485 communication interface card or profibus communication interface card or CAN communication interface card from CPU.
4, the two redundant high-speed IO network systems based on the double-core controller that are used for fastener according to claim 1 is characterized in that: it is 8 seconds that described every interval certain hour is carried out the certain hour in the bus detection.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2008101007657A CN101286830A (en) | 2008-05-15 | 2008-05-15 | Double redundant high-speed IO network system based on dual-core controller for cards |
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| CNA2008101007657A CN101286830A (en) | 2008-05-15 | 2008-05-15 | Double redundant high-speed IO network system based on dual-core controller for cards |
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Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101631057B (en) * | 2009-08-17 | 2011-09-28 | 北京航空航天大学 | Network control method of dual-redundancy CAN bus |
| CN101695069B (en) * | 2009-10-22 | 2012-04-04 | 南京科远自动化集团股份有限公司 | Enetgw communication gateway |
| CN102819252A (en) * | 2012-08-13 | 2012-12-12 | 国电南京自动化股份有限公司 | Method for realizing multi-redundancy of process control station in distributed control system |
| CN102854871A (en) * | 2012-10-11 | 2013-01-02 | 三一重工股份有限公司 | Bus control system and engineering machinery |
| CN103197637A (en) * | 2013-03-25 | 2013-07-10 | 东莞市力与源电器设备有限公司 | Network control system of power supply devices |
| CN103577355A (en) * | 2013-08-06 | 2014-02-12 | 中国广核集团有限公司 | Processing method and system for backup panel interface of DCS (Distributed Control System) analogue machine |
| CN103813471A (en) * | 2012-11-12 | 2014-05-21 | 联发科技股份有限公司 | Communications establishing method and bluetooth device |
| CN107608204A (en) * | 2017-09-29 | 2018-01-19 | 上海微程电气设备有限公司 | Redundancy communication controller based on arm processor |
| CN109733301A (en) * | 2018-02-13 | 2019-05-10 | 重庆长安汽车股份有限公司 | Vehicle redundant bus system and its control method |
| CN110879565A (en) * | 2019-12-06 | 2020-03-13 | 北京和利时智能技术有限公司 | Dual-computer redundancy control system and redundancy control/fault monitoring method and device thereof |
| CN114650193A (en) * | 2022-02-23 | 2022-06-21 | 南京康曼电子科技有限公司 | MVB signal repeater |
-
2008
- 2008-05-15 CN CNA2008101007657A patent/CN101286830A/en active Pending
Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101631057B (en) * | 2009-08-17 | 2011-09-28 | 北京航空航天大学 | Network control method of dual-redundancy CAN bus |
| CN101695069B (en) * | 2009-10-22 | 2012-04-04 | 南京科远自动化集团股份有限公司 | Enetgw communication gateway |
| CN102819252A (en) * | 2012-08-13 | 2012-12-12 | 国电南京自动化股份有限公司 | Method for realizing multi-redundancy of process control station in distributed control system |
| CN102854871A (en) * | 2012-10-11 | 2013-01-02 | 三一重工股份有限公司 | Bus control system and engineering machinery |
| CN103813471A (en) * | 2012-11-12 | 2014-05-21 | 联发科技股份有限公司 | Communications establishing method and bluetooth device |
| CN103813471B (en) * | 2012-11-12 | 2017-06-16 | 联发科技股份有限公司 | Communication establishing method and bluetooth equipment |
| CN103197637A (en) * | 2013-03-25 | 2013-07-10 | 东莞市力与源电器设备有限公司 | Network control system of power supply devices |
| CN103577355A (en) * | 2013-08-06 | 2014-02-12 | 中国广核集团有限公司 | Processing method and system for backup panel interface of DCS (Distributed Control System) analogue machine |
| CN103577355B (en) * | 2013-08-06 | 2018-10-02 | 中国广核集团有限公司 | A kind of DCS analog machines back-up disk interface processing method and system |
| CN107608204A (en) * | 2017-09-29 | 2018-01-19 | 上海微程电气设备有限公司 | Redundancy communication controller based on arm processor |
| CN109733301A (en) * | 2018-02-13 | 2019-05-10 | 重庆长安汽车股份有限公司 | Vehicle redundant bus system and its control method |
| CN110879565A (en) * | 2019-12-06 | 2020-03-13 | 北京和利时智能技术有限公司 | Dual-computer redundancy control system and redundancy control/fault monitoring method and device thereof |
| CN114650193A (en) * | 2022-02-23 | 2022-06-21 | 南京康曼电子科技有限公司 | MVB signal repeater |
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