CN102830647A - Double 2-vote-2 device for fail safety - Google Patents
Double 2-vote-2 device for fail safety Download PDFInfo
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- CN102830647A CN102830647A CN201210320228XA CN201210320228A CN102830647A CN 102830647 A CN102830647 A CN 102830647A CN 201210320228X A CN201210320228X A CN 201210320228XA CN 201210320228 A CN201210320228 A CN 201210320228A CN 102830647 A CN102830647 A CN 102830647A
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- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
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Abstract
The invention discloses a double 2-vote-2 device for fail safety. The device comprises two sets of systems and a switching panel. The two sets of systems are connected with the switching panel. The switching panel is used to control one of the two sets of systems as a main system and control the other one system as a backup system. Each system comprises a system bus, and a master control subsystem, a record subsystem, and a communication subsystem which are communicated through the system bus, and a safe watchdog module connected with the master control subsystem and the switching panel; and the safe watchdog module is also connected to an interface power supply of the communication subsystem for connecting or disconnecting the interface power supply of the communication subsystem. The fail safety of hardware of double 2-vote-2 device can be realized.
Description
Technical field
The present invention relates to the control field, relate in particular to a kind of fail-safe two and take advantage of two to get two devices.
Background technology
Present track traffic ground control equipment adopts two to take advantage of two to get two structures; Just two cover computer systems respectively have two CPU; And all structures and accessory are identical; Take two-node cluster hot backup between two cover systems, in two systems, respectively adopt the result of a CPU to compare, the output unanimity is just sent this result; Two take advantage of two get two structure feasible systems reliabilty and availability.
In the existing system,, can only handle by software if which cover system breaks down; Main control module in two cover systems does not have strict synchronization mechanism; Two get two functions is also relatively realized through Ethernet transmission data by software, can't realize that two of strictness get two functions.
Summary of the invention
The technical matters that the present invention will solve be how to realize two take advantage of two get two devices hardware fault safety.
In order to address the above problem, the invention provides a kind of fail-safe two and take advantage of two to get two devices, comprising:
Two cover systems and switching panel, said two cover systems all connect said switching panel; The cover that said switching panel is used for controlling two cover systems is as main system, and another set of conduct is equipped with system;
The structure of each cover system comprises:
System bus;
Master control subsystem, recording subsystem, communication subsystem, between three sub-systems through said system bus communication;
Safe watchdog module links to each other with said master control subsystem, and connects said switching panel; Also be connected on the interface power supply of said communication subsystem, be used to be switched on or switched off the interface power supply of said communication subsystem.
Further, said safe watchdog module is opened the perhaps interface power supply of communication close subsystem through relay.
Further, said master control subsystem comprises main control module; Said main control module comprises the first passage and the second channel of electrical isolation; Each passage respectively comprises a coprocessor COP and a central processor CPU, and the CPU of each passage respectively exports one road enable signal and respectively exports one road pulse signal to said safe watchdog module for the CoP of said safe watchdog module, each passage;
Said safe watchdog module has only when the enable signal of two passages output in the main control module of this cover system and pulse signal simultaneously effectively the time, just connects the interface power supply of communication subsystem in this cover system; If have the enable signal or the pulse signal of any passage at least invalid, then break off the interface power supply of communication subsystem in this cover system.
Further, accomplish synchronization timing between the COP of the COP of first passage and second channel in the said main control module, each COP provides synchronizing signal for respectively the CPU of this passage after accomplishing;
CPU in each passage carries out periodic scheduling according to said synchronizing signal.
Further; The COP of first passage completion synchronization timing in the COP of first passage and the another set of main system control module in the one cover system main control module, the COP of second channel completion synchronization timing in the COP of second channel and the another set of main system control module in the cover system main control module.
Further, said communication subsystem comprises interface module, and said interface module comprises the first passage and the second channel of electrical isolation, and each passage respectively comprises a coprocessor COP and a central processor CPU;
The COP of first passage also is used for accomplishing synchronization timing with the COP of the interface module first passage of native system in the main control module;
The COP of main control module second channel also is used for accomplishing synchronization timing with the COP of the interface module second channel of native system.
Further, the CPU of two passages is used for accomplishing synchronously with handshake method in each said interface module, to get into loop cycle simultaneously.
Further, when main control module and interface module output data, the data that the CPU of first passage and the CPU of second channel will export this cycle respectively send to the COP of this passage;
The data that receive the COP clearing house of two passages, and the data that the data that will receive from CPU receive during with exchange carry out the step-by-step voting, voting result are returned to the CPU of this passage;
The COP that the CPU of each passage enables this passage when consistent when said voting result sends the data that this cycle will export.
Further, each passage in main control module and the interface module also respectively comprises an interface;
The COP that CPU enables this passage sends the data that this cycle will export and is meant:
The COP that CPU enables this passage sends the interface that data that this cycle will export are given this passage, gives outside by the interface output data of this passage.
Technical scheme of the present invention adopts the fail safe mechanism based on hardware watchdog, has realized the failure safe function; Its prioritization scheme adopts regularly synchronization mechanism, and the CPU in two cover systems in main control module and the interface module carries out synchronously; Its another prioritization scheme assists CPU to accomplish strict voting by COP; Thereby avoided original system can't realize that indigenous fault safety, each module are asynchronous, decide by vote undemanding shortcoming.
Description of drawings
Fig. 1 be fail-safe two of embodiment one take advantage of two get two devices structured flowchart;
Fig. 2 be fail-safe two of embodiment one take advantage of two get single cover system in the two devices structured flowchart;
Fig. 3 is the control synoptic diagram of master control subsystem and safe watchdog module in single cover system;
Fig. 4 is the synchronous synoptic diagram of master control subsystem and communication subsystem in single cover system;
Fig. 5 is the synchronous synoptic diagram of two channel C PU in the module of single cover system;
Fig. 6 is the structured flowchart of security-related module.
Embodiment
To combine accompanying drawing and embodiment that technical scheme of the present invention is explained in more detail below.
Need to prove that if do not conflict, each characteristic among the embodiment of the invention and the embodiment can mutually combine, all within protection scope of the present invention.
Embodiment one, and a kind of fail-safe two take advantage of two to get two devices, as shown in Figure 1, comprising:
Two cover systems (such as A system in Fig. 1 and B system) and switching panel; Said two cover systems all connect said switching panel, external unit and display device during use beyond all right coupling arrangement; The cover that said switching panel is used for controlling two cover systems is as main system, and another set of conduct is equipped with system.
Said two cover systems telotism and independent operating separately, press active and standby mode operation: when operate as normal, a cover system is a main system, an other cover system is for being equipped with system; Said two cover systems are according to self running status and the control decision main and standby relation of switching panel; Exchanges data between said two cover systems is by independently communication channel completion between system.
In the present embodiment, said two cover system structures are identical, and wherein the structure of arbitrary cover is as shown in Figure 2, comprising:
System bus, safe watchdog module;
Master control subsystem, recording subsystem, communication subsystem, between the three through said system bus communication; Said safe watchdog module links to each other with said master control subsystem, and connects said switching panel; Also be connected on the interface power supply of said communication subsystem, be used to be switched on or switched off the interface power supply of said communication subsystem.
In the present embodiment, safe watchdog module, can be cut off this cover system by the safety watchdog module and externally export under the situation that this cover system breaks down by independently hardware cell realization, reaches the purpose of output safety side.Said safe watchdog module can but be not limited to open or the interface power supply of communication close subsystem through relay, the function of having served as " switch " can certainly adopt other device to accomplish the function of " switch ".
As shown in Figure 3; Said master control subsystem in the present embodiment comprises the channel C H1 and the CH2 of two electrical isolation; Each passage respectively comprises a COP (coprocessor) and a CPU (central processing unit); The CoP that the CPU of each passage respectively exports one road enable signal OE (in Fig. 3, the enable signal that CPU exported among CH1 and the CH2 is respectively OE-W1 and OE-W2), each passage respectively exports one road pulse signal to said safe watchdog module; Enable signal and the pulse signal that has only two passages in the main control module of this cover system is simultaneously effectively when (effectively be meant: the OE signal is that high level and pulse persistance are continuous); Safe watchdog module just is operated in normal condition; Just control said relay closes; Connect the interface power supply of communication subsystem in this cover system, this moment, the communication subsystem and the external unit of this cover system were communicated with, the externally normally output of this cover system.If have the enable signal or the pulse signal of any passage at least invalid; Then safe watchdog module judges that this cover system breaks down; Control the interface power supply that said relay breaks off communication subsystem in this cover system, externally export, reach fail-safe effect thereby cut off this cover system.
As shown in Figure 4; Said master control subsystem comprises main control module; Said communication subsystem comprises interface module; Said main control module and interface module include first passage (passage 1) and two passages of second channel (passage 2) of electrical isolation; Each passage in main control module and the interface module respectively comprises a COP (coprocessor) and a CPU (central processing unit), and the COP of first passage links to each other with the COP of first passage in the interface module in the main control module, and the COP of second channel links to each other with the COP of second channel in the interface module in the main control module.It is synchronous to carry out timing in the main control module between the COP of first, second passage earlier, synchronizing signal is provided for respectively then the CPU of this passage, and the CPU of each passage carries out periodic scheduling according to said synchronizing signal, and synchronous error is lower than 10 microseconds.
Accomplish synchronization timing according to the IEEE1588 agreement of simplifying between the COP in the main control module in two cover systems; Be exactly specifically in COP and the another set of main system control module of first passage in the cover system main control module COP of first passage accomplish synchronization timing, in the cover system main control module in the COP of second channel and the another set of main system control module COP of second channel accomplish synchronization timing.
In a cover system, the COP of main control module first passage also is used for accomplishing synchronization timing with the COP of the interface module first passage of native system, and the COP of main control module second channel also is used for accomplishing synchronization timing with the COP of the interface module second channel of native system.
Between the COP of two passages of main control module, between the COP of different system main control module, and system between the COP of main control module and interface module the mode of completion synchronization timing can implement with reference to prior art.
As shown in Figure 5; The CPU of two passages (CPU1 among Fig. 4 and CPU2) is used for accomplishing synchronously with handshake method in each said interface module, to get into loop cycle simultaneously, advanced line period initial synchronisation before code segment 1 is carried out;, code segment 2 carries out periodic duty synchronous 1 when carrying out; ...,, code segment n carries out the synchronous n-1 of periodic duty when carrying out, and last synchronous error is lower than 50 microseconds.
As shown in Figure 6, all safe correlation modules (comprising main control module, interface module) all adopt channel structure to realize that two get two functions in the present embodiment, and two passage electrical isolation are through optocoupler communication; Each passage comprises CPU and COP respectively, can also comprise an interface respectively, is used for output data and gives the outside, comprises CPU1 and COP1 such as passage among Fig. 61, and passage 2 comprises CPU2 and COP2.During safe correlation module output data: the data that CPU1 and CPU2 will export this cycle respectively send to COP1 and COP2; Two data that receive the COP clearing house; And the data that the data that will receive from CPU receive during with exchange are carried out step-by-step voting (comparison); Voting result is returned to the CPU of this passage, if voting result is sent the interface that data that this cycle will export are given this passage for consistent then CPU enables the COP of this passage.
COP in two passages of each module all adopts full voting strategy; Be that all decide by vote each position; (MD5 is a Message Digest Algorithm 5 and existing system is only decided by vote the MD5 sign indicating number of raw data; For the widely used a kind of hash function of computer safety field, in order to the integrity protection that gives information), mistake may appear deciding by vote.Simultaneously, existing system needs 3 cycles of buffer memory owing to there is not strict synchronization mechanism, in three cycles, has identical data promptly to think and decides by vote successfully, and security risk is arranged like this, and what present embodiment was decided by vote is the data in this cycle, has stopped this risk.
In the present embodiment, 2 get 2 execution (being the described voting process of the preceding paragraph) is carried out by hardware in the CoP coprocessor, and speed is faster.
In the present embodiment, (promptly regularly synchronous earlier between the COP in two passages of a main system control module, COP sends the CPU of synchronizing signal to this passage then to accomplish timing by hardware; COP in two passages of two main system control modules respectively regularly synchronously; In the same system, regularly synchronous between the COP that is connected in main control module and the interface module; Synchronous between the CPU of interface module through Handshake Protocol), precision is higher.
Certainly; The present invention also can have other various embodiments; Under the situation that does not deviate from spirit of the present invention and essence thereof; Those of ordinary skill in the art work as can make various corresponding changes and distortion according to the present invention, but these corresponding changes and distortion all should belong to the protection domain of claim of the present invention.
Claims (9)
1. take advantage of two to get two devices for one kind fail-safe two, comprising:
Two cover systems and switching panel, said two cover systems all connect said switching panel; The cover that said switching panel is used for controlling two cover systems is as main system, and another set of conduct is equipped with system;
It is characterized in that the structure of each cover system comprises:
System bus;
Master control subsystem, recording subsystem, communication subsystem, between three sub-systems through said system bus communication;
Safe watchdog module links to each other with said master control subsystem, and connects said switching panel; Also be connected on the interface power supply of said communication subsystem, be used to be switched on or switched off the interface power supply of said communication subsystem.
2. device as claimed in claim 1 is characterized in that:
Said safe watchdog module is opened the perhaps interface power supply of communication close subsystem through relay.
3. device as claimed in claim 1 is characterized in that:
Said master control subsystem comprises main control module; Said main control module comprises the first passage and the second channel of electrical isolation; Each passage respectively comprises a coprocessor COP and a central processor CPU, and the CPU of each passage respectively exports one road enable signal and respectively exports one road pulse signal to said safe watchdog module for the CoP of said safe watchdog module, each passage;
Said safe watchdog module has only when the enable signal of two passages output in the main control module of this cover system and pulse signal simultaneously effectively the time, just connects the interface power supply of communication subsystem in this cover system; If have the enable signal or the pulse signal of any passage at least invalid, then break off the interface power supply of communication subsystem in this cover system.
4. device as claimed in claim 3 is characterized in that:
Accomplish synchronization timing between the COP of the COP of first passage and second channel in the said main control module, each COP provides synchronizing signal for respectively the CPU of this passage after accomplishing;
CPU in each passage carries out periodic scheduling according to said synchronizing signal.
5. device as claimed in claim 4 is characterized in that:
The COP of first passage completion synchronization timing in the COP of first passage and the another set of main system control module in the one cover system main control module, the COP of second channel completion synchronization timing in the COP of second channel and the another set of main system control module in the cover system main control module.
6. device as claimed in claim 5 is characterized in that:
Said communication subsystem comprises interface module, and said interface module comprises the first passage and the second channel of electrical isolation, and each passage respectively comprises a coprocessor COP and a central processor CPU;
The COP of first passage also is used for accomplishing synchronization timing with the COP of the interface module first passage of native system in the main control module;
The COP of main control module second channel also is used for accomplishing synchronization timing with the COP of the interface module second channel of native system.
7. device as claimed in claim 6 is characterized in that:
The CPU of two passages is used for accomplishing synchronously with handshake method in each said interface module, to get into loop cycle simultaneously.
8. device as claimed in claim 7 is characterized in that:
When main control module and interface module output data, the data that the CPU of first passage and the CPU of second channel will export this cycle respectively send to the COP of this passage;
The data that receive the COP clearing house of two passages, and the data that the data that will receive from CPU receive during with exchange carry out the step-by-step voting, voting result are returned to the CPU of this passage;
The COP that the CPU of each passage enables this passage when consistent when said voting result sends the data that this cycle will export.
9. device as claimed in claim 8 is characterized in that:
Each passage in main control module and the interface module also respectively comprises an interface;
The COP that CPU enables this passage sends the data that this cycle will export and is meant:
The COP that CPU enables this passage sends the interface that data that this cycle will export are given this passage, gives outside by the interface output data of this passage.
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| CN201210320228XA CN102830647A (en) | 2012-08-31 | 2012-08-31 | Double 2-vote-2 device for fail safety |
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Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103391298A (en) * | 2012-05-08 | 2013-11-13 | 上海富欣智能交通控制有限公司 | Rail transit real-time data synchronization system based on network communication |
| CN104503247A (en) * | 2014-11-20 | 2015-04-08 | 上海富欣智能交通控制有限公司 | Double-system synchronization method applied to double 2-vote-2 computer system |
| CN105824273A (en) * | 2016-03-15 | 2016-08-03 | 北京交通大学 | Ground object controller in train operation control system |
| WO2019011063A1 (en) * | 2017-07-10 | 2019-01-17 | 比亚迪股份有限公司 | Synchronizing method for two out of two-by-two system and computer device |
| CN109240975A (en) * | 2017-07-10 | 2019-01-18 | 比亚迪股份有限公司 | Two take two system synchronous method and device |
| CN109639381A (en) * | 2018-12-10 | 2019-04-16 | 交控科技股份有限公司 | City rail traffic signal system safety computer platform host software calibration method |
| CN109677454A (en) * | 2018-11-23 | 2019-04-26 | 交控科技股份有限公司 | The method for monitoring state of safety computer platform in city rail traffic signal system |
| WO2019091074A1 (en) * | 2017-11-10 | 2019-05-16 | 北京全路通信信号研究设计院集团有限公司 | Leu processing board |
| CN112782966A (en) * | 2020-12-30 | 2021-05-11 | 卡斯柯信号有限公司 | Scattered equipment driving system for rail transit signal control |
| CN114764399A (en) * | 2022-04-07 | 2022-07-19 | 北京和利时系统工程有限公司 | Vehicle-mounted display device |
| CN116880153A (en) * | 2023-09-07 | 2023-10-13 | 比亚迪股份有限公司 | Two-in-two system, control method thereof and railway vehicle |
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Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103391298A (en) * | 2012-05-08 | 2013-11-13 | 上海富欣智能交通控制有限公司 | Rail transit real-time data synchronization system based on network communication |
| CN104503247A (en) * | 2014-11-20 | 2015-04-08 | 上海富欣智能交通控制有限公司 | Double-system synchronization method applied to double 2-vote-2 computer system |
| CN105824273A (en) * | 2016-03-15 | 2016-08-03 | 北京交通大学 | Ground object controller in train operation control system |
| CN105824273B (en) * | 2016-03-15 | 2018-10-12 | 北京交通大学 | Ground target controller in train operation control system |
| WO2019011063A1 (en) * | 2017-07-10 | 2019-01-17 | 比亚迪股份有限公司 | Synchronizing method for two out of two-by-two system and computer device |
| CN109240975A (en) * | 2017-07-10 | 2019-01-18 | 比亚迪股份有限公司 | Two take two system synchronous method and device |
| WO2019091074A1 (en) * | 2017-11-10 | 2019-05-16 | 北京全路通信信号研究设计院集团有限公司 | Leu processing board |
| CN109677454A (en) * | 2018-11-23 | 2019-04-26 | 交控科技股份有限公司 | The method for monitoring state of safety computer platform in city rail traffic signal system |
| CN109639381A (en) * | 2018-12-10 | 2019-04-16 | 交控科技股份有限公司 | City rail traffic signal system safety computer platform host software calibration method |
| CN112782966A (en) * | 2020-12-30 | 2021-05-11 | 卡斯柯信号有限公司 | Scattered equipment driving system for rail transit signal control |
| CN114764399A (en) * | 2022-04-07 | 2022-07-19 | 北京和利时系统工程有限公司 | Vehicle-mounted display device |
| CN116880153A (en) * | 2023-09-07 | 2023-10-13 | 比亚迪股份有限公司 | Two-in-two system, control method thereof and railway vehicle |
| CN116880153B (en) * | 2023-09-07 | 2024-01-09 | 比亚迪股份有限公司 | Two-in-two system, control method thereof and railway vehicle |
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Application publication date: 20121219 |