CN101261932A

CN101261932A - A bonding method for low-temperature round slice

Info

Publication number: CN101261932A
Application number: CNA2008100473705A
Authority: CN
Inventors: 陈明祥; 刘文明; 刘胜
Original assignee: Huazhong University of Science and Technology
Current assignee: Huazhong University of Science and Technology
Priority date: 2008-04-18
Filing date: 2008-04-18
Publication date: 2008-09-10

Abstract

The invention provides a low temperature wafer bonding method. A solder layer is manufactured in bonding areas of two wafers respectively. The surface of the solder layer of one wafer is provided with an active reaction layer; the bonding areas of the two wafers are aligned, an extrusion force is applied to the bonding areas; meanwhile, an energy excitement is provided for the active reaction layer to ensure that the active reaction layer gives a solid phase reaction to generate a large amount of heat, thus melting the solder layer and realizing the bonding of the two wafers. The low temperature wafer bonding method satisfies the bonding requirement among the same materials or different materials with great thermal expansion coefficient difference, improves the encapsulating efficiency of electronic devices, and decreases the influences of the thermal distortion and the residual heat stress generated in the bonding process on the performance of the devices.

Description

A kind of bonding method for low-temperature round slice

Technical field

The present invention relates to a kind of wafer bonding method that is used for Electronic Packaging, relate in particular to a kind of silicon and non-silica-based MEMS device, IC device, integrated wafer bonding technology of photoelectric device of being used for.

Prior art

Wafer bonding is meant that making, the bonding process of micro-electromechanical system (MEMS) (Micro-electro-mechanical system) structure 2 and circuit all carry out on disk 1, cut after bonding is finished again, and forms single chip, as shown in Figure 1.Wafer bonding both can be used for the encapsulation of MEMS device, also can be used for MEMS and other element manufacturing.As the preparation of large-power light-emitting diodes (LED), for reducing the encapsulation stress and the thermal resistance of chip, improve light extraction efficiency, need to adopt wafer bonding to realize substrate-transfer.The wafer bonding technology has improved MEMS device package efficient, encapsulation rate of finished products and reliability widely, thereby is a kind of effective means that reduces packaging cost.Developed multiple wafer bonding technology at present, as anode linkage, silicon wafer Direct Bonding, eutectic bonding, thermocompression bonding, glass solder bonding etc., but above-mentioned wafer bonding technology all relates to the pyroprocess of whole heating, process time is long, and the high temperature that encapsulation process produces can cause adverse effect to the MEMS device performance: 1) high temperature causes cause thermal damage (will damage CMOS aluminium circuit as the high temperature above 400 ℃) to temperature-sensitive circuit on the disk and micro-structural; 2) high temperature is easily introduced impurity, the redistribution that causes substrate to mix; 3) for the bigger storeroom bonding of thermal coefficient of expansion (CTE) difference, high temperature causes very big distortion and residual thermal stress, directly has influence on device performance and encapsulation rate of finished products.On the other hand, though technological temperatures such as viscose glue bonding, solder bonding and surface active low-temperature bonding are low, the bond strength of solder bonding and viscose glue bonding is lower, and the device serviceability temperature is limited, and viscose glue bonding right and wrong are bubble-tight, and application is very limited; The surface active low-temperature bonding process time long (being generally several hours to tens hours), efficient is lower, and owing to relate to surface treatment, is difficult to satisfy the wafer bonding requirement that contains figure and circuit.

Proposed the thought of localized heating bonding in recent years, it is small local 3 promptly to make heat only concentrate on bonding region in the bonding process, and other zones and MEMS device 4 still keep low temperature on wafer substrate 1, the disk sealing cap 3, thereby have avoided the high temperature adverse effect, as Fig. 2.Resistance heating, laser, microwave, induction heating etc. all can be used for the localized heating encapsulation of MEMS.But electric-resistivity method requires to have increased technology difficulty and complexity at the little heater wire of the extra layout of bonding region; Laser method only is fit to contain the bonding of light absorbent, and needs during bonding accurately to aim at, and complicated operation is difficult to realize producing in enormous quantities; The microwave method apparatus expensive in order to prevent the generation of plasma, must keep vacuum in the microwave cavity in the bonding process; As shown in Figure 3, induction heating is to adopt radio frequency source 5, by an inductor 7, produce the electromagnetic field 6 of a variation, be on the brazing metal closed hoop 9 that changes in the electromagnetic field and produce vortex flow, the rapid melting solder of the heat that vortex flow causes, the bonding of realization silicon chip substrate 8 and sheet glass sealing cap 10.But induction heating only is fit to circle or annular bonded layer, in the bonding process sensor structure, impedance matching etc. is had relatively high expectations, and has electromagnetic interference.

The development of MEMS and photoelectric technology (as semiconductor lighting, solar energy etc.) is to system in package (SIP) and the three-dimensional integrated new requirement that proposed.Press for a kind of low-temperature round slice bonding techniques of development, satisfy bigger homogeneity of thermal mismatching or the bonding requirement between dissimilar materials, and require bonding speed fast, bonding stress and distortion are little, and be little to the device thermal impact.

Summary of the invention

The objective of the invention is to overcome the defective of prior art, a kind of low-temperature round slice bonding techniques is provided, satisfy bigger homogeneity of coefficient of thermal expansion differences or the bonding requirement between dissimilar materials, improve the packaging efficiency of electronic device, reduce the thermal deformation that produces in the bonding process, residual thermal stress influence device performance.

A kind of bonding method for low-temperature round slice that the present invention announces, make solder layer at the bonding region of two disks respectively, the solder layer of disk surface makes the active reaction layer therein, the bonding region of two disks is aimed at, apply extruding force to bonding region, provide an energy excitation to the active reaction layer simultaneously, make it that solid phase reaction take place and produce a large amount of heats, thereby the melting bed of material is realized the bonding of two disks.

As improvement of the present invention, described active reaction layer is by two kinds or two or morely have the material that mixes negative calorific value and constitute for example Al and Ni, or Al and Ti, or Ni and Si, or Nb and Si.

As a further improvement on the present invention, described active reaction layer is that thickness is 30～100um by the alternately stack or mix the layer structure of forming by the nano particle of each material of the nano thin-film of above-mentioned various materials.

As another improvement of the present invention, described energy is actuated to electric spark or laser or focused beam or inducing eddy-current.

Compared with prior art, the present invention has following advantage: active reaction layer and solder layer thickness less (being generally micron dimension), thermal capacity is little, and reaction speed fast (reaction time is in the millisecond magnitude), therefore heat only is confined in the bonding region, and the nonbonding district still is in low temperature, and thermal impact is little, avoided destruction to temperature-sensitive circuit and micro-structural, and the efficient height.Form by thickness or the material of adjusting active reaction layer and solder layer, can realize effective control of para-linkage temperature and bonding material, satisfy the low-temperature bonding requirement between homogeneity or dissimilar materials.

Description of drawings

Fig. 1 is the wafer bonding technological process that contains the MEMS device array;

Fig. 2 is a localized heating wafer bonding schematic diagram;

Fig. 3 is induction localized heating bonding schematic diagram;

Fig. 4 is a bonding disk manufacture craft flow chart of the present invention, and Fig. 4 (a) is a flow chart of steps, and Fig. 4 (b) is and the corresponding effect schematic diagram of step shown in Fig. 4 (a);

Fig. 5 is the embodiment of the invention one a wafer bonding schematic diagram;

Fig. 6 carries out wafer level bonding igniting schematic diagram for microlens array, and Fig. 6 (a) is self-propagating reaction igniting schematic diagram, and Fig. 6 (b) is microlens array figure;

Fig. 7 is the embodiment of the invention two wafer bonding schematic diagrames.

Embodiment

Specify the present invention below in conjunction with embodiment and accompanying drawing.

Embodiment one

1. the bonding disk is made: adopt standard RCA technology cleaning silicon chip 11 and PYREX sheet glass 17, deposit AuCr Seed Layer 12 respectively by sputtering technology on silicon chip 11 and PYREX glass wafer 17, electroplate the 200um lead-tin soldering bed of material 13 then, as Fig. 4-b;

2. the active reaction layer is made: high-purity nm Al powder and Ni powder are evenly mixed, fully stir in organic solvent, form body of paste.Adopt silk-screen printing technique, the nano metal cream that configures is deposited on the silicon chip solder layer, and thickness is 40um, and its technological process is shown in Fig. 4 (a), the organic solvent of removing in the nano metal cream by low temperature annealing process also solidifies then, can obtain active reaction layer 14;

3. wafer bonding is aimed at: silicon chip 11 is placed on the anchor clamps 15 of bonding machine, silicon chip treats that bonding face makes progress, and treats that with PYREX sheet glass 17 bonding face down, and with silicon chip on bonding figure array alignment, fix by last anchor clamps 18, bonding pressure 16 is 10N, as shown in Figure 5.

4. igniter is aimed at, and utilizes the focussing force of 21 pairs of light of lens, directional light 22 is become converge the corresponding active reaction layer 14 of 20, one lenticules of light, adjusts microlens array 19, makes lens focus on the active reaction layer, as shown in Figure 6.

5. igniting bonding: keeping bonding chamber vacuum is 0.1-1Pa, opens light source, triggers that active reaction layer array reacts on the disk, produces high temperature at bonding region, and molten Pb tin solder 13 is realized the whole low-temperature bonding on the disk;

6. after cooling to room temperature, close the bonding machine, take out bonding pad, the bonding operation is finished.

Embodiment two

1. the bonding disk is made: adopt standard RCA technology cleaning silicon chip 11, the making of bonding cap layer is the elder generation about 20nmCr of vacuum evaporation and 50nmAu on silicon chip, adopt electroplating technology that the Au film is thickened 1-2um then, silicon chip substrate then after steaming chromium coating 23 and gold layer 24, deposits the tin layer 25 of one deck 3-5um and the gold layer of 1-2um again;

2. the active reaction layer is made: as active reaction layer 26, the thickness in monolayer of every kind of metallic film is 20-50nm to replace two kinds of metallic films of vacuum evaporation (as Al film and Ni film) on silicon chip substrate, and the gross thickness of film is 100um;

3. the bonding disk is aimed at, and silicon chip substrate 29 is positioned on the anchor clamps 15 of bonding machine, treats bonding face upwards, places bonded silica cap 30 and aims at silicon chip substrate, fixes by anchor clamps 18, applies the bonding pressure of about 10N, as shown in Figure 7;

4. igniting bonding: opening point ignition source 28, produce electric sparks at electrode 27, trigger that the active reaction layer reacts on the disk, produce high temperature at bonding region, fusing tin layer forms the Sn/Au eutectic phase fast at golden tin interface, realizes the whole low-temperature bonding on the disk;

5. after cooling to room temperature, close the bonding machine, take out bonding pad, the bonding operation is finished.

Claims

1, a kind of bonding method for low-temperature round slice, make solder layer at the bonding region of two disks respectively, it is characterized in that, also the solder layer of disk surface makes the active reaction layer therein, the bonding region of two disks is aimed at, applied extruding force, provide an energy excitation to the active reaction layer simultaneously to bonding region, make it that solid phase reaction take place and produce a large amount of heats, thereby the melting bed of material is realized the bonding of two disks.

2, a kind of bonding method for low-temperature round slice as claimed in claim 1 is characterized in that, described active reaction layer is by two kinds or two or morely have the material that mixes negative calorific value and constitute.

3, a kind of bonding method for low-temperature round slice as claimed in claim 2 is characterized in that, the material that constitutes described active reaction layer is Al and Ni, or Al and Ti, or Ni and Si, or Nb and Si.

4, a kind of bonding method for low-temperature round slice as claimed in claim 2 is characterized in that, described active reaction layer is by the alternately stack or mix the layer structure of forming by the nano particle of each material of the nano thin-film of described various materials.

5, a kind of bonding method for low-temperature round slice as claimed in claim 4 is characterized in that, described active reaction layer thickness is 30～100um.

6, a kind of bonding method for low-temperature round slice as claimed in claim 1 is characterized in that, described energy is actuated to electric spark or laser or focused beam or inducing eddy-current.

7, a kind of bonding method for low-temperature round slice as claimed in claim 1 is characterized in that, adopts silk screen printing or vacuum deposition method that described active reaction layer is fabricated into described solder layer surface.