CN101246838A - Semiconductor isolation structure and forming method thereof - Google Patents
Semiconductor isolation structure and forming method thereof Download PDFInfo
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- CN101246838A CN101246838A CNA2007100376772A CN200710037677A CN101246838A CN 101246838 A CN101246838 A CN 101246838A CN A2007100376772 A CNA2007100376772 A CN A2007100376772A CN 200710037677 A CN200710037677 A CN 200710037677A CN 101246838 A CN101246838 A CN 101246838A
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Abstract
The invention is a method for forming a semiconductor isolation structure, comprising the steps of: providing a semiconductor substrate; forming a sacrificial oxide layer on the semiconductor substrate; forming a mask on the sacrificial oxide layer, and patterning the mask to define an active region and a isolated region on the semiconductor substrate; implanting oxygen ions to the isolated region through the sacrificial oxide layer; removing the mask; annealing the semiconductor substrate to arrange the oxygen ions evenly, thus forming the isolation structure; and removing the sacrificial oxide layer. According to the invention, the process is simple, the complexity of current preparing process of a STI isolated structure, which is caused by introducing a nitride inner lining layer and a dielectric layer, is avoided, and the defect that stress exists between introducing layers is also overcome.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors, particularly a kind of semiconductor isolating structure formation method and isolation structure thereof.
Background technology
Semiconductor integrated circuit includes source region and the isolated area between active area usually, and these isolated areas formed before making active device.The method that forms area of isolation in the prior art mainly contains carrying out local oxide isolation technology (LOCOS) and shallow ditch groove separation process (STI).LOCOS technology is at crystal column surface silicon oxide deposition and silicon nitride layer, then silicon nitride layer is carried out etching, forms groove, at trench region growth isolating oxide layer.Because the hot expansibility difference in the oxidizing process between silicon nitride and the silicon, on the border of silicon nitride and silica, oxygen is diffused into below the silicon nitride by silica, combine with silicon and to form oxide-film once again, form so-called " beak ", make nitride film become projection, as shown in Figure 1.This " beak " taken actual space, increased the volume of circuit, and, in manufacturing process, wafer is produced stress rupture.Therefore LOCOS technology only is applicable to the design and the manufacturing of large-size device.
Along with semiconductor technology enters the deep-submicron epoch, the device below the 0.18 μ m for example active area isolation layer of MOS circuit adopts shallow ditch groove separation process (STI) to make mostly.Shallow ditch groove separation process solves the effective ways that carrying out local oxide isolation causes " beak " problem in the MOS circuit.
As application number is the manufacture method of the fleet plough groove isolation structure described of 01118829 application documents, with reference to the accompanying drawings shown in the 2a to 2f, at first, with reference to figure 2a, on semiconductor substrate 100, form pad oxide 110 and corrosion barrier layer 120, form the photoresist of patterning on corrosion barrier layer 120, and be mask with the photoresist of patterning, etching pad oxide 110 and corrosion barrier layer 120 are to semiconductor substrate 100; With reference to figure 2b, be mask with corrosion barrier layer 120, etching semiconductor substrate 100 forms shallow trench 130.
Then, with reference to figure 2c, form lining oxide layer 140 on the surface of groove 130, lining oxide layer 140 can be insulating material such as silicon dioxide, forms silicon oxynitride layer 160 afterwards on lining oxide layer 140; With reference to figure 2d, megohmite insulant (as silicon dioxide) is inserted in the groove 130, and covered silicon oxynitride layer 160 sidewalls and whole corrosion barrier layer 120, form isolating oxide layer 150; Then, with reference to figure 2e, the isolating oxide layer of inserting 150 is carried out planarization, as adopt CMP (Chemical Mechanical Polishing) process to remove isolating oxide layer 150 on the corrosion barrier layer 120, at last, with reference to figure 2f, remove corrosion barrier layer 120 and pad oxide 110, the technology of removing pad oxide 110 generally adopts wet etching, and the fleet plough groove isolation structure of formation is shown in Fig. 2 f.
The formation method processing step of above-mentioned fleet plough groove isolation structure is more, the technology more complicated, and the isolation structure of formation is more complicated also.Along with further developing of semiconductor technology, must improve the density of device in the integrated circuit by the size of reduction of device, still,, reduce the processing step of element manufacturing along with size of devices further reduces, become the direction of effort.
In addition, all there is stress in existing fleet plough groove isolation structure between lining oxide layer and the Semiconductor substrate and between lining oxide layer and the silicon oxynitride layer, and this internal stress can form defective (defect) or crack (cracks) at active area, produces leakage current.
Summary of the invention
In view of this, the technical problem that the present invention solves provides a kind of semiconductor isolating structure and forming method thereof, to reduce the complexity of isolation structure manufacture craft, forms simple and effective isolation structure.
For achieving the above object, the invention provides a kind of formation method of semiconductor isolating structure, comprising: Semiconductor substrate is provided; On Semiconductor substrate, form sacrificial oxide layer; Form mask on sacrificial oxide layer, the described mask of patterning defines active area and isolated area on Semiconductor substrate; Inject oxonium ion by sacrificial oxidation course isolated area; Remove mask; Semiconductor substrate is annealed, form isolation structure; Remove sacrificial oxide layer.
The injection energy of oxonium ion is 1KeV～500KeV, and it is 200KeV～300KeV that preferred oxonium ion injects energy.
The implantation dosage of oxonium ion is every square centimeter of 1E12 to 1E18, and the implantation dosage of preferred oxonium ion is every square centimeter of 1E15 to 1E16.
Described annealing temperature is 1000 ℃ to 1400 ℃, and annealing time is 1 μ s to 5 hour.
Annealing process can be selected rapid thermal annealing or boiler tube annealing process for use, and when adopting rapid thermal anneal process, annealing time is 1 μ s to 10min, and during boiler tube annealing, annealing time is 10min to 5h.
Described sacrificial oxide layer is silica or silicon oxynitride.
Correspondingly, a kind of semiconductor isolating structure provided by the invention comprises Semiconductor substrate; The active area that on Semiconductor substrate, forms; And the isolated area between active area; The oxonium ion that comprises injection in the described isolated area.
The injection degree of depth of described oxonium ion is 100
～5000
Owing to adopted technique scheme, compared with prior art, the present invention has the following advantages:
(1) manufacture method of semiconductor isolating structure of the present invention is defining active area and isolated area on formation sacrificial oxide layer and the Semiconductor substrate on the Semiconductor substrate, inject oxonium ion by sacrificial oxidation course isolated area subsequently, finally form isolation structure in isolated area, not only technology is simple, the isolation structure that forms is also fairly simple, and avoid introducing the liner of nitride layer in the formation technology of STI isolation structure in the prior art and dielectric layer technology makes complex manufacturing technology, introduce simultaneously layer with layer between the defective of stress.Make the semiconductor isolating structure of formation better meet of the requirement of manufacturing deep-submicron to nanoscale devices.
(2) the present invention injects oxonium ion in area of isolation, and the isolation structure material of formation is the mixture of the oxonium ion of the oxide of the oxide of Semiconductor substrate or Semiconductor substrate and injection, is conventional at present isolation structure material, and isolation performance is good.By the energy of control oxonium ion injection and dosage and the annealing temperature subsequently and the annealing time of ion injection, can effectively control the density of oxonium ion in the isolation structure of the degree of depth of isolation structure of formation and formation, thus the isolation performance of control isolation structure.
(3) the injection technology process ratio of oxonium ion of the present invention is easier to control.
Description of drawings
Fig. 1 is the schematic diagram of " beak " (bird ' s beak) phenomenon in the silicon nitride marginal growth;
Fig. 2 a to Fig. 2 f is the structural representation of prior art shallow ditch groove separation process;
Fig. 3 to Fig. 6 is the cross section structure schematic diagram of specific embodiment of the invention isolation structure formation method different process step;
Fig. 7 is the process chart of specific embodiment of the invention semiconductor isolating structure formation method.
Embodiment
Below in conjunction with accompanying drawing the specific embodiment of the present invention is described in detail.
The manufacture method of semiconductor isolating structure of the present invention is to be formed with on the Semiconductor substrate of sacrificial oxide layer on the surface, uses the oxonium ion injection method to form the isolated area of complanation between the active area of semiconductor device.Inject in different ions under the condition of energy and ion dose, carry out once or the injection of once above oxonium ion, carry out annealing in process then, form isolation structure.
Shown in 7, be the process chart of semiconductor isolating structure formation method of the present invention with reference to the accompanying drawings.As shown in Figure 7, isolation structure formation method of the present invention comprises: step S101 provides Semiconductor substrate; Step S102 forms sacrificial oxide layer on Semiconductor substrate; Step S103 forms mask on sacrificial oxide layer, the described mask of patterning defines active area and isolated area on Semiconductor substrate; Step S104 injects oxonium ion by sacrificial oxidation course isolated area; Step S105 removes mask; Step S106 anneals to Semiconductor substrate, forms isolation structure; Step S107 removes sacrificial oxide layer.
Shown in 3, provide Semiconductor substrate 300 with reference to the accompanying drawings, at Semiconductor substrate 300 superficial growth sacrificial oxide layers 310; On sacrificial oxide layer 310, be coated with photoresist 330 then, utilize exposure, develop, etc. technology on photoresist 330, form opening, need to form the regional corresponding of isolation structure in the position of photoresist opening and the Semiconductor substrate, therefore, the photoresist opening will be distinguished isolated area 320 and active area 340 in the Semiconductor substrate, between any two active areas 340, all there is isolated area 320 isolated.
Described Semiconductor substrate 300 is a silicon.The material of described sacrificial oxide layer 310 is preferably silicon dioxide, generally adopts the technology of thermal oxidation to form, and for example thermal oxidation forms thickness 50 under 1000 ℃ to 1400 ℃ temperature conditions
To 500
Sacrificial oxide layer 310, the thickness of sacrificial oxide layer 310 is preferably 100
To 150
The material of described sacrificial oxide layer 310 can also be a silicon oxynitride layer, generally adopts low-pressure chemical vapor deposition or plasma auxiliary chemical vapor deposition method to form, and thickness is also 50
To 500
Shown in 4, inject oxonium ion to isolated area 320 with reference to the accompanying drawings, be positioned at the photoresist 330 on the active area 340, be used to prevent that oxonium ion is injected with source region 340 by sacrificial oxide layer 310., to the manufacture process of nanoscale devices,,, can reach and adjust the purpose that oxonium ion injects the degree of depth and volume density at deep-submicron by the dosage of adjustment oxonium ion injection and the energy of injection according to the needs of isolation structure design.Control by energy and dosage, i.e. the degree of depth and the density of the oxonium ions that inject in the isolated areas 320 in the may command Semiconductor substrate 300 oxonium ion that injects.Oxonium ion injects energy and can be divided into greater than 100KeV, between 50 to 100KeV, between 10 to 50KeV, is lower than 10KeV.During high-energy, use lower dosage.When low-yield, use higher dosage.
In the present embodiment, the injection energy of oxonium ion is 1KeV～500KeV, it is 50KeV～400KeV that preferred oxonium ion injects energy, it is 200KeV～300KeV that the oxonium ion that is more preferably injects energy, in the specific embodiment of the present invention, it is 100KeV, 150KeV, 220KeV, 250KeV, 280KeV and 350KeV etc. that the preferred oxonium ion that adopts injects energy; The implantation dosage of oxonium ion is every square centimeter of 1E12 to 1E18, the implantation dosage of preferred oxonium ion is every square centimeter of 1E15 to 1E16, in the specific embodiment of the present invention, the preferred oxonium ion implantation dosage that adopts is every square centimeter of every square centimeter of 1E13, every square centimeter of 1E14, every square centimeter of 5E15, every square centimeter of 8E15 and 1E17 etc.
In a specific embodiment of the present invention, the injection energy of oxonium ion is 250KeV, and the implantation dosage of oxonium ion is every square centimeter of 5E15.
Further, in order to make in the Semiconductor substrate 300 in the isolated areas 320 density of the oxonium ion of the different injection degree of depth more even, can carry out once above oxonium ion and inject, be preferably the oxonium ion that carries out 2 to 4 times and inject, more preferably carry out 3 oxonium ions and inject.When carrying out once above oxonium ion injection, energy and dosage that the each oxonium ion of adjustment that can be suitable injects, for example strengthen the energy and the dosage of oxonium ion injection gradually or reduce energy and the dosage that oxonium ion injects successively, certainly, also increase that can be random or reduce energy and the dosage that oxonium ion injects, but, when repeatedly oxonium ion injects, the energy that each ion injects is preferably different, and the density of the injection oxonium ion that different depths contained in the isolated area 320 after this difference should guarantee repeatedly to inject is uniform.
When carrying out once above oxonium ion injection, identical with the injection technology of carrying out an oxonium ion injection: the injection energy that each oxonium ion injects is 1KeV～500KeV, and it is 200KeV～300KeV that most preferred oxonium ion injects energy; The implantation dosage of oxonium ion is 1E12 to 1E18/every square centimeter, and the implantation dosage of preferred oxonium ion is 1E15 to 1E16/every square centimeter.The degree of depth that oxonium ion of the present invention injects is 100
～5000
Afterwards, shown in 5, remove photoresist layer with reference to the accompanying drawings, Semiconductor substrate is annealed, the oxonium ion that isolated area 320 contains is spread in Semiconductor substrate, form isolation structure, described isolation structure is the oxide of Semiconductor substrate silicon.The technology of removing photoresist is prior art well known to those skilled in the art, for example cineration technics.Described annealing temperature is 1000 ℃ to 1400 ℃, and annealing time is 1 μ s to 5 hour.Annealing process can adopt any common process of prior art, for example boiler tube annealing (FurnaceAnneal), rapid thermal annealing (RTA) and laser annealing (Laser Anneal) etc.
The present invention preferably adopts rapid thermal annealing or boiler tube annealing process, wherein, when adopting rapid thermal anneal process, annealing time is 1 μ s to 10min, annealing temperature is 1000 ℃ to 1400 ℃, the annealing time of selecting for use in the embodiment of rapid thermal annealing of the present invention is 1s, 30s, 1min, 2min, 5min etc., and annealing temperature is 1050 ℃, 1100 ℃, 1200 ℃, 1250 ℃ and 1300 ℃ etc.
When adopting boiler tube annealing, annealing time is 10min to 5h, annealing temperature is 1000 ℃ to 1400 ℃, it is 30min, 1h, 1.5h, 2h and 2.5h etc. that the present invention adopts the annealing time of selecting for use in the embodiment of boiler tube annealing, and annealing temperature is 1050 ℃, 1100 ℃, 1200 ℃, 1250 ℃ and 1300 ℃ etc.
Semiconductor substrate is carried out in the annealing in process process, and oxonium ion spreads in the silicon crystal of Semiconductor substrate, and combines with silicon crystal lattice, forms isolation oxide, for example silica or be doped with the silica of oxonium ion.
Shown in 6, remove sacrificial oxide layer 310 with reference to the accompanying drawings.The removal technology of sacrificial oxide layer 310 can adopt any prior art well known to those skilled in the art, in a specific embodiment of the present invention, adopt wet corrosion technique to remove sacrificial oxide layer 310, for example adopt to have for example hydrogen fluoride solution removal sacrificial oxide layer of ammonium fluoride of buffer reagent, in the technology of removing sacrificial oxide layer 310, Semiconductor substrate 300 is caused as far as possible little damage.
Fig. 6 also is the cross section structure schematic diagram that utilizes the isolation structure of isolation structure formation method formation of the present invention.As shown in Figure 6, semiconductor isolating structure provided by the invention comprises Semiconductor substrate 300; The active area 340 that on Semiconductor substrate 300, forms; And the isolated area between active area 320; The oxonium ion that comprises injection in the described isolated area 320.
The oxonium ion that the present invention injects enters into the lattice of silicon crystal in the isolated area diffusion of annealing process in Semiconductor substrate, forms with oxonium ion that closes on and silicon atom and stablizes firm covalent bond.Therefore, the zone that oxonium ion injects is the isolation structure of high resistivity, and it is for providing the good isolation border between the active area on the Semiconductor substrate.
Technology of the present invention is simple, and the isolation structure of formation is also fairly simple, and avoids introducing the liner of nitride layer in the formation technology of fleet plough groove isolation structure in the prior art and dielectric layer technology makes complex manufacturing technology, introduce simultaneously layer with layer between the defective of stress.And, can be by adjusting energy, dosage and the annealing process subsequently that ion injects, the density of ion and the degree of depth of isolation structure are injected in control, can form the active area isolation structure of smaller szie, help the manufacturing of follow-up deep-submicron or nanoscale active device.
Though the present invention discloses as above with preferred embodiment, the present invention is defined in this.Any those skilled in the art without departing from the spirit and scope of the present invention, all can do various changes and modification, so protection scope of the present invention should be as the criterion with claim institute restricted portion.
Claims (12)
1. the formation method of a semiconductor isolating structure is characterized in that, comprising:
Semiconductor substrate is provided;
On Semiconductor substrate, form sacrificial oxide layer;
Form mask on sacrificial oxide layer, the described mask of patterning defines active area and isolated area on Semiconductor substrate;
Inject oxonium ion by sacrificial oxidation course isolated area;
Remove mask;
Semiconductor substrate is annealed, form isolation structure;
Remove sacrificial oxide layer.
2. according to the formation method of the described semiconductor isolating structure of claim 1, it is characterized in that the technology of injecting oxonium ion by sacrificial oxidation course isolated area is that 1 to 3 time oxonium ion injects.
3. according to the formation method of claim 1 or 2 described semiconductor isolating structures, it is characterized in that the injection energy of oxonium ion is 1KeV～500KeV.
4. according to the formation method of the described semiconductor isolating structure of claim 3, it is characterized in that it is 200KeV～300KeV that oxonium ion injects energy.
5. according to the formation method of claim 1 or 2 described semiconductor isolating structures, it is characterized in that the implantation dosage of oxonium ion is every square centimeter of 1E12 to 1E18.
6. according to the formation method of the described semiconductor isolating structure of claim 5, it is characterized in that the implantation dosage of oxonium ion is every square centimeter of 1E15 to 1E16.
7. according to the formation method of claim 1 or 2 described semiconductor isolating structures, it is characterized in that annealing temperature is 1000 ℃ to 1400 ℃.
8. according to the formation method of claim 1 or 2 described semiconductor isolating structures, it is characterized in that annealing time is 1 μ s to 5 hour.
9. according to the formation method of the described semiconductor isolating structure of claim 1, it is characterized in that described sacrificial oxide layer is silica or silicon oxynitride.
10. a semiconductor isolating structure is characterized in that, comprising:
Semiconductor substrate;
The active area that on Semiconductor substrate, forms;
And the isolated area between active area;
The oxonium ion that comprises injection in the described isolated area.
11. semiconductor isolating structure according to claim 10 is characterized in that, the injection degree of depth of described oxonium ion is
12. semiconductor isolating structure according to claim 10 is characterized in that, described Semiconductor substrate is a silicon.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2007100376772A CN101246838A (en) | 2007-02-13 | 2007-02-13 | Semiconductor isolation structure and forming method thereof |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2007100376772A CN101246838A (en) | 2007-02-13 | 2007-02-13 | Semiconductor isolation structure and forming method thereof |
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|---|---|
| CN101246838A true CN101246838A (en) | 2008-08-20 |
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| CNA2007100376772A Pending CN101246838A (en) | 2007-02-13 | 2007-02-13 | Semiconductor isolation structure and forming method thereof |
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