CN101246840A - Semiconductor isolation structure and forming method thereof - Google Patents

Abstract

The invention is a method for forming a semiconductor isolation structure, comprising the steps of: providing a semiconductor substrate which is a silicon on insulated substrate; forming a sacrificial oxide layer on the semiconductor substrate; forming a mask on the sacrificial oxide layer, and patterning the mask to define an active region and a isolated region on the semiconductor substrate; implanting oxygen ions to the isolated region through the sacrificial oxide layer; removing the mask; annealing the semiconductor substrate to arrange the oxygen ions ions evenly, thus forming the isolation structure; and removing the sacrificial oxide layer. According to the invention, the process is simple, the complexity of current preparing process of a STI isolated structure is avoided, and the defect that stress exists between a lining oxide layer and a semiconductor substrate, and between a lining oxide layer and a silicon oxynitride layer is also overcome.

Description

Semiconductor isolating structure and forming method thereof

Technical field

The present invention relates to technical field of manufacturing semiconductors, particularly a kind of semiconductor isolating structure formation method and isolation structure thereof.

Background technology

Semiconductor integrated circuit includes source region and the isolated area between active area usually, and these isolated areas formed before making active device.The method that forms area of isolation in the prior art mainly contains carrying out local oxide isolation technology (LOCOS) and shallow ditch groove separation process (STI).LOCOS technology is at crystal column surface silicon oxide deposition and silicon nitride layer, then silicon nitride layer is carried out etching, forms groove, at trench region growth isolating oxide layer.Because the hot expansibility difference in the oxidizing process between silicon nitride and the silicon, on the border of silicon nitride and silica, oxygen is diffused into below the silicon nitride by silica, combine with silicon and to form oxide-film once again, form so-called " beak ", make nitride film become projection, as shown in Figure 1.This " beak " taken actual space, increased the volume of circuit, and, in manufacturing process, wafer is produced stress rupture.Therefore LOCOS technology only is applicable to the design and the manufacturing of large-size device.

Along with semiconductor technology enters the deep-submicron epoch, the device below the 0.18 μ m for example active area isolation layer of MOS circuit adopts shallow ditch groove separation process (STI) to make mostly.Shallow ditch groove separation process solves the effective ways that carrying out local oxide isolation causes " beak " problem in the MOS circuit.

As application number is the manufacture method of the fleet plough groove isolation structure described of 01118829 application documents, with reference to the accompanying drawings shown in the 2a to 2f, at first, with reference to figure 2a, on semiconductor substrate 100, form pad oxide 110 and corrosion barrier layer 120, form the photoresist of patterning on corrosion barrier layer 120, and be mask with the photoresist of patterning, etching pad oxide 110 and corrosion barrier layer 120 are to semiconductor substrate 100; With reference to figure 2b, be mask with corrosion barrier layer 120, etching semiconductor substrate 100 forms shallow trench 130.

Then, with reference to figure 2c, form lining oxide layer 140 on the surface of groove 130, lining oxide layer 140 can be insulating material such as silicon dioxide, forms silicon oxynitride layer 160 afterwards on lining oxide layer 140; With reference to figure 2d, megohmite insulant (as silicon dioxide) is inserted in the groove 130, and covered silicon oxynitride layer 160 sidewalls and whole corrosion barrier layer 120, form isolating oxide layer 150; Then, with reference to figure 2e, the isolating oxide layer of inserting 150 is carried out planarization, as adopt CMP (Chemical Mechanical Polishing) process to remove isolating oxide layer 150 on the corrosion barrier layer 120, at last, with reference to figure 2f, remove corrosion barrier layer 120 and pad oxide 110, the technology of removing pad oxide 110 generally adopts wet etching, and the fleet plough groove isolation structure of formation is shown in Fig. 2 f.

The formation method technology more complicated of above-mentioned fleet plough groove isolation structure, and all having stress between lining oxide layer and the Semiconductor substrate and between lining oxide layer and the silicon oxynitride layer, this internal stress can form defective (defect) or crack (cracks) at active area.

Along with further developing of technology, must improve the density of device in the integrated circuit by the size of reduction of device, but, along with size of devices further reduces, the stress problem of the complexity of manufacture craft and isolation structure and Semiconductor substrate and isolation structure inside more and more influences the performance of device.

In addition, the Semiconductor substrate of above-mentioned fleet plough groove isolation structure is a silicon, on Semiconductor substrate, form semiconductor device for example after the transistor, transistorized channel layer is positioned at surface of silicon substrate, and for 65nm and following semiconductor device thereof, transistorized channel length is shorter, source electrode in the substrate and drain electrode are very approaching, cause transistorized depletion layer to connect easily, and leakage current is circulated in the semiconductor silicon substrate, cause transistor to lose the controlled function of switching current.

Summary of the invention

In view of this, the technical problem that the present invention solves provides a kind of semiconductor isolating structure and forming method thereof, reduce prior art make the processing step of semiconductor isolating structure and reduce isolation structure and Semiconductor substrate between stress.

For achieving the above object, the invention provides a kind of formation method of semiconductor isolating structure, comprising: Semiconductor substrate is provided, and described Semiconductor substrate is a silicon-on-insulator; On Semiconductor substrate, form sacrificial oxide layer; Form mask on sacrificial oxide layer, the described mask of patterning defines active area and isolated area on Semiconductor substrate; Inject oxonium ion by sacrificial oxidation course isolated area; Remove mask; Semiconductor substrate is annealed, form isolation structure; Remove sacrificial oxide layer.The degree of depth of described isolation structure is identical with the top layer silicon thickness of silicon-on-insulator.

Wherein, injecting oxonium ion technology by sacrificial oxidation course isolated area is that 1 to 3 time oxonium ion injects.

The injection energy of oxonium ion is 1KeV～500KeV, and it is 200KeV～300KeV that preferred oxonium ion injects energy.

The implantation dosage of oxonium ion is every square centimeter of 1E12 to 1E18, and the implantation dosage of preferred oxonium ion is every square centimeter of 1E15 to 1E16.

Described annealing temperature is 1000 ℃ to 1400 ℃, and annealing time is 1 μ s to 5 hour.

Annealing process can be selected rapid thermal annealing or boiler tube annealing process for use, and when adopting rapid thermal anneal process, annealing time is 1 μ s to 10min, and during boiler tube annealing, annealing time is 10min to 5h.

Described sacrificial oxide layer is silicon oxide layer or silicon oxynitride layer.

Correspondingly, a kind of semiconductor isolating structure provided by the invention comprises Semiconductor substrate, and described Semiconductor substrate is a silicon-on-insulator; The active area that on Semiconductor substrate, forms; And the isolated area between active area; The oxonium ion that comprises injection in the described isolated area.

The degree of depth of described isolated area is identical with the top layer silicon thickness of silicon-on-insulator.

Owing to adopted technique scheme, compared with prior art, the present invention has the following advantages:

(1) manufacture method of semiconductor isolating structure of the present invention forms sacrificial oxide layer and define active area and isolated area on Semiconductor substrate on the silicon-on-insulator Semiconductor substrate, inject oxonium ion by sacrificial oxidation course isolated area subsequently, finally form isolation structure in isolated area, not only technology is simple, the isolation structure that forms is also fairly simple, and avoid the formation complex process of STI isolation structure in the prior art, simultaneously between lining oxide layer and the Semiconductor substrate and the defective that all has stress between lining oxide layer and the silicon oxynitride layer.Make the semiconductor isolating structure of formation better meet of the requirement of manufacturing deep-submicron to nanoscale devices.

(2) the present invention injects oxonium ion in area of isolation, and the isolation structure material of formation is the mixture of the oxonium ion of the oxide of the oxide of Semiconductor substrate or Semiconductor substrate and injection, is conventional at present isolation structure material, and isolation performance is good.By the energy of control oxonium ion injection and dosage and the annealing temperature subsequently and the annealing time of ion injection, can effectively control the density of oxonium ion in the isolation structure of the degree of depth of isolation structure of formation and formation, thus the isolation performance of control isolation structure.The injection technology process ratio of oxonium ion of the present invention is easier to control.

(3) the present invention adopts silicon-on-insulator as Semiconductor substrate, compare with direct employing semiconductor silicon substrate, because the degree of depth of the isolation structure that forms in silicon-on-insulator is that the thickness of silicon-on-insulator top layer silicon is identical, therefore, leakage current on the buried insulating barrier of silicon-on-insulator can be blocked between drain electrode and the source electrode makes the device of formation have reasonable channeling effect control ability, and, the formation technology of isolation structure is also fairly simple, and the injection technology ratio is easier to control.

Description of drawings

Fig. 1 is the schematic diagram of " beak " (bird ' s beak) phenomenon in the silicon nitride marginal growth;

Fig. 2 a to Fig. 2 f is the structural representation of prior art shallow ditch groove separation process;

Fig. 3 to Fig. 6 is the cross section structure schematic diagram of specific embodiment of the invention isolation structure formation method different process step;

Fig. 7 is the process chart of specific embodiment of the invention semiconductor isolating structure formation method.

Embodiment

Below in conjunction with accompanying drawing the specific embodiment of the present invention is described in detail.

The manufacture method of semiconductor isolating structure of the present invention is to be formed with on the Semiconductor substrate of sacrificial oxide layer on the surface, use the oxonium ion injection method between the active area of semiconductor device, to form the isolated area of complanation, described Semiconductor substrate is a silicon-on-insulator, inject in different ions under the condition of energy and ion dose, carry out once or once above oxonium ion injects, carry out annealing in process then, form isolation structure.

Shown in 7, be the process chart of semiconductor isolating structure formation method of the present invention with reference to the accompanying drawings.As shown in Figure 7, isolation structure formation method of the present invention comprises: step S101, Semiconductor substrate is provided, and described Semiconductor substrate is a silicon-on-insulator; Step S102 forms sacrificial oxide layer on Semiconductor substrate; Step S103 forms mask on sacrificial oxide layer, the described mask of patterning defines active area and isolated area on Semiconductor substrate; Step S104 injects oxonium ion by sacrificial oxidation course isolated area; Step S105 removes mask; Step S106 anneals to Semiconductor substrate, forms isolation structure; Step S107 removes sacrificial oxide layer.

Shown in 3, provide Semiconductor substrate 300 with reference to the accompanying drawings, at Semiconductor substrate 300 superficial growth sacrificial oxide layers 310; On sacrificial oxide layer 310, be coated with photoresist 330 then, utilize exposure, develop, etc. technology on photoresist 330, form opening, need to form the regional corresponding of isolation structure in the position of photoresist opening and the Semiconductor substrate, therefore, the photoresist opening will be distinguished isolated area 320 and active area 340 in the Semiconductor substrate, between any two active areas 340, all there is isolated area 320 isolated.

Described Semiconductor substrate 300 is a silicon-on-insulator, silicon-on-insulator structurally mainly comprises top layer silicon 300a, buried insulating barrier 300b (Buried oxide layer, BOX) and support substrates 300c, wherein buried insulating barrier 300b is between top layer silicon 300a and support substrates 300c, and conventional buried insulating barrier 300b material is a silicon dioxide.Among the present invention, if there is not specified otherwise, be meant epontic sacrificial oxide layer at top layer silicon 300a at Semiconductor substrate 300 epontic sacrificial oxide layers 310, isolated area and active areas in all Semiconductor substrate 300 also all are formed in the top layer silicon 300a of silicon-on-insulator.

The manufacture craft of silicon-on-insulator can adopt any prior art, for example injection oxygen isolation technology (separation by implanted oxygen, SIMOX) or the bonding and wafer thinning technology (Bond andEtch-back SOI, BESOI).The top layer silicon 300a thickness of the silicon-on-insulator that forms is 2nm to 200nm, and the thickness of buried insulating barrier 300b is 2nm to 200nm.

Owing to have buried insulating barrier 300b under the top layer silicon 300a of silicon-on-insulator, therefore can so that the device and the support substrates 300c material that are positioned on the top layer silicon 300a isolate fully, from reducing junction capacitance and leakage current in essence, improve the performance that top layer silicon 300a goes up the semiconductor device that forms.

The material of described sacrificial oxide layer 310 is preferably silicon dioxide, generally adopts the technology of thermal oxidation to form, and for example thermal oxidation formation thickness exists under 1000 ℃ to 1400 ℃ temperature conditions

Extremely

Sacrificial oxide layer 310, the thickness of sacrificial oxide layer 310 is preferably

Extremely

The material of described sacrificial oxide layer 310 can also be a silicon oxynitride layer, generally adopts low-pressure chemical vapor deposition or plasma auxiliary chemical vapor deposition method to form, and thickness also exists

Extremely

Shown in 4, inject oxonium ion to isolated area 320 with reference to the accompanying drawings, be positioned at the photoresist 330 on the active area 340, be used to prevent that oxonium ion is injected with source region 340 by sacrificial oxide layer 310., to the manufacture process of nanoscale devices,,, can reach and adjust the purpose that oxonium ion injects the degree of depth and volume density at deep-submicron by the dosage of adjustment oxonium ion injection and the energy of injection according to the needs of isolation structure design.Control by energy and dosage, i.e. the degree of depth and the density of the oxonium ions that inject in the isolated areas 320 in the may command Semiconductor substrate 300 oxonium ion that injects.Oxonium ion injects energy and can be divided into greater than 100KeV, between 50 to 100KeV, between 10 to 50KeV, is lower than 10KeV.During high-energy, use lower dosage.When low-yield, use higher dosage.The injection degree of depth of oxonium ion is equal to or less than the thickness of the top layer silicon of silicon-on-insulator.

In the present embodiment, the injection energy of oxonium ion is 1KeV～500KeV, it is 50KeV～400KeV that preferred oxonium ion injects energy, it is 200KeV～300KeV that the oxonium ion that is more preferably injects energy, in the specific embodiment of the present invention, it is 100KeV, 150KeV, 220KeV, 250KeV, 280KeV and 350KeV etc. that the preferred oxonium ion that adopts injects energy; The implantation dosage of oxonium ion is every square centimeter of 1E12 to 1E18, the implantation dosage of preferred oxonium ion is every square centimeter of 1E15 to 1E16, in the specific embodiment of the present invention, the preferred oxonium ion implantation dosage that adopts is every square centimeter of every square centimeter of 1E13, every square centimeter of 1E14, every square centimeter of 5E15, every square centimeter of 8E15 and 1E17 etc.

In a specific embodiment of the present invention, the injection energy of oxonium ion is 250KeV, and the implantation dosage of oxonium ion is every square centimeter of 5E15.

Further, in order to make in the Semiconductor substrate 300 in the isolated areas 320 density of the oxonium ion of the different injection degree of depth more even, can carry out once above oxonium ion and inject, be preferably the oxonium ion that carries out 2 to 4 times and inject, more preferably carry out 3 oxonium ions and inject.When carrying out once above oxonium ion injection, energy and dosage that the each oxonium ion of adjustment that can be suitable injects, for example strengthen the energy and the dosage of oxonium ion injection gradually or reduce energy and the dosage that oxonium ion injects successively, certainly, also increase that can be random or reduce energy and the dosage that oxonium ion injects, but, when repeatedly oxonium ion injects, the energy that each ion injects is preferably different, and the density of the injection oxonium ion that different depths contained in the isolated area 320 after this difference should guarantee repeatedly to inject is uniform.

When carrying out once above oxonium ion injection, identical with the injection technology of carrying out an oxonium ion injection: the injection energy that each oxonium ion injects is 1KeV～500KeV, and it is 200KeV～300KeV that most preferred oxonium ion injects energy; The implantation dosage of oxonium ion is 1E12 to 1E18/every square centimeter, and the implantation dosage of preferred oxonium ion is 1E15 to 1E16/every square centimeter.

In a specific embodiment of the present invention, at first, carry out the oxonium ion injection first time, the injection energy is 210KeV, implantation dosage is every square centimeter of 1E15; Then, carry out the oxonium ion injection second time, the injection energy is 240KeV, and implantation dosage is every square centimeter of 6E15; At last, carry out oxonium ion injection for the third time, the injection energy is 280KeV, and implantation dosage is every square centimeter of 9E15.

Afterwards, shown in 5, remove photoresist layer with reference to the accompanying drawings, Semiconductor substrate is annealed, the oxonium ion that isolated area 320 contains is spread in Semiconductor substrate, form isolation structure, described isolation structure is the oxide of Semiconductor substrate silicon.After the annealing, the degree of depth of the isolation structure of formation is identical with the thickness of the top layer silicon of silicon-on-insulator, is 2nm to 200nm.

The technology of removing photoresist is prior art well known to those skilled in the art, for example cineration technics.Described annealing temperature is 1000 ℃ to 1400 ℃, and annealing time is 1 μ s to 5 hour.Annealing process can adopt any common process of prior art, for example boiler tube annealing (Furnace Anneal), rapid thermal annealing (RTA) and laser annealing (Laser Anneal) etc.

The present invention preferably adopts rapid thermal annealing or boiler tube annealing process, wherein, when adopting rapid thermal anneal process, annealing time is 1 μ s to 10min, annealing temperature is 1000 ℃ to 1400 ℃, the annealing time of selecting for use in the embodiment of rapid thermal annealing of the present invention is 1s, 30s, 1min, 2min, 5min etc., and annealing temperature is 1050 ℃, 1100 ℃, 1200 ℃, 1250 ℃ and 1300 ℃ etc.

When adopting boiler tube annealing, annealing time is 10min to 5h, annealing temperature is 1000 ℃ to 1400 ℃, it is 30min, 1h, 1.5h, 2h and 2.5h etc. that the present invention adopts the annealing time of selecting for use in the embodiment of boiler tube annealing, and annealing temperature is 1050 ℃, 1100 ℃, 1200 ℃, 1250 ℃ and 1300 ℃ etc.

Semiconductor substrate is carried out in the annealing in process process, and oxonium ion spreads in the silicon crystal of Semiconductor substrate, and combines with silicon crystal lattice, forms isolation oxide, for example silica or be doped with the silica of oxonium ion.

In sum, isolation structure manufacturing method of the present invention forms sacrificial oxide layer and define active area and isolated area on Semiconductor substrate on the silicon-on-insulator Semiconductor substrate, inject oxonium ion by sacrificial oxidation course isolated area subsequently, finally form isolation structure in isolated area, not only technology is simple, the isolation structure that forms is also fairly simple, and avoid the formation complex process of STI isolation structure in the prior art, simultaneously between lining oxide layer and the Semiconductor substrate and the defective that all has stress between lining oxide layer and the silicon oxynitride layer.Make the semiconductor isolating structure of formation better meet of the requirement of manufacturing deep-submicron to nanoscale devices.

And, the present invention adopts silicon-on-insulator as Semiconductor substrate, compare with direct employing semiconductor silicon substrate, because the degree of depth of the isolation structure that forms in silicon-on-insulator is that the thickness of silicon-on-insulator top layer silicon is identical, therefore, the leakage current on the buried insulating barrier of silicon-on-insulator can be blocked between drain electrode and the source electrode, make the device of formation have reasonable channeling effect control ability, and the formation technology of isolation structure is also fairly simple, and the injection technology ratio is easier to control.

Shown in 6, remove sacrificial oxide layer 310 with reference to the accompanying drawings.The removal technology of sacrificial oxide layer 310 can adopt any prior art well known to those skilled in the art, in a specific embodiment of the present invention, adopt wet corrosion technique to remove sacrificial oxide layer 310, for example adopt to have for example hydrogen fluoride solution removal sacrificial oxide layer of ammonium fluoride of buffer reagent, in the technology of removing sacrificial oxide layer 310, Semiconductor substrate 300 is caused as far as possible little damage.

Fig. 6 also is the cross section structure schematic diagram that utilizes the isolation structure of isolation structure formation method formation of the present invention.As shown in Figure 6, semiconductor isolating structure provided by the invention comprises Semiconductor substrate 300, and described Semiconductor substrate is a silicon-on-insulator; The active area 340 that on Semiconductor substrate 300, forms; And the isolated area between active area 320; The oxonium ion that comprises injection in the described isolated area 320.

The oxonium ion that the present invention injects enters into the lattice of silicon crystal in the isolated area diffusion of annealing process in Semiconductor substrate, forms with oxonium ion that closes on and silicon atom and stablizes firm covalent bond.Therefore, the zone that oxonium ion injects is the isolation structure of high resistivity, and it is for providing the good isolation border between the active area on the Semiconductor substrate.And the degree of depth of the isolation structure of formation is identical with the thickness of the top layer silicon of silicon-on-insulator, is 2nm to 200nm.

Isolation structure of the present invention is simple, and avoid in the prior art STI isolation structure to introduce lining oxide layer and silicon oxynitride layer, between lining oxide layer and the Semiconductor substrate and the defective that all has stress between lining oxide layer and the silicon oxynitride layer, the semiconductor isolating structure of formation is better met make the requirement of deep-submicron to nanoscale devices.

The present invention adopts silicon-on-insulator as Semiconductor substrate, compare with direct employing semiconductor silicon substrate, because the degree of depth of the isolation structure that forms in silicon-on-insulator is that the thickness of silicon-on-insulator top layer silicon is identical, therefore, leakage current on the buried insulating barrier of silicon-on-insulator can be blocked between semiconductor device drain electrode and the source electrode makes the device of formation have reasonable channeling effect control ability, and, the formation technology of isolation structure is also fairly simple, and the injection technology ratio is easier to control.

Though the present invention discloses as above with preferred embodiment, the present invention is defined in this.Any those skilled in the art without departing from the spirit and scope of the present invention, all can do various changes and modification, so protection scope of the present invention should be as the criterion with claim institute restricted portion.

Claims (12)

1. the formation method of a semiconductor isolating structure is characterized in that, comprising:

Semiconductor substrate is provided, and described Semiconductor substrate is a silicon-on-insulator;

On Semiconductor substrate, form sacrificial oxide layer;

Form mask on sacrificial oxide layer, the described mask of patterning defines active area and isolated area on Semiconductor substrate;

Inject oxonium ion by sacrificial oxidation course isolated area;

Remove mask;

Semiconductor substrate is annealed, form isolation structure;

Remove sacrificial oxide layer.

2. according to the formation method of the described semiconductor isolating structure of claim 1, it is characterized in that the degree of depth of described isolation structure is identical with the top layer silicon thickness of silicon-on-insulator.

3. according to the formation method of the described semiconductor isolating structure of claim 1, it is characterized in that the technology of injecting oxonium ion by sacrificial oxidation course isolated area is that 1 to 3 time oxonium ion injects.

4. according to the formation method of each described semiconductor isolating structure in the claim 1 to 3, it is characterized in that the injection energy of oxonium ion is 1KeV～500KeV.

5. according to the formation method of the described semiconductor isolating structure of claim 4, it is characterized in that it is 200KeV～300KeV that oxonium ion injects energy.

6. according to the formation method of each described semiconductor isolating structure in the claim 1 to 3, it is characterized in that the implantation dosage of oxonium ion is every square centimeter of 1E12 to 1E18.

7. according to the formation method of the described semiconductor isolating structure of claim 6, it is characterized in that the implantation dosage of oxonium ion is every square centimeter of 1E15 to 1E16.

8. according to the formation method of each described semiconductor isolating structure in the claim 1 to 3, it is characterized in that annealing temperature is 1000 ℃ to 1400 ℃.

9. according to the formation method of each described semiconductor isolating structure in the claim 1 to 3, it is characterized in that annealing time is 1 μ s to 5 hour.

10. according to the formation method of each described semiconductor isolating structure in the claim 1 to 3, it is characterized in that described sacrificial oxide layer is silica or silicon oxynitride.

11. a semiconductor isolating structure is characterized in that, comprising:

Semiconductor substrate, described Semiconductor substrate are silicon-on-insulator;

The active area that on Semiconductor substrate, forms;

And the isolated area between active area;

The oxonium ion that comprises injection in the described isolated area.

12. semiconductor isolating structure according to claim 11 is characterized in that, the degree of depth of described isolated area is identical with the top layer silicon thickness of silicon-on-insulator.

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