CN101232006A - Multiple grains module device - Google Patents

Multiple grains module device Download PDF

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Publication number
CN101232006A
CN101232006A CN 200710077619 CN200710077619A CN101232006A CN 101232006 A CN101232006 A CN 101232006A CN 200710077619 CN200710077619 CN 200710077619 CN 200710077619 A CN200710077619 A CN 200710077619A CN 101232006 A CN101232006 A CN 101232006A
Authority
CN
China
Prior art keywords
insulating substrate
module device
package
double
multiple grains
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN 200710077619
Other languages
Chinese (zh)
Inventor
陈庆丰
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
GUIYANG HUAXIANG SEMICONDUCTOR CO Ltd
Original Assignee
GUIYANG HUAXIANG SEMICONDUCTOR CO Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by GUIYANG HUAXIANG SEMICONDUCTOR CO Ltd filed Critical GUIYANG HUAXIANG SEMICONDUCTOR CO Ltd
Priority to CN 200710077619 priority Critical patent/CN101232006A/en
Publication of CN101232006A publication Critical patent/CN101232006A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

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  • Combinations Of Printed Boards (AREA)

Abstract

The invention provides a multi-die module device for electrically connecting a plurality of units on an insulating substrate. The multi-die module device is structurally characterized in that some or all wirings of the units are achieved by adopting binding posts in a multi-die module, and a conductive layer is formed on a part of the surface on the end portion of an insulating substrate and can be directly inserted into a package substrate and a printed circuit board of the package without a plug and then welded with tin solder. The prior package (Package) is SIP-oriented (SINGLE IN LINE PACKAGE). The invention is a 'DIP' (DOUBLE IN LINE PACKAGE) more than an 'SIP' thanks to the easily-achieved advantage of the double-sided metal on end portions. Additionally, the invention is vertically assembled to reduce a cross-sectional area of a package substrate to less than that of 1/10, which greatly facilitates the miniaturization of the package substrate. Moreover, various kinds of structures can be easily manufactured and an application circuit of wider range can be configured easily and rapidly by simplifying the basic structure.

Description

Multiple grains module device
Affiliated technical field
The present invention relates to a kind of new encapsulation technology, especially be applied in the encapsulation integration technology field of multiple foreign peoples's assembly.
Background technology
All can be described as " SIP " (SINGLE IN LINE PACKAGE) by general present all encapsulation (Package) category, promptly single straight cutting encapsulation is for enclosed chip flushes a terminals more than the terminals by the terminal d1~dm joint that electrically connects; The usable floor area of the enclosed chip that it is shared is very huge; Again, general insulating substrate must utilize a lead frame, is assembled on this enclosed chip, so spent cost is higher during production, the time is longer, does not have very much an economic benefit; Therefore how providing a kind of multiple grains module device that addresses the above problem, is for exciting this case inventor's invention motivation.
In view of this, this case inventor is itself being engaged in the relevant industries many years of experience, and constantly pondering over research, the present invention is born, and its primary purpose is that a kind of multiple grains module device is being provided, and has also solved the shortcoming of original technology simultaneously; The device that the present invention system electrically connects on insulating substrate a plurality of unit, its primary structure is: in this multiple grains module, binding post is adopted in the part or all of wiring of this unit, and form conductive layer at the part surface of this insulating substrate end, and do not need to utilize lead frame and can directly insert in the printed circuit board (PCB) of enclosed chip and enclosed chip and with the bonding structure of scolding tin, decline to a great extent in order to do the cost that makes this creation, and weight also alleviates relatively.To existing encapsulation (Package) is based on " SIP " (SINGLE INLINE PACKAGE), promptly single straight cutting envelope fur coat; The present invention not only is " SIP ", and the double-sided metal that utilizes this end can realize simply that " DIP " (DOUB LE IN LINE PACKAGE) is double straight cutting encapsulation, it can obtain double number of pins at bonding portion, so the present invention promptly reaches the effect that stereo-unit distributes, realizes multiple unit density, reduces the enclosed chip area; And the present invention utilizes weldering WU to be bonded to the two sides of the multiple distribution substrate of enclosed chip, makes the present invention reach the effect of reduced volume; In addition, the present invention is vertical assembling, and its area that takies the encapsulation substrate reduces to below 1/10th, is very beneficial for the miniaturization of this encapsulation substrate; As mentioned above,, produce multiple structure in order to do the present invention is easy to, and can construct the wider application circuit of scope simply fast from the simplification of basic structure again.
Embodiment
Hold for making within the convenient the present invention of understanding of your juror, and the effect that can reach, cooperate the graphic specific embodiment of enumerating now, introduction is described as follows in detail:
The figure number explanation
1.. insulating substrate
2.. enclosed chip
3.. resin
4.. scolding tin
5.. binding post
6.. crystal grain
7.. terminals
8.. printed wire
B, C, D, E.. unit
A.. separator
B.. base stage
C.. the employed epitaxial loayer of collector region
D.. buried regions
E.. dark collector electrode doped layer
F.. emitter-base bandgap grading
A.. multiple distribution substrate
(illustrating)
The schematic diagram that first figure it (A) is single straight cutting encapsulation.The schematic diagram that first figure it (B) is the present invention.First figure it (A-1) is the vertical profile floor map of first figure it (A).
See also shown in first figure, wherein first figure it (A) can be called " SIP " (SINGLE IN LINE PACKAGE), and the encapsulation of promptly single straight cutting is for enclosed chip flushes a terminals more than the terminals by the terminal d1~dm joint that electrically connects; It is double straight cutting encapsulation that this first figure it (B) can be described as " DIP " (DOUBLE IN LINE PACKAGE), for enclosed chip 2 by the terminal e1~em that electrically connects, wherein to see through mechanical separation be pectination to this terminal, and the surface of this terminal and inside can have independently and electrically connects; This figure one it (A) is compared with (B), know that by above-mentioned this (B) manys the terminals of twice than (A); With in the present invention,, can effectively dwindle the area of this enclosed chip because of vertically being assemblied on the enclosed chip; In addition, figure one it (A-1) is compared with (B-1), wherein be somebody's turn to do the unit C of (A-1), because of this terminal that electrically connects d1~dm joint is the single face structure, so it also is the single face structure; Should (B-1) be printing electrode of two-sided design through insulating substrate 1 or adopt multiple printed circuit board (PCB), wherein this terminal e1~em can draw from this insulating substrate 1 two sides, and unit C (B-1) also can construct on this insulating substrate 1 two sides, promptly reaches the effect that stereo-unit distributes, realizes multiple unit density, reduces the enclosed chip area.
See also shown in second figure, wherein this protrusion is binding post 5 electrode units, and d1~dm system is the electrode of individual layer, bilayer or alloy such as scolding tin with gold, silver, copper.
See also shown in the 3rd figure it (A), wherein B, C, D, E respectively for the unit of assembling on the enclosed chip 2 for example, see also shown in the 3rd figure it (B), it is the side cutaway view of the 3rd figure it (A), and as the present invention's application examples, the E that sees through A figure, B figure makes comparisons, but intuition finds that the area of its shared enclosed chip 1 significantly reduces.
See also shown in the 4th figure it (A), this unit b1~bm, unit d1~dm are for there being binding post 5 structures, and be assemblied in the both sides of insulating substrate 1, wherein binding post 5 and 1 of the exhausted green substrate of this unit b1~bm, unit d1~dm are filled the good resin 3 of heat conduction, in order to do making this unit reach the good effect of heat radiation; Unit c1~cm constructs for no binding post and is assemblied in the both sides of insulating substrate 1 equally with this unit b1~bm, unit d1~dm again;
See also shown in the 4th figure it (B), wherein this insulating substrate 1 two sides divides other absolute electrode to utilize scolding tin 4 to bond to this enclosed chip 2, even double-sided electrode also needn't all adopt absolute electrode certainly.
See also shown in the 5th figure, in the distribution part of insulating substrate 1, wherein this single face is all or part of has done printed wire 8, and has reached extra fin effect; In actual use, the thickness of general printed wire 8 has only a kind of, and can not make specific fin, during if not specific use, and certainly unquestionable being suitable for.
See also shown in the 6th figure, wherein shown in the 6th figure it (A), wherein a represents that isolation, b are that base stage, c are that the employed epitaxial loayer of collector region, d are that buried regions, e are that dark collector electrode doped layer, f are emitter-base bandgap grading.G1~gm is that binding post 5 wherein sees also shown in the 6th figure it (B), and it is that they (A) crystal grain 6 binding posts of the 6th figure 5g1~gm utilization weldering WU 4 is bonded to the partial enlarged drawing on the insulating substrate 1; Again, see also shown in the 6th figure it (C), it is with the crystal grain 6 shown in the 6th figure it (A), utilizes scolding tin 4 to be bonded to the two sides of the multiple distribution substrate A of enclosed chip, makes the present invention reach the effect of reduced volume.
For making the present invention show its progressive and practicality more, now its advantage is listed below:
1. insulating substrate can not need to use lead frame and directly is assembled on the enclosed chip, so cost is declined to a great extent and weight saving.
2. insulating substrate can vertically be assemblied on the enclosed chip, so the area of this enclosed chip is significantly reduced.
3. can make the present invention reach the effect of reduced volume in the multiple wiring in the two sides of insulating substrate.
4. see through in the exhausted green substrate, partly or all cover the full layer that belongs to, make the present invention reach simple and convenient and effective heat radiation.
5. see through insulating substrate and be printing electrode of two-sided design or adopt multiple printed circuit board (PCB), promptly reach stereo-unit and distribute.Realize the effect of multiple unit density, minimizing enclosed chip area.
6. owing to need not the pressure welding engineering, so make the present invention be easy to a large amount of productions, production cycle shortening.
7. have an industrial utilization.
8. have a practicality.
The above only is the present invention's preferred embodiment, and the variation that utilizes above-mentioned technology of the present invention and method to do such as all should be contained in the interest field of invention.
In sum, the present invention has met the application important document of patent of invention really, and filing an application in the whence in accordance with the law, requests the juror of an ancient unit of weight office explicit example for reference, and vouchsafe this creation patent right, and the true feeling moral just.

Claims (10)

1. the present invention system provides a kind of multiple grains module device, and it is the device that a plurality of unit are electrically connected on insulating substrate; It is characterized in that: its pin is adopted international standards and all or partly electrode of constructing unit on insulating substrate forms and draws binding post, and for electrically connecting at this insulating substrate end single or double between this insulating substrate and enclosed chip forms " the pin metal level is also processed the end in conjunction with above-mentioned this pin, makes it can be directly used in the structure of enclosed chip;
2. according to the 1st described a kind of multiple grains module device of claim, but this insulating substrate layer multiple stratification wherein;
3. according to the 1st described a kind of multiple grains module device of claim, wherein electrically connect the adding insulating barrier on this insulating substrate, in order to do carrying out multiple wiring;
4. according to the 1st described a kind of multiple grains module device of claim, wherein this insulating substrate can connect by single or double with the metal level that electrically connects of enclosed chip;
5. according to the 4th described double-sided metallic of claim, it uses in order to do can be used as two pins by two insulation;
6. according to the 4th described double-sided metallic of claim, its comprehensively single or double use;
7. according to the 1st described a kind of multiple grains module device of claim, certain one side of this insulating substrate wherein, as using as electric wiring with its reverse side, the thickness of its conducting metal is difference partly or entirely;
8. according to the 1st described a kind of multiple grains module device of claim, wherein heat conducting factor is considered in the insulating substrate of this binding post electrode and the space between cell surface (space), fills in order to do carrying out suitable insulant;
9. according to the 1st described a kind of multiple grains module device of claim, wherein the single face of this insulating substrate partly or entirely can be used as the density cooling application;
10. according to the 1st described a kind of multiple grains module device of claim, wherein this insulating substrate can be at the surface apparatus assembly.
CN 200710077619 2007-01-24 2007-01-24 Multiple grains module device Pending CN101232006A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 200710077619 CN101232006A (en) 2007-01-24 2007-01-24 Multiple grains module device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 200710077619 CN101232006A (en) 2007-01-24 2007-01-24 Multiple grains module device

Publications (1)

Publication Number Publication Date
CN101232006A true CN101232006A (en) 2008-07-30

Family

ID=39898336

Family Applications (1)

Application Number Title Priority Date Filing Date
CN 200710077619 Pending CN101232006A (en) 2007-01-24 2007-01-24 Multiple grains module device

Country Status (1)

Country Link
CN (1) CN101232006A (en)

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Open date: 20080730