CN101231963A - Semiconductor module, method for manufacturing the semiconductor module and portable device carrying the same - Google Patents
Semiconductor module, method for manufacturing the semiconductor module and portable device carrying the same Download PDFInfo
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- CN101231963A CN101231963A CNA2007103077823A CN200710307782A CN101231963A CN 101231963 A CN101231963 A CN 101231963A CN A2007103077823 A CNA2007103077823 A CN A2007103077823A CN 200710307782 A CN200710307782 A CN 200710307782A CN 101231963 A CN101231963 A CN 101231963A
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- semiconductor module
- jut
- insulating barrier
- groove
- electrode
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/94—Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
the present invention provides a semiconductor module, method for manufacturing the semiconductor module and portable device carrying the same. In a semiconductor module where a metal sheet, an insulating layer and a circuit element are stacked in a manner that the insulating layer is penetrated with a bump structure, the connection reliability of the bump structure and the circuit element is enhanced. A semiconductor wafer is prepared where a semiconductor substrate having electrodes and protective film on the surface are formed and arranged in a matrix shape. Then, on the surface of the semiconductor wafer, namely, the semiconductor substrate, an insulating layer is held between the substrate and a copper sheet, integrally formed with bumps, having grooves in the vicinity of the bumps. The semiconductor substrate, the insulating layer and the copper sheet, held together, are press-bonded by a press machine into a single block. The bump penetrates the insulating layer, and the bump and the electrode are electrically connected together. An extra part of the insulating layer pushed out by the bump flows into the groove.
Description
Technical field
The present invention relates to semiconductor module and manufacture method thereof.
Background technology
In existing semiconductor module, have and be called as CSP (Chip Size Package: semiconductor module chip size packages).Come and form this CSP semiconductor module by the semiconductor wafer (semiconductor substrate) that is formed with LSI (circuit element) and connected external connecting electrode on an interarea being cut branch.Therefore, semiconductor module can be with the fixed size identical with the LSI chip on circuit board, thereby, can make the circuit board miniaturization that semiconductor module one side is installed.
In recent years, be accompanied by the miniaturization/high performance of electronic equipment, require the further miniaturization of using in the electronic equipment of semiconductor module.Along with the miniaturization of such semiconductor module, be used for being installed in interelectrode pitch on the circuit board narrow essential.As the method for surface mounting of semiconductor module, known have a upside-down mounting installation method that forms solder bump on the external connecting electrode of circuit element, the electrode pad of solder bump and circuit board is carried out solder.In the upside-down mounting installation method, generation of arch formation etc. becomes restriction when the size of solder bump itself and solder, causes the pitch of external connecting electrode to narrow and has boundary.In recent years, in order to overcome such boundary, on circuit element, carry out the configuration again of external connecting electrode by forming wiring again.As such reconfiguration method, for example known have such method, promptly with by etching partially raised structures that metallic plate forms as electrode or path, via insulating barriers such as epoxy resin circuit element is installed on the metallic plate, with the external connecting electrode of circuit element be connected with raised structures (with reference to patent documentation 1).
Patent documentation 1: TOHKEMY 2004-193297 communique
Under the state of conventional semiconductor wafer (semiconductor substrate), with in the raised structures buried insulating layer with metallic plate, insulating barrier and circuit element lamination the time, because insulating barrier is mobile low, especially the discharge place of the resin of being extruded by raised structures in the vicinity, center of semiconductor wafer is few, so there is such problem, be that the residual film of resin is clipped on the interface of raised structures and the circuit element electrode relative with it, the connection reliability at wiring portion place reduces again.
Summary of the invention
The present invention makes in view of such problem, its purpose be to provide a kind of with the raised structures buried insulating layer with semiconductor module with metallic plate, insulating barrier and circuit element lamination in, improve the technology of connection reliability of the electrode of raised structures and circuit element.
A kind of form of the present invention is the manufacture method of semiconductor module.The manufacture method of this semiconductor module is characterized in that, comprising: first operation, the semiconductor substrate of the surperficial electrode that is provided with circuit element and is electrically connected with this circuit element of formation; Second operation forms the jut and the metallic plate that is arranged on first groove of this first type surface that have from the outstanding setting of first type surface; The 3rd operation via insulating barrier crimping metallic plate and semiconductor substrate, is electrically connected jut and electrode by making jut connect insulating barrier.
By this form, the unnecessary insulating barriers of being extruded by jut such as part flow in first groove, the residual film that suppresses insulating barrier is clipped on the interface between jut and the electrode, so can easily make the semiconductor module that the connection reliability of jut and electrode improves.
In said structure, preferably on semiconductor substrate, form a plurality of circuit elements, first groove is formed on to dividing in the scribe area that a plurality of circuit elements are provided with.Scribe area generally is to be divided into the cancellate zone that the mode of each circuit element is surrounded with a plurality of circuit elements that will be on the surface of semiconductor wafer (semiconductor substrate) form in length and breadth, is the zone that is removed with semiconductor wafer (semiconductor substrate) cutting and separately the time.Therefore, can not consider the layout of the wiring layers such as electrode of circuit element, first groove is set in cutting zone, and also can generalization under the situation of making other circuit element again and be used.The result can realize the cost degradation of the semiconductor module of connection reliability raising.
In said structure, preferably in the edge part of circuit element, form electrode.By form the electrode of circuit element near the edge part of having avoided being formed with the integrated circuit zone (scribe area), in scribe area, form first groove, flow to easily in first groove because unnecessary insulating barrier becomes, be clipped on the interface between jut and the electrode so can suppress the residual film of insulating barrier effectively.
In said structure, it is characterized in that, also comprise the 4th operation that forms wiring layer by the processing metal plate, form first groove accordingly with the space diagram of wiring layer, by the metallic plate filming being formed wiring layer from rear side with regulation circuit/space diagram.According to the present invention, has the wiring layer of regulation circuit/space diagram because can form, so do not need the processing metal plate to form the photo-mask process or the etching work procedure of wiring layer according to space diagram self the coupling ground of first groove.The result is the cost degradation of the semiconductor module that can realize that the connection reliability of jut and electrode improves.
In said structure, also can connect metallic plate and form first groove.Under this situation,, be clipped on the interface between jut and the electrode so can further suppress the residual film of insulating barrier because unnecessary insulating barrier flows out to the outside by first groove that connects metallic plate.
In said structure, preferably in the semiconductor substrate of first operation, further form second groove in its surface.Like this, unnecessary insulating barrier flow in first groove and second groove in, the residual film that can further suppress insulating barrier effectively is clipped on the interface between jut and the electrode.Therefore, can more easily make the semiconductor module of the connection reliability raising of jut and electrode.
Other form of the present invention is the manufacture method of semiconductor module.The manufacture method of this semiconductor module is characterised in that, comprising: first operation forms the surface and is provided with circuit element and the electrode that is electrically connected with this circuit element and the semiconductor substrate of groove; Second operation forms the metallic plate with jut; The 3rd operation via insulating barrier crimping metallic plate and semiconductor substrate, is electrically connected jut and electrode by making jut connect insulating barrier, and utilizes insulating barrier to imbed groove.
According to this form, because the insulating barrier of being extruded by jut flows in second groove, the residual film that suppresses insulating barrier is clipped on the interface between jut and the electrode, so can easily make the semiconductor module that the connection reliability of jut and electrode improves.
Other form of the present invention is a semiconductor module.This semiconductor module comprises: be provided with wiring layer integratedly, be provided with the circuit element of the element electrode that is electrically connected with jut and be arranged on wiring layer from the outstanding protuberance of first type surface and circuit element between insulating barrier, wiring layer has groove on first type surface, insulating barrier is filled in the groove.
Other form of the present invention is a semiconductor module.This semiconductor module comprises: be provided with wiring layer integratedly from the outstanding protuberance of first type surface, be provided with the element electrode that is electrically connected with jut circuit element, be arranged on the insulating barrier between wiring layer and the circuit element and be arranged on the first type surface of wiring layer and the intermediate layer between the insulating barrier, the intermediate layer with face that insulating barrier contacts on have groove, insulating barrier is filled in the recess.
Other form of the present invention is a portable equipment.This portable equipment is characterised in that the semiconductor module that comprises above-mentioned any one form.
According to the present invention, with the raised structures buried insulating layer with semiconductor module with metallic plate, insulating barrier and circuit element lamination in, the connection reliability of the electrode of raised structures and circuit element improves.
Description of drawings
Fig. 1 is the summary profile of the semiconductor module of first embodiment of the invention;
Fig. 2 (A)～(D) is the profile that is used for illustrating the formation method of the copper coin with jut and groove;
Fig. 3 (A)～(C) is the profile that is used for illustrating the formation method of the copper coin with jut and groove;
Fig. 4 illustrates the plane graph that the semiconductor substrate of being divided by many line is configured to rectangular semiconductor wafer;
Fig. 5 (A)～(D) is the summary profile of manufacturing process that is used for illustrating the semiconductor module of first embodiment;
Fig. 6 (A)～(C) is the summary profile of manufacturing process that is used for illustrating the semiconductor module of first embodiment;
Fig. 7 is the summary profile of the copper coin with jut and groove of second embodiment of the invention;
Fig. 8 (A)～(C) is the summary profile of manufacturing process that is used for illustrating the semiconductor module of second embodiment;
Fig. 9 (A)～(C) is the summary profile of manufacturing process that is used for illustrating the semiconductor module of second embodiment;
Figure 10 is the summary profile of the copper coin with jut and groove of third embodiment of the invention;
Figure 11 (A)～(C) is the summary profile of manufacturing process that is used for illustrating the semiconductor module of the 3rd embodiment;
Figure 12 (A), Figure 12 (B) are the summary profiles of manufacturing process that is used for illustrating the semiconductor module of the 3rd embodiment;
Figure 13 is the summary profile of the copper coin with jut and groove of four embodiment of the invention.
Figure 14 (A)～(C) is the summary profile of manufacturing process that is used for illustrating the semiconductor module of the 4th embodiment;
Figure 15 (A)～(C) is the summary profile of manufacturing process that is used for illustrating the semiconductor module of the 4th embodiment;
Figure 16 (A)～(D) is the summary profile of manufacturing process that is used for illustrating the semiconductor module of the 5th embodiment;
Figure 17 (A)～(C) is the summary profile of manufacturing process that is used for illustrating the semiconductor module of the 5th embodiment;
Figure 18 (A)～(D) is the summary profile of manufacturing process that is used for illustrating the semiconductor module of the 6th embodiment;
Figure 19 (A)～(C) is the summary profile of manufacturing process that is used for illustrating the semiconductor module of the 6th embodiment;
Figure 20 is the summary profile of the semiconductor module of seventh embodiment of the invention;
Figure 21 is the summary profile of the semiconductor module of eighth embodiment of the invention;
Figure 22 is the stereogram that the groove in the first type surface S2 of wiring figure, shown in Figure 21 forms part 92;
Figure 23 is the summary profile of the semiconductor module of the 9th embodiment;
Figure 24 (A)～(B) is the profile of formation method that is used for illustrating the intermediate layer of the semiconductor module that constitutes embodiment nine;
Figure 25 is the structure chart that mobile phone tenth embodiment of the invention, that comprise semiconductor module is shown;
Figure 26 is the fragmentary cross-sectional view (profile of first housing) of the mobile phone shown in Figure 25.
Description of reference numerals
1 semiconductor substrate, 2 circuit element 2a electrodes, 3 diaphragms
4 leading sections of wiring figure (wiring layer) 4a jut 4a1 jut again
6 semiconductor modules form regional 7 insulating barriers, 8 external connecting electrodes (soldered ball)
Embodiment
Specific implementation embodiment of the present invention are described below with reference to the accompanying drawings.In addition, in whole accompanying drawings, the identical Reference numeral of inscape mark for identical omits suitably explanation.
(first embodiment)
Fig. 1 is the summary profile according to the semiconductor module of first embodiment of the invention.The semiconductor module of first embodiment is described according to Fig. 1.
Specifically, insulating barrier 7 is formed on the surperficial S1 (a following side) of semiconductor substrate 1, and its thickness for example is about 60 μ m.The material that insulating barrier 7 produces plastic flowing by when pressurization constitutes.The material that produces plastic flowing during as pressurization can exemplify the epoxies thermosetting resin.Epoxies thermosetting resin as insulating barrier 7 for example can be under the condition of 160 ℃ of temperature, pressure 8MPa, has the material that viscosity is the 1kPas characteristic.In addition, under the condition of 160 ℃ of temperature, this material under with the situation of 15MPa exert pressure and non-pressurized situation compare, the viscosity of resin drops to about 1/8.To this, the epoxy resin in the B stage before the hot curing is under the condition below the glass transition temperature Tg, and to compare degree identical with the non-pressurized situation of resin, do not have viscosity, even pressurization can not produce viscosity yet.
Wiring figure (wiring layer) 4 is formed on the insulating barrier 7 again.Be provided with outstandingly and connect jut (conductor portion of the overshooting shape) 4a of this insulating barrier 7 at wiring figure 4 more integratedly, and the groove 4b of buried insulating layer 7 (insulating barrier 7a) be set at this first type surface S2 from first type surface S2.Wiring figure 4 and jut 4a for example adopt the rolled metal that is made of rolling copper again.Compared with the metal film that is made of the copper that forms by electroplating processes etc. by the rolled metal that copper constitutes, intensity height on this aspect of mechanical strength is as the excellent material performance that is used for connecting up again.The thickness of wiring figure 4 for example is about 30 μ m again, and the height of jut 4a (thickness) for example is about 60 μ m.Jut 4a has: be set to circle, the leading section 4a1 parallel with the contact-making surface of the electrode 2a of semiconductor substrate 1 contact and along with the side surface part 4a2 that forms near leading section 4a1 variation in diameter.The diameter of jut 4a front end (leading section 4a1) and the diameter of basal plane are about φ 40 μ m and φ 60 μ m respectively.In addition, jut 4a is arranged on the position corresponding with electrode 2a.The front end of jut 4a (leading section 4a1) forms with the electrode 2a of semiconductor substrate 1 and directly contacts, electrode electrically connected 2a and wiring figure 4 again.The degree of depth of the last groove 4b that is provided with of wiring figure (wiring layer) 4 first type surface S2 for example is about 15 μ m again.Groove 4b is arranged near the jut 4a, with in the jut 4a buried insulating layer 7 so that when copper coin 4z, insulating barrier 7 and circuit element 2 laminations, the unnecessary insulating barriers of being extruded by jut 4a 7 such as part flow among the groove 4b.In addition, semiconductor substrate 1 is that " semiconductor substrate " of the present invention, circuit element 2 are that " circuit element " of the present invention, electrode 2a are that " electrode " of the present invention, jut 4a are that " jut " of the present invention, groove 4b are that " first groove " of the present invention, copper coin 4z are that " metallic plate " of the present invention, insulating barrier 7 are examples of " insulating barrier " of the present invention.
(manufacture method)
Fig. 2 and Fig. 3 are the profiles that is used for illustrating the formation method of the copper coin with jut and groove.Fig. 4 is expression is configured to rectangular semiconductor wafer by the semiconductor substrate of many line divisions a plane graph.Fig. 5 and Fig. 6 are the summary profiles of manufacturing process that is used for illustrating the semiconductor module of first embodiment shown in Figure 1.Next, with reference to Fig. 1～Fig. 6, the manufacturing process of the semiconductor module of first embodiment is described.
Shown in Fig. 2 (A), prepare copper coin 4z, its thickness is at least than the height of jut (conductor portion of overshooting shape) 4a with the thickness sum of wiring figure (connecting up again) 4 is also big again.Here, the thickness of copper coin 4z is about 300 μ m.As copper coin 4z, adopt the rolled metal that constitutes by rolling copper.
Shown in Fig. 2 (B), utilize common photoetching process, the jut in semiconductor module forms zone 6 forms the zone and forms Etching mask 9a.Here, jut forms the arrangement in zone to form the position of each electrode 2a of the semiconductor substrate 1 in regional 6 the semiconductor wafer corresponding be divided into a plurality of semiconductor modules by many line 5.
Shown in Fig. 2 (C), be that mask carries out etch processes with this Etching mask 9a, form the jut 4a that is set to from the outstanding compulsory figure of the first type surface S2 of copper coin 4z.At this moment, by adjusting etching condition, form the side surface part 4a2 that has along with the leading section 4a1 variation in diameter of close jut 4a.Here, the height of jut 4a is about 60 μ m, and the diameter of jut 4a front end (leading section 4a1) and the diameter of basal plane are about φ 40 μ m and φ 60 μ m respectively.In addition, the copper coin 4z that is provided with jut 4a is an example of " metallic plate " of the present invention.
Shown in Fig. 2 (D), remove Etching mask 9a.Form jut 4a thus, this jut 4a has the leading section 4a1 relative with copper coin 4z and forms along with the side surface part 4a2 near leading section 4a1 variation in diameter.In addition, can also adopt silver metal masks such as (Ag) to replace Etching mask 9a.In this case, because can fully guarantee etching selectivity with copper coin 4z, so can realize the further miniaturization of jut 4a composition.
Next, shown in Fig. 3 (A), adopt common photoetching process, the groove in semiconductor module forms zone 6 forms the zone and forms Etching mask 9b.
Shown in Fig. 3 (B), 9b carries out etch processes as mask with this Etching mask, at the groove 4b that forms the compulsory figure that digs under its first type surface S2 and be provided with on the copper coin 4z.Here, the degree of depth of groove 4b is about 15 μ m, is arranged near the jut 4a.
Shown in Fig. 3 (C), remove Etching mask 9b.Form copper coin 4z thus, this copper coin 4z has from outstanding jut 4a that is provided with of its first type surface S2 and the groove 4b that is arranged on this first type surface S2.
Prepare the copper coin 4z of manufacturing so in addition, adopt in the manufacturing process of the semiconductor module of Shuo Ming first embodiment below.
At first, shown in Fig. 5 (A), prepare to have the semiconductor wafer of the semiconductor substrate 1 of circuit element 2, electrode 2a and diaphragm 3 with the surperficial S1 of rectangular formation.In addition, as shown in Figure 4, semiconductor wafer is divided into a plurality of semiconductor modules by many with ruling 5 clathrates and forms zone 6 (semiconductor substrates 1).It is previously described zones that are formed with circuit arrangement that these semiconductor modules form zone 6.
Specifically, shown in Fig. 5 (A),, utilize known technology to form the circuit elements such as circuit 2 of regulation at its surperficial S1 (below a side), and form electrode 2a at its edge part or top for each semiconductor substrate 1 in the semiconductor wafers such as P type silicon substrate.Metals such as general employing aluminium are made the material of electrode 2a.Zone on the 1 surperficial S1 of the semiconductor substrate except that this electrode 2a forms the insulating properties diaphragm 3 that is used for protecting semiconductor substrate 1.As diaphragm 3, adopt silicon dioxide film (SiO
2) or silicon nitride film (SiN) etc.
Shown in Fig. 5 (B), the surperficial S1 of semiconductor wafer (semiconductor substrate 1) (below a side), at semiconductor substrate 1 with form jut 4a and clamping insulating barrier 7 between the copper coin 4z of groove 4b is arranged in its vicinity.The height equal extent of the thickness of insulating barrier 7 and jut 4a is about 60 μ m.In addition, have jut 4a and groove 4b copper coin 4z the formation method as mentioned above.
Shown in Fig. 5 (C), after carrying out clamping as mentioned above, semiconductor substrate 1, insulating barrier 7 and copper coin 4z is integrated by carrying out press molding with pressue device.Pressure and temperature during pressure processing is about 5MPa and 200 ℃ respectively.By pressure processing, the viscosity of insulating barrier 7 reduces, and insulating barrier 7 produces plastic flowing.Jut 4a connects insulating barrier 7 thus, and the electrode 2a of jut 4a and semiconductor substrate 1 is electrically connected.Meanwhile, the unnecessary insulating barrier of being extruded by jut 4a 7 (insulating barrier 7a) flows in the groove 4b.In addition, this moment is because jut 4a has the side surface part 4a2 that forms along with near leading section 4a1 variation in diameter, so jut 4a connects insulating barrier 7 swimmingly.The result extrudes insulating barrier 7 effectively from interface between the electrode 2a of jut 4a and semiconductor substrate 1, and the part of insulating barrier 7 is difficult to remain on the interface.
Shown in Fig. 5 (D),, copper coin 4z is adjusted to again the thickness of wiring figure 4 by from the whole copper coin 4z of the opposition side etching of first type surface S2.The thickness of the wiring figure again 4 of the present embodiment is about 30 μ m.
Next, shown in Fig. 6 (A), adopt photoetching technique and etching technique, it is patterned into the wiring figure again (wiring layer) 4 with regulation circuit/space diagram by processing copper coin 4z.
Specifically, attach on the copper coin 4z with the resist film of lamination device about with thickness 20 μ m, adopt photomask to carry out the UV exposure with regulation circuit/space diagram after, use Na
2CO
3Solution develops, and removes the resist film of unexposed area, thereby optionally forms Etching mask (not shown) on copper coin 4z.In addition,, wished before the lamination of carrying out resist film, on the surface of copper coin 4z, implement pre-treatments such as grinding, cleaning as required in order to improve the close property with Etching mask.Then, the exposed portions serve by with ferric chloride solution etching copper coin 4z forms the wiring figure again (wiring layer) 4 with regulation circuit/space diagram.After this peel off Etching mask with removers such as NaOH solution.
Shown in Fig. 6 (B), use the solder printing method, form external connecting electrode (soldered ball) 8 for 4 external connection terminals functions of wiring figure again of the part that is connected with electrode 2a by jut 4a.Specifically, " solder cream " that become the resin of paste and solderable material is printed on the place of hope with screen mask, is heated to the melt temperature of scolder, form external connecting electrode (soldered ball) 8 thus.Perhaps also can in advance solder flux be coated on wiring figure 4 one sides again, on the wiring figure 4 soldered ball be installed again as other method.
Shown in Fig. 6 (C), form the line 5 in zone 6 along dividing a plurality of semiconductor modules, by being split up into the semiconductor module that has with semiconductor substrate 1 identical appearance size from back surface of semiconductor wafer (above a side) cutting semiconductor chip.After this carry out clean with chemical agent, the residue that produces when removing cutting.
By these operations, the semiconductor module of first embodiment shown in Fig. 1 of manufacturing front.
Manufacture method according to the semiconductor module of this first embodiment can access following effect.
(1) has from the outstanding jut 4a that is provided with of first type surface S2 by insulating barrier 7 is pressed in, is arranged between the copper coin 4z and semiconductor substrate 1 of groove 4b of this first type surface S2, the unnecessary insulating barriers of being extruded by jut 4a 7 such as part flow in the groove 4b, thereby the residual film that suppresses insulating barrier 7 is clipped on the interface of electrode 2a of jut 4a and semiconductor substrate 1, so can easily make the semiconductor module that the connection reliability of jut 4a and electrode 2a has improved.
(2) because of near the function that the groove 4b that is provided with in the lump with jut 4a on the copper coin 4z especially center, has as the discharge place of the insulating barrier of being extruded by jut 4a 7, so can on whole semiconductor wafer, can repeatedly stably make the semiconductor module that the connection reliability of jut 4a and electrode 2a improves at semiconductor wafer.Can reduce the manufacturing cost of semiconductor module thus.
(3) because form wiring figure again (wiring layer) 4 under the state of the semiconductor wafer before semiconductor module is separated in the lump with jut 4a and groove 4b, so compare with situations such as on each semiconductor module, forming again wiring figure 4 separately, can reduce the manufacturing cost of semiconductor module.
(second embodiment)
Fig. 7 is the profile that is used for illustrating the copper coin with jut and groove of second embodiment of the invention.Fig. 8 and Fig. 9 are the summary profiles of manufacturing process that is used for illustrating the semiconductor module of second embodiment.Next, with reference to Fig. 7～Fig. 9, the manufacturing process of the semiconductor module of second embodiment is described.
As shown in Figure 7, be with the copper coin difference that has jut and groove in first embodiment, groove 4b1 be not formed in semiconductor module form the zone 6 in and be formed in the line 5 in.In addition, form to this groove 4b1 clathrate and surround semiconductor modules along line 5 and form zone 6 (semiconductor substrates 1).Copper coin 4z with such groove 4b1 can easily make by the mask graph that changes the Etching mask 9b shown in Fig. 3 (A).In addition, identical with the manufacture method of the copper coin 4z that illustrates in first embodiment.In addition, line 5 is examples of " scribe area " of the present invention.
Prepare such copper coin 4z in advance, adopt in the manufacturing process of the semiconductor module of Shuo Ming second embodiment below.
At first, shown in Fig. 8 (A), the surperficial S1 of semiconductor wafer (semiconductor substrate 1) (below a side), at semiconductor substrate 1 with form jut 4a and in line 5, have clamping insulating barrier 7 between the copper coin 4z of groove 4b1.Insulating barrier 7 is the same with first embodiment with common parts such as copper coin 4z.
Shown in Fig. 8 (B), after carrying out clamping as mentioned above, semiconductor substrate 1, insulating barrier 7 and copper coin 4z is integrated by carry out press molding with pressue device.The pressure processing condition adopts the condition identical with first embodiment.
By pressure processing, insulating barrier 7 viscosity reduce, and insulating barrier 7 produces plastic flowing.Jut 4a connects insulating barrier 7 thus, and the electrode 2a of jut 4a and semiconductor substrate 1 is electrically connected.Meanwhile, the unnecessary insulating barrier of being extruded by jut 4a 7 (insulating barrier 7b) flows in the groove 4b1 that is arranged on line 5.The result extrudes insulating barrier 7 effectively from the interface between the electrode 2a of jut 4a and semiconductor substrate 1, and the part of insulating barrier 7 is difficult to remain on the interface.
Shown in Fig. 8 (C),, copper coin 4z is adjusted to again the thickness of wiring figure 4 by from the whole copper coin 4z of the opposition side etching of first type surface S2.The thickness of the wiring figure again 4 of the present embodiment is about 30 μ m.
Next, shown in Fig. 9 (A), adopt photoetching technique and etching technique, it is patterned into the wiring figure again (wiring layer) 4 with regulation wire/space diagram by processing copper coin 4z.At this moment in line 5, form the insulating barrier 7b of convex.Insulating barrier 7b in statu quo reflects the shape of groove 4b1, and it highly is about 15 μ m.
Shown in Fig. 9 (B), use the solder printing method, form external connecting electrode (soldered ball) 8 for 4 external connection terminals functions of wiring figure again of passing through jut 4a and electrode 2a coupling part.
Shown in Fig. 9 (C), form the line 5 in zone 6 along dividing a plurality of semiconductor modules, by being split up into the semiconductor module that has with semiconductor substrate 1 identical appearance size from back surface of semiconductor wafer (above a side) cutting semiconductor chip.At this moment because the insulating barrier 7b of the convex that is provided with in line 5 is removed, so can residual groove 4b1 or insulating barrier 7 in the wiring figure again (wiring layer) 4 of each final semiconductor module.
By these operations, make the semiconductor module of second embodiment.
Manufacture method according to the semiconductor module of this second embodiment outside the effect of above-mentioned (1)～(3) with first embodiment, can also obtain following effect.
(4) line 5 generally is to be surrounded as the cancellate zone that a plurality of circuit elements that will be on semiconductor wafer (semiconductor substrate 1) surface form in length and breadth are divided into each circuit element 2, is cutting semiconductor chip (semiconductor substrate 1) and the zone that is removed separately the time.Therefore, can not consider layouts such as the electrode 2a of semiconductor substrate 1 (circuit element 2) or connected wiring figure again 4, in line 5 groove 4b1 is set, and under the situation of making other circuit element again, also groove 4b1 generalization can be used.The result is the cost degradation of the semiconductor module that can realize that connection reliability has improved.
(5) by electrode 2a near edge part (line 5) the formation semiconductor substrate 1 (circuit element 2) in the zone of avoiding being formed with integrated circuit, form groove 4b1 in line 5, the unnecessary insulating barriers of being extruded by jut 4a 7 such as part flow in the groove 4b1 easily, are clipped on the interface between jut 4a and the electrode 2a so can more effectively suppress the residual film of insulating barrier 7.
(the 3rd embodiment)
Figure 10 is the profile that is used for illustrating the copper coin with jut and groove of third embodiment of the invention.Figure 11 and Figure 12 are the summary profiles of manufacturing process that is used for illustrating the semiconductor module of the 3rd embodiment.Next, with reference to Figure 10～Figure 12, the manufacturing process of the semiconductor module of the 3rd embodiment is described.
As shown in figure 10, be that groove 4b2 forms accordingly with the space diagram of wiring figure (wiring layer) 4 again with the difference that has the copper coin of jut and groove in first embodiment.In addition, the degree of depth of this groove 4b2 is identical with the height of wiring figure (wiring layer) 4 again, is about 30 μ m.Copper coin 4z with such groove 4b2 can be by changing the mask graph of the Etching mask 9b shown in Fig. 3 (A), and the etch process conditions shown in the control chart 3 (B) and easily making.In addition, identical with the manufacture method of the copper coin 4z that illustrates in first embodiment.
Prepare such copper coin 4z in advance, adopt in the manufacturing process of the semiconductor module of Shuo Ming the 3rd embodiment below.
At first, shown in Figure 11 (A), the surperficial S1 of semiconductor wafer (semiconductor substrate 1) (below a side), semiconductor substrate 1 and have jut 4a and the copper coin 4z of groove 4b2 between clamping insulating barrier 7.Insulating barrier 7 is the same with first embodiment with common parts such as copper coin 4z.
Shown in Figure 11 (B), after carrying out clamping as mentioned above, semiconductor substrate 1, insulating barrier 7 and copper coin 4z is integrated by carry out press molding with pressue device.The pressure processing condition adopts the condition identical with first embodiment.
By pressure processing, insulating barrier 7 viscosity reduce, and insulating barrier 7 produces plastic flowing.Jut 4a connects insulating barrier 7 thus, and the electrode 2a of jut 4a and semiconductor substrate 1 is electrically connected.Meanwhile, the unnecessary insulating barrier of being extruded by jut 4a 7 (insulating barrier 7c) flows in the groove 4b2.The result extrudes insulating barrier 7 effectively from the interface between the electrode 2a of jut 4a and semiconductor substrate 1, and the part of insulating barrier 7 is difficult to remain on the interface.
Shown in Figure 11 (C), from the whole copper coin 4z of the opposition side etching of first type surface S2, up to exposing insulating barrier 7c (insulating barrier 7).Thus copper coin 4z self coupling ground figure is processed into the wiring figure again (wiring layer) 4 with regulation circuit/space diagram.Meanwhile, a following side of wiring figure 4 becomes the state that is insulated layer 7 (insulating barrier 7c) planarization again.
Next, shown in Figure 12 (A), use the solder printing method, form external connecting electrode (soldered ball) 8 for 4 external connection terminals functions of wiring figure again of the part that is connected with electrode 2a by jut 4a.
Shown in Figure 12 (B), form the line 5 in zone 6 along dividing a plurality of semiconductor modules, by being split up into the semiconductor module that has with semiconductor substrate 1 identical appearance size from back surface of semiconductor wafer (above a side) cutting semiconductor chip.
By these operations, make the semiconductor module of the 3rd embodiment.
Manufacture method according to the semiconductor module of the 3rd embodiment outside the effect of above-mentioned (1)～(3) with first embodiment, can also obtain following effect.
(6) because can have the wiring figure again (wiring layer) 4 of regulation circuit/space diagram, so do not need to process photo-mask process and the etching work procedure of copper coin 4z to form again wiring figure 4 according to space diagram self the coupling ground formation of groove 4b2.The result is the cost degradation of the semiconductor module that improved of the connection reliability that can realize jut 4a and electrode 2a.
(the 4th embodiment)
Figure 13 is the profile that is used for illustrating the copper coin with jut and through hole of four embodiment of the invention.Figure 14 and Figure 15 are the summary profiles of manufacturing process that is used for illustrating the semiconductor module of the 4th embodiment.Next, with reference to Figure 13～Figure 15, the manufacturing process of the semiconductor module of the 4th embodiment is described.
As shown in figure 13, be with the difference that has the copper coin of jut and groove in first embodiment that the end of groove forms the rear side that arrives copper coin 4z, groove becomes the perforation ditch 4b3 that connects copper coin 4z.Groove also includes such perforation ditch 4b3 in the present invention.In addition, this layout that connects ditch 4b3 is identical with the groove 4b of first embodiment.Copper coin 4z with such perforation ditch 4b3 can be by changing the mask graph of the Etching mask 9b shown in Fig. 3 (A), and the etch process conditions shown in the control chart 3 (B) and easily making.In addition, identical with the manufacture method of the copper coin 4z that illustrates in first embodiment.
Prepare such copper coin 4z in advance, adopt in the manufacturing process of the semiconductor module of Shuo Ming the 4th embodiment below.
At first, shown in Figure 14 (A), the surperficial S1 of semiconductor wafer (semiconductor substrate 1) (below a side), at semiconductor substrate 1 with have jut 4a and connect clamping insulating barrier 7 between the copper coin 4z of ditch 4b3.Insulating barrier 7 is the same with first embodiment with common parts such as copper coin 4z.
Shown in Figure 14 (B), after carrying out clamping as mentioned above, semiconductor substrate 1, insulating barrier 7 and copper coin 4z is integrated by carry out press molding with pressue device.The pressure processing condition adopts the condition identical with first embodiment.
By pressure processing, insulating barrier 7 viscosity reduce, and insulating barrier 7 produces plastic flowing.Jut 4a connects insulating barrier 7 thus, and the electrode 2a of jut 4a and semiconductor substrate 1 is electrically connected.Meanwhile, the unnecessary insulating barrier of being extruded by jut 4a 7 (insulating barrier 7d) flows to and connects in the ditch 4b3.And under the situation that further has unnecessary insulating barrier 7, make insulating barrier 7 escape to the rear side of copper coin 4z and easily remove by this perforation ditch 4b3.The result extrudes insulating barrier 7 effectively from the interface between the electrode 2a of jut 4a and semiconductor substrate 1, and the part of insulating barrier 7 is difficult to remain on the interface.
Shown in Figure 14 (C),, copper coin 4z is adjusted to again the thickness of wiring figure 4 by opposition side etching copper coin 4z and insulating barrier 7d from first type surface S2.The thickness of the wiring figure again 4 of the present embodiment is about 30 μ m.
Next, shown in Figure 15 (A), adopt photoetching technique and etching technique, it is patterned into the wiring figure again (wiring layer) 4 with regulation circuit/space diagram by processing copper coin 4z.
Shown in Figure 15 (B), use the solder printing method, form external connecting electrode (soldered ball) 8 for 4 external connection terminals functions of wiring figure again of passing through jut 4a and electrode 2a coupling part.
Shown in Figure 15 (C), form the line 5 in zone 6 along dividing a plurality of semiconductor modules, by being split up into the semiconductor module that has with semiconductor substrate 1 identical appearance size from back surface of semiconductor wafer (above a side) cutting semiconductor chip.
By these operations, make the semiconductor module of the 4th embodiment.
Manufacture method according to the semiconductor module of the 4th embodiment outside the effect of above-mentioned (1)～(3) with first embodiment, can also obtain following effect.
(7) because the unnecessary insulating barriers of being extruded by jut 4a 7 such as part not only flow in the perforation ditch 4b3, and flow out to outside (rear side of copper coin 4z) by the perforation ditch 4b3 that connects copper coin 4z, be clipped on the interface between jut 4a and the electrode 2a so can further suppress the residual film of insulating barrier 7 effectively.Therefore the semiconductor module that the connection reliability that can easily make jut 4a and electrode 2a has improved.
(8) by the perforation ditch 4b3 that connects copper coin 4z is set, 4b3 can make the unnecessary insulating barriers of being extruded by jut 4a 7 such as part flow out to outside (rear side of copper coin 4z) via this perforation ditch, so compare the semiconductor module that the connection reliability that can repeatedly stably make jut 4a and electrode 2a has improved with the situation of the groove that non-perforation is set.Therefore can realize the cost degradation of semiconductor module.
(the 5th embodiment)
Figure 16 and Figure 17 are the summary profiles of manufacturing process that is used for illustrating the semiconductor module of the 5th embodiment.Next, the manufacturing process of the semiconductor module of the 5th embodiment is described with reference to Figure 16 and Figure 17.
Be that with the difference of second embodiment groove 4b1 that will form forms as the groove 1a in the line 5 of semiconductor wafer (semiconductor substrate a 1) side in the line 5 of copper coin 4z one side.In addition, the manufacture method with the semiconductor module that illustrates in second embodiment is identical.
At first, shown in Figure 16 (A), prepare to form rectangular semiconductor wafer at the semiconductor substrate 1 that surperficial S1 has electrode 2a and diaphragm 3 and have a groove 1a in line 5.In addition, can form regional corresponding Etching mask, implement etch processes afterwards and more easily make such groove 1a by being provided with groove for the semiconductor wafer (semiconductor substrate 1) shown in Fig. 5 (A).In addition, also can easily make by hemisect.
Shown in Figure 16 (B),, insulating barrier 7 is clipped in line 5 has the semiconductor substrate 1 of groove 1a and form between the copper coin 4z of jut 4a the surperficial S1 of semiconductor wafer (semiconductor substrate 1) (below a side).Common parts such as semiconductor substrate 1, insulating barrier 7 and copper coin 4z are identical with first embodiment.
Shown in Figure 16 (C), after carrying out clamping as mentioned above, semiconductor substrate 1, insulating barrier 7 and copper coin 4z is integrated by carry out press molding with pressue device.The pressure processing condition adopts the condition identical with second embodiment.
By pressure processing, the viscosity of insulating barrier 7 reduces, and insulating barrier 7 produces plastic flowing.Jut 4a connects insulating barrier 7 thus, and the electrode 2a of jut 4a and semiconductor substrate 1 is electrically connected.Meanwhile, the unnecessary insulating barrier of being extruded by jut 4a 7 (insulating barrier 7b) flows in the groove 1a that is arranged on line 5.The result extrudes insulating barrier 7 effectively from the interface between the electrode 2a of jut 4a and semiconductor substrate 1, and the part of insulating barrier 7 is difficult to remain on the interface.
Shown in Figure 16 (D),, copper coin 4z is adjusted to again the thickness of wiring figure 4 by from the whole copper coin 4z of the opposition side etching of first type surface S2.
Next, shown in Figure 17 (A), adopt photoetching technique and etching technique, it is patterned into the wiring figure again (wiring layer) 4 with regulation circuit/space diagram by processing copper coin 4z.
Shown in Figure 17 (B), use the solder printing method, form external connecting electrode (soldered ball) 8 for 4 external connection terminals functions of wiring figure again of passing through jut 4a and electrode 2a coupling part.
Shown in Figure 17 (C), form the line 5 in zone 6 along dividing a plurality of semiconductor modules, by being split up into the semiconductor module that has with semiconductor substrate 1 identical appearance size from back surface of semiconductor wafer (above a side) cutting semiconductor chip.At this moment because the groove 1a that is provided with in line 5 is removed, so can residual groove 1a in the wiring figure again (wiring layer) 4 of each final semiconductor module.
By these operations, make the semiconductor module of the 5th embodiment.
Manufacture method according to the semiconductor module of the 5th embodiment can obtain and above-mentioned (1)～(3) of first embodiment and above-mentioned (4) effect identical with (5) of second embodiment.
(the 6th embodiment)
Figure 18 and Figure 19 are the summary profiles of manufacturing process that is used for illustrating the semiconductor module of the 6th embodiment.Next, the manufacturing process of the semiconductor module of the 6th embodiment is described with reference to Figure 18 and Figure 19.
Be that with the difference of second embodiment and the 5th embodiment the groove 4b1 except forming also similarly forms groove 1a in the line 5 of semiconductor wafer (semiconductor substrate a 1) side in line 5.In addition, the manufacture method with the semiconductor module that illustrates in second embodiment and the 5th embodiment is identical.
At first, shown in Figure 18 (A), prepare to form rectangular semiconductor wafer at the semiconductor substrate 1 that surperficial S1 has electrode 2a and diaphragm 3 and have a groove 1a in line 5.
Shown in Figure 18 (B), the surperficial S1 of semiconductor wafer (semiconductor substrate 1) (below a side), insulating barrier 7 is clipped in line 5 has the semiconductor substrate 1 of groove 1a and form jut 4a and have between the copper coin 4z of groove 4b1 in line 5.Common parts such as semiconductor substrate 1, insulating barrier 7 and copper coin 4z are identical with first embodiment.
Shown in Figure 18 (C), after carrying out clamping as mentioned above, semiconductor substrate 1, insulating barrier 7 and copper coin 4z is integrated by carry out press molding with pressue device.The pressure processing condition adopts the condition identical with second embodiment.
By pressure processing, the viscosity of insulating barrier 7 reduces, and insulating barrier 7 produces plastic flowing.Jut 4a connects insulating barrier 7 thus, and the electrode 2a of jut 4a and semiconductor substrate 1 is electrically connected.Meanwhile, the unnecessary insulating barrier of being extruded by jut 4a 7 (insulating barrier 7b) flows to and is arranged in line 5 the groove 4b1 and in the groove 1a.The result extrudes insulating barrier 7 effectively from the interface between the electrode 2a of jut 4a and semiconductor substrate 1, and the part of insulating barrier 7 is difficult to remain on the interface.
Shown in Figure 18 (D),, copper coin 4z is adjusted to again the thickness of wiring figure 4 by from the whole copper coin 4z of the opposition side etching of first type surface S2.
Next, shown in Figure 19 (A), adopt photoetching technique and etching technique, it is patterned into the wiring figure again (wiring layer) 4 with regulation circuit/space diagram by processing copper coin 4z.At this moment in line 5, form the insulating barrier 7b of convex.Insulating barrier 7b in statu quo reflects the shape of groove 4b1.
Shown in Figure 19 (B), use the solder printing method, form external connecting electrode (soldered ball) 8 for 4 external connection terminals functions of wiring figure again of passing through jut 4a and electrode 2a coupling part.
Shown in Figure 19 (C), form the line 5 in zone 6 along dividing a plurality of semiconductor modules, by being split up into the semiconductor module that has with semiconductor substrate 1 identical appearance size from back surface of semiconductor wafer (above a side) cutting semiconductor chip.At this moment because the insulating barrier 7b and the groove 1a of the convex that is provided with in line 5 are removed, so can residual insulating barrier 7b and groove 1a in the wiring figure again (wiring layer) 4 of each final semiconductor module.
By these operations, make the semiconductor module of the 6th embodiment.
Manufacture method according to the semiconductor module of the 6th embodiment can obtain following effect.
(9) by copper coin 4z one side and these both sides of semiconductor substrate 1 one sides in line 5 groove (groove 4b1, groove 1a) is set, the unnecessary insulating barriers of being extruded by jut 4a 7 such as part flow in the groove 4b1 and groove 1a in, the residual film that can suppress insulating barrier 7 effectively is clipped on the interface between jut 4a and the electrode 2a.Therefore the semiconductor module that the connection reliability that can more easily make jut 4a and electrode 2a has improved.
(the 7th embodiment)
Figure 20 is the summary profile of the semiconductor module of the 7th embodiment.The basic structure of the semiconductor module of the present embodiment is identical with first embodiment.For the semiconductor module of the 7th embodiment, omit suitable explanation with the first embodiment same structure.
In the semiconductor module of the 7th embodiment, as shown in figure 20, micro concavo-convex 90 is set in first type surface S2 one side of wiring figure 4 again.The roughness of micro concavo-convex 90 utilizes the mensuration of surface roughness meter to represent with 10 average surface roughness Rz, is preferably 1 μ m.
Micro concavo-convex 90 for example can form by roughened is implemented on the surface of wiring figure 4 again.For example can enumerate CZ as roughened and handle processing such as (registered trade mark) chemical agent, plasma treatment etc.The first type surface S of wiring figure 4 is again implemented the operation of roughened, can be inserted in the operation of removing Etching mask (with reference to Fig. 3 (C)) that illustrates in the manufacturing process of semiconductor module of first embodiment afterwards.
The semiconductor module of the 7th embodiment can also be obtained following effect except that the effect with first embodiment.
(10) by micro concavo-convex 90 being set, because of fixed effect improves insulating barrier 7 and the adhesion between the wiring figure 4 again at the first type surface S of wiring figure 4 again.
(the 8th embodiment)
Figure 21 is the summary profile of the semiconductor module of the 8th embodiment.The basic structure of the semiconductor module of the present embodiment is identical with first embodiment.For the semiconductor module of the 8th embodiment, omit suitable explanation with the first embodiment same structure.
The stereogram that Figure 22 is among the first type surface S2 of wiring figure 4, the groove shown in Figure 21 forms part 92.In the semiconductor module of the 8th embodiment,, around jut 4a, circular groove 4b is set as Figure 21 and shown in Figure 22.Such 4b of circular groove portion can form like this, promptly in the manufacturing process of the semiconductor module of first embodiment, illustrate, in copper coin 4z, form in the operation (with reference to Fig. 3 (b)) of groove 4b, be that mask carries out etch processes and forms with Etching mask with the circular opening portion that surrounds jut 4a.
According to the semiconductor module of the 8th embodiment, except that effect, can also obtain following effect with first embodiment.
(11) in the pressure processing (with reference to Fig. 5 (C)) of first embodiment explanation, from each jut 4a and and the electrode 2a of its corresponding semiconductor substrate 1 between the insulating barrier 7 that is extruded of interface positively flow in the groove 4b that is provided with around the jut 4a.The result is that the part of insulating barrier 7 is difficult to more because the interface of the electrode 2a of jut 4a and semiconductor substrate 1 and residual.
(the 9th embodiment)
Figure 23 is the summary profile of the semiconductor module of the 9th embodiment.The basic structure of the semiconductor module of the present embodiment is except being provided with between wiring figure 4 and insulating barrier 7 200 this point of intermediate layer, and all the other are identical with first embodiment.For the semiconductor module of the 9th embodiment, omit suitable explanation with the first embodiment same structure.
As shown in figure 23, in the semiconductor module of the 9th embodiment, between the first type surface S2 of wiring figure 4 and insulating barrier 7, intermediate layer 200 is set.Intermediate layer 200 is formed by insulating material or metal material.Insulating material is not so long as produce plastic flowing during pressure processing and keep the resin of shape to get final product.In addition, for example can exemplify copper as metal material.
In intermediate layer 200, be provided with groove 204.This groove 204 is equivalent to the groove 4b of first embodiment.
Such intermediate layer 200 can form like this, the operation (with reference to Fig. 2 (C)) that promptly in the manufacturing process of the semiconductor module of first embodiment, illustrates, form jut 4a at the first type surface S2 of copper coin 4z afterwards, the operation below implementing and forming.
Figure 24 is the profile of formation method that is used for illustrating the intermediate layer 200 of the semiconductor module that constitutes the 9th embodiment.
At first, shown in Figure 24 (A), on first type surface S2 except that jut 4a, wiring figure 4, form intermediate layer 200.The thickness in intermediate layer 200 can be about 15 μ m.In addition, the thickness in intermediate layer 200 is identical with the degree of depth of groove 204 described later.Therefore, the thickness that can suitably change intermediate layer 200 makes it to conform to the degree of depth of groove 204.200 is under the situation of insulating material in the intermediate layer, can form intermediate layer 200 by stacked resin sheet.In addition, be under the situation of metal such as copper in intermediate layer 200, can adopt galvanoplastic to form intermediate layer 200.Adopting under the situation of galvanoplastic,, behind electroplating work procedure, removing mask jut 4a 200 is exposed from the intermediate layer by in advance jut 4a being implemented mask.
Next, shown in Figure 24 (B), be that mask carries out etch processes to intermediate layer 200 with Etching mask (not shown), the groove 204 of 200 formation compulsory figures in the intermediate layer.At this, the degree of depth of groove 204 is about 15 μ m, is arranged near the jut 4a.
Then, make as shown in figure 23 semiconductor module by implementing the operation identical with Fig. 6 with Fig. 5 of first embodiment.
According to the semiconductor module of the 9th embodiment, except that effect, can also obtain following effect with first embodiment.
(12) by being pre-formed the intermediate layer that has with the thickness of groove deep equality, can easily groove be formed the desirable degree of depth, thereby can reproduce groove well and stably make.Therefore can reduce the manufacturing cost of semiconductor module.
(the tenth embodiment)
Next, the portable equipment that comprises semiconductor module of the present invention is described.In addition, though enumerate the example that is loaded in as in the mobile phone of portable equipment, for example also can be PDA(Personal Digital Assistant), Digital Video (DVC) and the such electronic equipment of digital camera (DSC).
Figure 25 represents to comprise the structure chart of mobile phone of the semiconductor module of embodiment of the present invention.Mobile phone 110 structure that to be first housings 112 be connected by movable part 120 with second housing 114.First housing 112 and second housing 114 can serve as that axle rotates with movable part 120.Be provided with the display part 118 and the speaker portion 124 of information such as display text or image at first housing 112.Be provided with operation with operating portions such as button 122 and microphone portion 126 at second housing 114.In addition, the semiconductor module of each embodiment of the present invention is loaded in the inside of such mobile phone 110.
Figure 26 is the fragmentary cross-sectional view (profile of first housing 112) of the mobile phone shown in Figure 25.The semiconductor module 130 of each embodiment of the present invention is loaded on the printed base plate 128 by external connecting electrode 9, is electrically connected with display part 118 grades by such printed base plate 128.In addition, rear side (with the face of external connecting electrode 9 opposition sides) at semiconductor module 130 is provided with heat-radiating substrates 116 such as metal substrate, for example, the heat that is produced by semiconductor module 130 is not trapped in the inside of first housing 112, and can reject heat to the outside of first housing 112 effectively.
According to the portable equipment of the semiconductor module that comprises embodiment of the present invention, can obtain following effect.
(13) because the connection reliability of jut 4a and electrode 2a improves, and then the raising of the connection reliability of semiconductor module 130, improve so be mounted with the reliability of the portable equipment of such semiconductor module 130.
(14) because can reduce the manufacturing cost of semiconductor module 130, so can suppress to be mounted with the manufacturing cost of the portable equipment of such semiconductor module 130.
(15) because the semiconductor module of making by chip size packages CSP (Chip SizePackage) operation 130 that illustrates in the above-described embodiment by slimming/miniaturization, so can realize having loaded the slimming/miniaturization of the portable equipment of such semiconductor module 130.
The present invention is not subjected to the restriction of above-mentioned each embodiment, can carry out distortion such as various design alterations according to those skilled in the art's knowledge, and the embodiment of having carried out such distortion is also contained in the scope of the present invention.For example, structure that also can each embodiment of appropriate combination.
In above-mentioned second embodiment, enumerated along line 5 around semiconductor module and formed zone 6 (semiconductor substrates 1) and the example of clathrate ground formation groove 4b1, but the invention is not restricted to this, for example also can dispose the groove of a plurality of isolated incision-like repeatedly along line 5.Under such situation, also can obtain above-mentioned effect.
In the above-described embodiment, though enumerated the jut 4a of copper coin 4z and form circle, along with near the tapered example of its leading section 4a1 diameter, the invention is not restricted to this, for example also can be the columned jut with specified diameter.In addition, though adopt circle, also can be polygons such as quadrangle as jut 4a.In this case, by groove is set on copper coin, the unnecessary insulating barriers of being extruded by jut 4a 7 such as part flow in the groove, and the residual film that suppresses insulating barrier 7 is clipped on the interface between jut 4a and the electrode 2a.Therefore can improve the connection reliability of semiconductor module.
In the above-described embodiment, though enumerated such example, promptly in order further to enlarge the pitch of the electrode 2a of semiconductor substrate 1 (circuit element 2), with jut 4a buried insulating layer 7 and make copper coin 4z, insulating barrier 7 and circuit element 2 laminations form again wiring figure (wiring layer) 4, in its rear side external connecting electrode (soldered ball) 8 is set, but the invention is not restricted to this, for example also can use copper coin to be concatenated to form wiring layer and carry out multiple stratification with jut and groove.In view of the above, the lamination of multilayer wiring can be carried out more easily, and the interior connection reliability of multilayer wiring and the connection reliability of multilayer wiring and circuit element can be improved.
Claims (14)
1. the manufacture method of a semiconductor module comprises:
First operation, the semiconductor substrate of the surperficial electrode that is provided with circuit element and is electrically connected of formation with this circuit element;
Second operation forms the jut and the metallic plate that is arranged on first groove of this first type surface that have from the outstanding setting of first type surface;
The 3rd operation, it is electrically connected described jut and described electrode via described metallic plate of insulating barrier crimping and described semiconductor substrate by making described jut connect described insulating barrier.
2. the manufacture method of semiconductor module as claimed in claim 1, it is characterized in that, form a plurality of described circuit elements on described semiconductor substrate, described first groove is formed in the scribe area of dividing between a plurality of described circuit elements and being provided with.
3. the manufacture method of semiconductor module as claimed in claim 2 is characterized in that, is formed with described electrode at the edge part of described circuit element.
4. the manufacture method of semiconductor module as claimed in claim 1 is characterized in that, also comprises the 4th operation, forms the wiring layer with regulation circuit/space diagram by processing described metallic plate,
Form described first groove accordingly with the space diagram of described wiring layer, by described metallic plate filming being formed described wiring layer from rear side.
5. as the manufacture method of each described semiconductor module in the claim 1～3, it is characterized in that, connect described metallic plate and form described first groove.
6. as the manufacture method of each described semiconductor module in the claim 1～5, it is characterized in that, in the described semiconductor substrate of described first operation, further form second groove on its surface.
7. the manufacture method of a semiconductor module comprises:
First operation forms the surface and is provided with circuit element and the electrode that is electrically connected with this circuit element and the semiconductor substrate of groove;
Second operation forms the metallic plate with jut;
The 3rd operation via described metallic plate of insulating barrier crimping and described semiconductor substrate, is electrically connected described jut and described electrode by making described jut connect described insulating barrier.
8. a semiconductor module is characterized in that, comprising:
Be provided with integratedly from the wiring layer of the outstanding jut of first type surface;
Be provided with the circuit element of the element electrode that is electrically connected with described jut;
Be arranged on the insulating barrier between described wiring layer and the described circuit element,
Described insulating barrier has groove at described first type surface, and described insulating barrier is filled in the described groove.
9. semiconductor module as claimed in claim 8 is characterized in that, described wiring layer and described jut are formed by rolled metal.
10. semiconductor module as claimed in claim 8 or 9 is characterized in that, described insulating barrier is formed by the insulating resin that produces plastic flowing by pressurization.
11. as each described semiconductor module in the claim 8～10, it is characterized in that, be formed with micro concavo-convex at the described first type surface of described wiring layer.
12. as each described semiconductor module in the claim 8～11, it is characterized in that, around described jut, be provided with described groove.
13. a semiconductor module is characterized in that, comprising:
Be provided with integratedly from the wiring layer of the outstanding jut of first type surface;
Be provided with the circuit element of the element electrode that is electrically connected with described jut;
Be arranged on the insulating barrier between described wiring layer and the described circuit element;
Be arranged on the described first type surface of described wiring layer and the intermediate layer between the described insulating barrier,
Described intermediate layer with face that described insulating barrier contacts on have groove, described insulating barrier is filled in the described groove.
14. a portable equipment is characterized in that, comprises each described semiconductor module in the claim 8～13.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006267063 | 2006-09-29 | ||
| JP267063/06 | 2006-09-29 | ||
| JP242222/07 | 2007-09-19 |
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| CN101231963A true CN101231963A (en) | 2008-07-30 |
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| Application Number | Title | Priority Date | Filing Date |
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| CNA2007103077823A Pending CN101231963A (en) | 2006-09-29 | 2007-09-29 | Semiconductor module, method for manufacturing the semiconductor module and portable device carrying the same |
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| CN (1) | CN101231963A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102142414A (en) * | 2009-09-30 | 2011-08-03 | 三洋电机株式会社 | Device mounting board, semiconductor module and portable apparatus |
| US8704106B2 (en) | 2008-12-22 | 2014-04-22 | Fujitsu Limited | Ferroelectric component and manufacturing the same |
-
2007
- 2007-09-29 CN CNA2007103077823A patent/CN101231963A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8704106B2 (en) | 2008-12-22 | 2014-04-22 | Fujitsu Limited | Ferroelectric component and manufacturing the same |
| CN102265714B (en) * | 2008-12-22 | 2014-05-14 | 富士通株式会社 | Electronic component and method for manufacturing same |
| CN102142414A (en) * | 2009-09-30 | 2011-08-03 | 三洋电机株式会社 | Device mounting board, semiconductor module and portable apparatus |
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