CN101221326A - Motherboard of display panel and production method thereof - Google Patents
Motherboard of display panel and production method thereof Download PDFInfo
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- CN101221326A CN101221326A CNA2008100070865A CN200810007086A CN101221326A CN 101221326 A CN101221326 A CN 101221326A CN A2008100070865 A CNA2008100070865 A CN A2008100070865A CN 200810007086 A CN200810007086 A CN 200810007086A CN 101221326 A CN101221326 A CN 101221326A
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Abstract
The invention discloses a mother board of a display panel and a method for making the same, wherein the mother board has first panel cells and second panel cells which are different in size and are provided with different cell gaps. The mother board is mainly composed of a switchover element array substrate, a counter substrate, a display medium layer and an underlayer. The switchover element array substrate is provided with a plurality of switchover elements which are arranged in an array and a plurality of pixel electrodes correspondingly connected with the switchover elements. The counter substrate is actually parallel to the switchover elements. The display medium layer is arranged between the switchover element array substrate and the counter substrate. The underlayer is arranged between the switchover element array substrate and the counter substrate and is corresponding to the first panel cells for compensating for the cell gaps between the first panel cells and the second panel cells.
Description
Technical field
The present invention relates to motherboard of a kind of display panel and preparation method thereof, and be particularly related to motherboard of a kind of display panel unit with different size and preparation method thereof.
Background technology
LCD mainly is by a display panels (liquid crystal display panel, LCD panel) and a backlight module (backlight module) constitute, wherein, display panels comprises colored optical filtering substrates, active component array base board (active device array substrate) and the liquid crystal layer between two substrates (liquid crystal layer).
The making of existing display panels is to organize earlier uprightly with the active component array base board of whole piece and the colored optical filtering substrates of whole piece, and liquid crystal layer is sealed in therebetween, and then formation has the motherboard of the display panels of a plurality of panel units.Afterwards, the motherboard to display panels cuts (cutting) again, to form a plurality of independently display panels.
The product line of display panels also has the evolution of different generations along with the motherboard size difference of the display panels of made.The motherboard size of the display panels of early stage generation factory made approximately is 300 millimeters * 400 millimeters, the display panel in the time of can making a slice 15 approximately.To 1996 the time, technology progressive to 3.5 generation factory, and the motherboard size of the display panels of its made is about 600 millimeters * 720 millimeters.Evolution so far, six generation factory the motherboard size of display panels reached 1500 millimeters * 1850 millimeters, the motherboard of the display panels of its made can be cut into 30 panels of 15 o'clock.With the generation factory of prior art or 3.5 generation factory compare, six generation factory production capacity increase, relatively reduce the technology cost.In addition, six generation factory the motherboard of display panels also can be cut into large-sized display panels, for example make 8 display panels of 32 o'clock, or 6 display panels of 37 o'clock.
In recent years, in order to meet the demand of user for large-sized monitor, display panels also continues towards bigger size development, for example 40 o'clock, 42 o'clock, 50 o'clock etc., and the product line of display panels also evolved to seven generation factory and 7.5 generation factory.With 40 o'clock display panels was example, seven generation factory the motherboard of display panels be of a size of 1870 millimeters * 2200 millimeters, and with seven generation factory the motherboard of display panels when being cut into 40 o'clock panels of multi-disc, the utilization factor of motherboard is about 92%.
Product line compared to earlier generations, present 7.5 generation factory the motherboard of display panels be of a size of 1950 millimeters * 2250 millimeters, yet, be cut into 40 o'clock of multi-disc or during the display panels of other size, the utilization factor of motherboard does not but rise counter falling, and has only 85% to 86% approximately.This is because above-mentioned display panels size can't effectively be mated with the size of motherboard, makes space on the motherboard institute that can't be used effectively cause.
Summary of the invention
Technical matters to be solved by this invention is to provide a kind of motherboard of display panel, and it can effectively utilize the free space on the motherboard, solves the problem that the motherboard utilization factor is restricted.
Another technical matters to be solved by this invention is to provide a kind of method that is suitable for making the motherboard of above-mentioned display panel, and it can significantly improve the motherboard utilization factor of display panel, and then promotes whole production capacity.
For achieving the above object, the present invention proposes a kind of motherboard of display panel, and it has first panel unit group of a first size and the second panel unit group of one second size.Each first panel unit in the first panel unit group has at least one first module gap, and each second panel unit in the second panel unit group has at least one second cell gap, and first size is different in essence in second size.This motherboard mainly switches component array baseplate, a subtend substrate, a display dielectric layer (display mediumlayer) and a lining by one and is constituted.The switching device array base palte has a plurality of switching devices and the corresponding a plurality of pixel electrodes that connect switching device of arrayed.The subtend substrate is parallel in fact with the switching device array base palte, and the subtend substrate has a shared electrode layer.Display dielectric layer is disposed between switching device array base palte and the subtend substrate.In addition, stress liner configuration is between switching device array base palte and subtend substrate, and lining is corresponding to the first panel unit group, and the summation in the thickness of lining and first module gap equals second cell gap in fact.
And for achieving the above object, the present invention also proposes a kind of method for making of motherboard of display panel, and the motherboard of this display panel has first panel unit group of a first size and the second panel unit group of one second size.Each first panel unit in the first panel unit group has at least one first module gap, and each second panel unit in the second panel unit group has at least one second cell gap, and first size is different in essence in second size.The method for making of this motherboard comprises: make one and switch component array baseplate, this switching device array base palte has a plurality of switching devices and the corresponding a plurality of pixel electrodes that connect switching device of arrayed; Make a subtend substrate; And form a display dielectric layer between switching device array base palte and subtend substrate.And, when making switching device array base palte and/or subtend substrate, more form a lining on the switching device array base palte or subtend substrate of part, wherein lining is corresponding to the first panel unit group, and the summation in the thickness of lining and first module gap equals second cell gap in fact.
Based on above-mentioned, the present invention effectively to utilize the free space on the motherboard, improves the motherboard utilization factor of display panel by the display panel unit of the multiple different size of planning on the motherboard of same display panel, and then promotes whole production capacity.In addition, be conceived to the panel unit that motherboard need be integrated different size, the present invention more compensates the cell gap difference of the panel unit of those different sizes by lining, to meet the specification demand of each panel unit.
Describe the present invention below in conjunction with the drawings and specific embodiments, but not as a limitation of the invention.
Description of drawings
Fig. 1 illustrates the top view according to the motherboard of a kind of display panel of one of the present invention embodiment;
Fig. 2 illustrates the sectional view by the motherboard 100 prepared display panels of Fig. 1;
Fig. 3 illustrates the structural drawing according to the motherboard of a kind of display panel of another embodiment of the present invention;
Fig. 4 illustrates a kind of by the technology of many rows formula dry film photoresist coating machine platform coating dry film photoresist on substrate;
Fig. 5 illustrates the structural drawing according to the motherboard of a kind of display panel of another embodiment of the present invention.
Wherein, Reference numeral:
100: 110: the first panel units of motherboard
210: switching device array base palte 212: switching device
214: shared wiring 216: gate insulation layer
218: protective seam 219: pixel electrode
220: subtend substrate 222: black matrix
224: chromatic filter layer 226: shared electrode layer
230: display dielectric layer 240: separation material
250: cell gap 300,500: motherboard
300A, 500A: the first panel unit 300B, 500B: second panel unit
310,510: switching device array base palte 312,512: switch towering
314,514: pixel electrode 320,520: subtend substrate
322,522: shared electrode layer 324,524: black matrix
326,516: chromatic filter layer 330,530: display dielectric layer
340,540: lining 350A, 550A: the first module gap
350B, 550B: second cell gap 360,560: separation material
400: dry film photoresist coating machine platform 410: dry film photoresist
Embodiment
Below the mentioned motherboard of a plurality of embodiment, refer to the subtend substrate of the switching device array base palte of whole piece and whole piece is organized upright, and display dielectric layer is sealed in therebetween formed finished product with a plurality of panel units.This motherboard is cut, just can form a plurality of independently display panels.
Those embodiment do not limit the kenel of display panel, and wherein along with the difference of display dielectric layer, display panel has different mechanism of action.For example, display dielectric layer can be liquid crystal material, then display panel is called display panels, as: the penetrating type display panel, the semi penetration type display panel, reflective display panel, the COA display panel, the AOC display panel, vertical orientation type (VA) display panel, horizontal switch type (IPS) display panel, multi-domain perpendicular alignment-type (MVA) display panel, twisted nematic (TN) display panel, super-twist nematic (STN) display panel, pattern vertical orientation type (PVA) display panel, super pattern vertical orientation type (S-PVA) display panel, the advanced person is type (ASV) display panel with great visual angle, fringe field switch type (FFS) display panel, continuous fireworks shape arrange type (CPA) display panel, rotational symmetry is arranged micella type (ASM) display panel, optical compensation curved arrange type (OCB) display panel, super horizontal switch type (S-IPS) display panel, advanced super horizontal switch type (AS-IPS) display panel, extreme edge electric field switch type (UFFS) display panel, stabilizing polymer alignment-type display panel, double vision angle type (dual-view) display panel, three visual angle type (triple-view) display panels, 3 d display (three-dimensional) or other profile plate, or above-mentioned combination.In addition, if display dielectric layer is the electroluminescence material, then display panel is called electric exciting light emitting display panel, for example: fluorescence electric exciting light emitting display panel, phosphorescence electric exciting light emitting display panel or above-mentioned combination, and the electroluminescence material of electric exciting light emitting display panel comprises organic material, inorganic or above-mentioned combination, and the molecule of electroluminescence material comprises micromolecule, macromolecule or above-mentioned combination.
Following embodiment will describe as example with display panels, know that usually the knowledgeable will be understood that the design concept of those embodiment still can reasonably be applied in the display panel of other type yet have in this area.
In addition, the switching device array base palte of the following example indication has a plurality of switching devices and the corresponding a plurality of pixel electrodes that connect those switching devices of arrayed at least.In the application of reality, the switching device array base palte for example is the substrate with active thin film transistor (TFT) array, and the subtend substrate for example is the colored optical filtering substrates with chromatic filter layer.Also can use the switching device array base palte of passive type at other embodiment.Certainly, the switching device array base palte also can be to have integrated chromatic filter layer in the COA substrate on the active layers or integrated the AOC substrate of active layers on colored filter, at this moment, must not make chromatic filter layer on the subtend substrate.Hereinafter can illustrate with regard to those variations respectively.
The present invention is by the display panel unit of the multiple different size of planning on the motherboard of same display panel, effectively to utilize the free space on the motherboard.Fig. 1 illustrates the top view according to the motherboard of a kind of display panel of one embodiment of the invention.As shown in Figure 1, motherboard 100 sizes of present embodiment for example be 7.5 generation the specification that adopted of factory, its length and width are 1950 millimeters * 2250 millimeters, and wherein, a is 1950 centimetres among the figure, b is 2250 centimetres, and, the length of a, b TYP among Fig. 3 and Fig. 5, but be not limited thereto, also can select other specification for use, as motherboard dimensions of the prior art.The group of first panel unit of having planned on motherboard 100 at 32 o'clock (or being called first display panel unit) 110 group and 52 o'clock second panel unit (or being called second display panel unit) 120 is arranged as two craspedodromes respectively.By such planning, can effectively utilize the free space on the motherboard 100, improve the motherboard utilization factor of display panel, and then promote whole production capacity.
It should be noted that the foregoing description adopt to integrate two kinds of sizes panel unit design for explanation, but the present invention is not as limit.Also promptly, in other embodiments, also can adopt the panel unit of other size, as: the panel unit of～100 times or greater than 100 o'clock panel unit at 1 o'clock.On real the work, the panel unit that also can integrate more sizes and is adjusted position relation between those panel units on same motherboard, in the hope of optimized motherboard utilization factor.
In addition, though previous embodiment has proposed to integrate the design concept of the panel unit of different size on motherboard, but because motherboard is that switching device array base palte by whole piece stands with the colored optical filtering substrates group of whole piece and forms in the existing technology, therefore on real the work, the cell gap between switching device array base palte and the colored optical filtering substrates can't be done flexible adjustment with the panel unit of different size.Particularly, when display panel need have specific standard, will be subject to existing technology and can't satisfy demand in the design.
Fig. 2 illustrates the sectional view by aforementioned motherboard 100 prepared display panels 200.As shown in Figure 2, the display panel 200 of present embodiment comprises switching device array base palte 210, subtend substrate 220, shows not element such as dielectric layer 230, separation material 240.Switching device array base palte 210 for example is made up of institutes such as switching device 212, shared wiring 214, gate insulation layer 216, protective seam 218 and pixel electrodes 219 and is illustrated, and subtend substrate 220 is for example illustrated by the colored optical filtering substrates that black matrix 222, chromatic filter layer 224 and shared electrode layer 226 etc. are formed.In other embodiments; switching device array base palte 210 for example is made up of institutes such as switching device 212, gate insulation layer 216, protective seam 218 and pixel electrodes 219, and the colored optical filtering substrates that subtend substrate 220 for example is made up of black matrix 222 and chromatic filter layer 224 etc.Switching device 212 is example with the bottom gate type transistor, but is not limited thereto in present embodiment, also can use top gate type or other transistor that is fit to or above-mentioned combination.And transistorized semiconductor layer is the single or multiple lift structure, and its material comprises germanium silicide or other semiconductor material that is fit to or the above-mentioned combination of amorphous silicon, polysilicon, monocrystalline silicon, microcrystal silicon, above-mentioned lattice.In the present embodiment, cell gap 250 is meant the distance between switching device array base palte 210 and the subtend substrate 220, more specifically, cell gap 250 is meant the distance between the shared electrode layer 226 of the pixel electrode 219 of switching device array base palte 210 and subtend substrate 220.The pixel electrode 219 that easy speech, cell gap 250 are meant finger switching device array base palte 210 be zequin resulting distance the two between for the shared electrode layer 226 of zequin and subtend substrate 220 near the surface of display medium 330 near the surface of display medium 330.Certainly, whether the definition of this gap also can according to having another rete (not shown) to exist and optionally changing it, for example on the former existing pixel electrode 219 of each substrate or the shared electrode layer 226: come to be zequin or be starting point or shared electrode layer 226 near the surface of display medium 330 with pixel electrode 219 near the surface of display medium 330 still to be starting point near the surface of display medium 330 with another rete (not illustrating).At this moment, according to optical effect effect or design formula and selectivity is ignored another rete (not illustrating) or do not ignore another rete (not illustrating).Certainly, selecting for use according to the needs of design of another rete decided.For example, if an alignment film (not shown) is arranged respectively at the pixel electrode 219 of each substrate and on shared electrode layer 226, then single towering gap 250 is meant alignment film (not shown) on the switching device array base palte 210 and the distance between the alignment film (not shown) on the subtend substrate 220.In other embodiments, when if the subtend substrate does not have shared electrode layer 322, cell gap 250 is meant the distance between switching device array base palte 210 and the subtend substrate 220, more specifically, cell gap 250 is meant the distance between the chromatic filter layer 224 of the pixel electrode 219 of switching device array base palte 210 and subtend substrate 220.And whether have another rete (not shown) and select mode for use, also regular as the aforementioned.Based on reason as hereinbefore, owing to adopt the switching device array base palte of whole piece and the colored optical filtering substrates of whole piece, and make via identical processing step, therefore, the sectional view of the display panel 200 that Fig. 2 illustrated can be represented on the motherboard 100, with 32 o'clock be example first panel unit 110 be the part section structure of second panel unit 120 of example with 52 o'clock.In other words, first panel unit 110 and second panel unit 120 all can have cell gap 250, and can't cause the zequin of each cell gap or the formed different big or small cell gaps of difference of calculating terminal point in response to the size difference of panel unit.
In view of this, the present invention further compensates the cell gap difference of the panel unit of those different sizes, with the design concept of display panel on same motherboard of more preferably realizing above-mentioned integration different size.
For the cell gap difference to the panel unit of different size compensates, the present invention can form lining on the specific region of switching device array base palte or subtend substrate when making switching device array base palte or subtend substrate, with switching device array base palte and subtend substrate in batch upright after, form the cell gaps of different sizes.
Fig. 3 illustrates the structural drawing according to the motherboard of a kind of display panel of another embodiment of the present invention.For the ease of understanding, present embodiment is same to adopt the layout as the panel unit with two kinds of sizes that Fig. 1 illustrated to describe, be the group of the second panel unit 300B of the group of the motherboard 300 first panel unit 300A that for example has first size and second size, and first size is different in essence in second size.In the present embodiment, first size is in fact less than second size.Yet in other embodiments, both sizes relation is meant also interchangeable.In addition, each first panel unit 300A and each second panel unit 300B have the periphery circuit region (not indicating) of viewing area (not indicating) and adjacent display areas.
As shown in Figure 3, motherboard 300 mainly comprises switching device array base palte 310, subtend substrate 320, display dielectric layer 330 and lining 340.Switching device array base palte 310 has a plurality of switching devices 312 and the corresponding a plurality of pixel electrodes 314 that connect switching device of arrayed.In addition, subtend substrate 320 is parallel in fact with switching device array base palte 310, and subtend substrate 320 has shared electrode layer 322 and be example, but is not limited thereto, and also can not comprise shared electrode layer 322.On technology, present embodiment, for example be to make switching device array base palte 310 and subtend substrate 320 respectively, switching device array base palte 310 and 320 groups of subtend substrates is upright, and display dielectric layer 330 is sealed in therebetween, have the motherboard 300 of the first panel unit 300A and the second panel unit 300B with formation.Certainly,, also need cut, make those the first panel unit 300A and the second panel unit 300B become independently display panel motherboard 300 finishing after those make.
In the present embodiment, switching device array base palte 310 for example is to adopt the thin-film transistor array base-plate of thin film transistor (TFT) as switching device 312, and subtend substrate 320 for example is a colored optical filtering substrates, has more black matrix 324 and chromatic filter layer 326 elements such as grade on it.Display dielectric layer 330 is disposed between switching device array base palte 310 and the subtend substrate 320, and the display dielectric layer 330 of present embodiment for example is liquid crystal layer or above-mentioned other possible material layer.
Hold above-mentionedly, lining 340 is disposed on the specific region between switching device array base palte 310 and the subtend substrate 320, for example corresponding to the group of the first panel unit 300A, makes the panel unit 300A that wins have first module gap 350A.Relatively, outside the group of lining 340 corresponding to the second panel unit 300B, make the second panel unit 300B have the second cell gap 350B.Present embodiment passes through configuration lining 340 in the first panel unit 300A, and does not dispose lining 340 in the second panel unit 300B, to form the first module gap 350A and the second cell gap 350B of different sizes.Thereby, preferably, allow subtend substrate 320 outside surfaces of the first panel unit 300A on the motherboard and subtend substrate 320 outside surfaces of the first panel unit 300B be surface level in fact.In other words, the summation of the thickness of the lining 340 of present embodiment and first module gap 350A equals the second cell gap 350B in fact.Moreover the first single towering gap 350A and the second cell gap 350B are that the viewing area (indicating) that is positioned at the first panel unit 300A and the viewing area (indicating) of the second panel unit 300B define.In addition, lining 340 is the single or multiple lift structure, and its material can be inorganic, as the combination of monox, silicon nitride, silicon oxynitride, silit, hafnia, aluminium oxide or other material or above-mentioned inorganic; Organic material, as the resistance of photoresist, look (color resin), benzocyclobutene (enzocyclobutane, BCB), the combination of cyclenes class, polyimide, polyamide-based, polyesters, polyalcohols, polyethylene oxide class, polyphenyl class, resene, polyethers, polyketone class or other material or above-mentioned organic material; Even be the combination of above-mentioned inorganic and organic material.
Present embodiment preferably, is meant lining 340 is made on the subtend substrate 320.For example, make lining 340 between display dielectric layer 330 and subtend substrate 320.More specifically, present embodiment forms lining 340 earlier, forms shared electrode layer 322 again, so that the shared electrode layer 322 of the first panel unit 300A covers lining 340, and between lining 340 and display dielectric layer 330.Certainly, in other embodiments, for example: form shared electrode layer 322 earlier, form lining 340 again, lining 340 is disposed on the shared electrode layer 322.In another embodiment, forming lining 340 can be formed on the following at least a position, as between subtend substrate 320 and chromatic filter layer 326 and the black matrix 324, between subtend substrate 320 and the chromatic filter layer 326 and black matrix 324 go up or subtend substrate 320 and black matrix 324 between and chromatic filter layer 326 on or other rete position, above-mentioned combination so that lining 340 is between subtend substrate 320 and display dielectric layer 330.Yi Yan's, lining 340 be positioned at a certain rete (for example: shared electrode layer 322) and/or under.In addition, present embodiment is an example with black matrix 324 and shared electrode layer 322, and then black matrix 324 is shared electrode layer 322 and covers, but is not limited thereto, and also can be positioned on the shared electrode layer 322.
On the other hand, in other embodiments, also can change into lining 340 is made on the regional area of switching device array base palte 310, make its panel unit corresponding to specific dimensions.For example; form lining 340 earlier; form pixel electrode 314 again; or form pixel electrode 314 earlier, form lining 340 more thereon, or; formed lining 340 earlier before gate insulation layer 216 forms; or form earlier lining 340 between gate insulation layer 216 and protective seam 218, or or other rete position, above-mentioned combination so that lining 340 is positioned on the pixel electrode 340 of the first panel unit 300A and/or under.Based on aforesaid explanation, such design can reach equally and form different cell gap 350A and the effect of 350B.
The lining 340 of present embodiment is the single or multiple lift structure, and its material for example is photoresist or above-mentioned other material.Lining 340 with the photoresist material is an example, and the method that then forms lining 340 for example is by being coated with the dry film photoresist on the switching device array base palte 310 and/or subtend substrate 320 of part.As Fig. 4 promptly is to illustrate a kind ofly by the technology of many rows formula dry film photoresist coating machine platform 400 coating dry film photoresists 410 on substrate 420, and this is a better model, but is not limited thereto, and also can use the single row type board.Use this technology, can directly on the regional area of switching device array base palte 310 and/or subtend substrate 320, form lining 340.Certainly, present embodiment also can adopt traditional lithography process, comprises that steps such as carrying out photoresist coating, exposure, development forms lining 340, or typography, ink-jetting process or other appropriate process or above-mentioned combination.In addition, the switching device array base palte 310 of present embodiment and/or be that other rete on the subtend substrate 320 also can adopt similar dry film coating or lithography process or typography, ink-jetting process or other appropriate process or above-mentioned combination to make is given unnecessary details herein no longer one by one.
Refer again to Fig. 3, the subtend substrate 320 of present embodiment has black matrix 324, and black matrix 324 for example is corresponding to the metal pattern on the switching device array base palte 310, as switching device 312 or relevant distribution (as sweep trace and data line etc.) etc.Certainly, with reference to other existing technology, the present invention also can select to deceive matrix and be made on the switching device array base palte, and black matrix can be positioned on the switching device or under.Also promptly, make black matrix earlier, make switching device more thereon; Or, make switching device earlier, make black matrix more thereon.This part should be those skilled in the art can the person of understanding according to prior art, therefore repeats no more.In addition, in order to keep the distance between switching device array base palte 310 and the subtend substrate 320, present embodiment is a plurality of separation materials 360 of configuration between switching device array base palte 310 and subtend substrate 320 more.The kenel of those separation materials 360 comprises light separation material, sphere gap thing or other separation material or above-mentioned combination, and the metal pattern configuration on matrix 324 and the switching device array base palte 310 can correspondingly be deceived in the position of separation material 360, to reduce the loss of aperture opening ratio.Similarly, with reference to the existing processes technology, except the configuration mode of present embodiment, the present invention also can form required black matrix and separation material by the direct storehouse of the chromatic filter layer of different colours, gives unnecessary details no longer one by one herein.
Fig. 5 illustrates the structural drawing according to the motherboard of a kind of display panel of another embodiment of the present invention.For the ease of understanding, present embodiment is same to adopt the layout as the panel unit with two kinds of sizes that Fig. 1 illustrated to describe, be the group of the second panel unit 500B of the group of the motherboard 500 first panel unit 500A that for example has first size and second size, and first size is different in essence in second size.In the present embodiment, first size is in fact less than second size.Yet in other embodiments, both sizes relation is meant also interchangeable.In addition, each first panel unit 500A and each second panel unit 500B have the periphery circuit region (not indicating) of viewing area (not indicating) and adjacent display areas.
As shown in Figure 5, motherboard 500 mainly comprises switching device array base palte 510, subtend substrate 520, display dielectric layer 530 and lining 540.Switching device array base palte 510 has a plurality of switching devices 512 and the corresponding a plurality of pixel electrodes 514 that connect switching device of arrayed.In addition, subtend substrate 520 is parallel in fact with switching device array base palte 510.On technology, present embodiment for example is to make switching device array base palte 510 and subtend substrate 520 respectively, switching device array base palte 510 and 520 groups of subtend substrates is upright, and display dielectric layer 530 is sealed in therebetween, have the motherboard 500 of the first panel unit 500A and the second panel unit 500B with formation.Present embodiment, having shared electrode layer 522 with subtend substrate 520 is example, but is not limited thereto, and also can not have a shared electrode layer 522.Certainly,, also need cut, make those the first panel unit 500A and the second panel unit 500B become independently display panel motherboard 500 finishing after those make.
In the present embodiment, switching device array base palte 510 for example is the COA substrate, and it can adopt thin film transistor (TFT) as switching device 512, and has integrated chromatic filter layer 516 in switching device 512 tops.Wherein, transistorized structure and semiconductor layer material thereof, it can adopt Fig. 2 described.In addition, subtend substrate 520 also has black matrix 524 elements such as grade except shared electrode layer 522.Display dielectric layer 530 is disposed between switching device array base palte 510 and the subtend substrate 520, and the display dielectric layer 530 of present embodiment for example is liquid crystal layer or aforementioned other possible material layer.
Similarly, present embodiment is disposed at lining 540 on the specific region between switching device array base palte 510 and the subtend substrate 520, for example corresponding to the group of the first panel unit 500A, makes the panel unit 500A that wins have first module gap 550A.Relatively, outside the group of lining 540 corresponding to the second panel unit 500B, make the second panel unit 500B have the second cell gap 550B.Present embodiment passes through configuration lining 540 in the first panel unit 500A, and does not dispose lining 540 in the second panel unit 500B, to form the first module gap 550A and the second cell gap 550B of different sizes.Thereby, preferably, allow subtend substrate 520 outside surfaces of the first panel unit 500A on the motherboard and subtend substrate 520 outside surfaces of the first panel unit 500B be surface level in fact.In other words, the summation of the thickness of lining 540 and first module gap 550A equals the second cell gap 550B in fact.Moreover the first module gap 550A and the second cell gap 550B are that the viewing area (indicating) of the viewing area that is positioned at the first panel unit 500A (indicating) and the second panel unit 500B defines it.In addition, lining 540 is the single or multiple lift structure, and its material can be inorganic, as the combination of monox, silicon nitride, silicon oxynitride, silit, hafnia, aluminium oxide or other material or above-mentioned inorganic; Organic material, as the resistance of photoresist, look, benzocyclobutene (enzocyclobutane, BCB), the combination of cyclenes class, polyimide, polyamide-based, polyesters, polyalcohols, polyethylene oxide class, polyphenyl class, resene, polyethers, polyketone class or other material or above-mentioned organic material; Even be the combination of above-mentioned inorganic and organic material.
Compare with the foregoing description, present embodiment changes into chromatic filter layer 516 is made on the switching device array base palte 510, makes it become the COA substrate, and wherein chromatic filter layer 516 is positioned at switching device 512 tops, and is covered by pixel electrode 514.In other embodiments, also chromatic filter layer can be made in the below of switching device, make the switching device array base palte become the AOC substrate.This part should be those skilled in the art can the person of understanding according to prior art, therefore repeats no more.
What deserves to be mentioned is that the chromatic filter layer in the COA substrate of present embodiment indication or the AOC substrate and the upper and lower relation of switching device are meant the upper and lower relation of formed corresponding film layer in technology, is not to emphasize the relativeness shown in graphic.That is,, form a plurality of material layers of making switching device more thereon, then be called switching device and be positioned on the chromatic filter layer if form the material layer of making chromatic filter layer earlier.Otherwise, if form a plurality of material layers of making switching device earlier, form the material layer of making chromatic filter layer more thereon, then be called switching device and be positioned under the chromatic filter layer.
Similar to the aforementioned embodiment, present embodiment is made in lining 540 on the subtend substrate 520, even also lining 540 is between display dielectric layer 530 and subtend substrate 520.More specifically, present embodiment forms lining 540 earlier, forms shared electrode layer 522 again, so that the shared electrode layer 522 of the first panel unit 500A covers lining 540, and between lining 540 and display dielectric layer 530.Certainly, in other embodiments, for example: form shared electrode layer 522 earlier, form lining 540 again, lining 540 is disposed on the shared electrode layer 522.
On the other hand, in other embodiments of the invention, also can change into lining 540 is made on the regional area of switching device array base palte 510, make its panel unit corresponding to specific dimensions.For example; form lining 540 earlier; form pixel electrode 514 again; or form pixel electrode 514 earlier, form lining 540 more thereon, or; formed lining 540 earlier before gate insulation layer (not illustrating) forms; or form earlier lining 540 between gate insulation layer (not illustrating) and protective seam (not illustrating), or other rete position, above-mentioned combination so that lining 540 is positioned on the pixel electrode 540 of the first panel unit 500A and/or under.Based on aforesaid explanation, such design can reach equally and form different cell gap 550A and the effect of 550B.
The lining 540 of present embodiment is the single or multiple lift structure, and its material for example is photoresist or above-mentioned other material.Lining 540 with the photoresist material is an example, then described as previous embodiment, form the method for lining 540, preferably, be by being coated with the dry film photoresist on the switching device array base palte 510 and/or subtend substrate 520 of part, but be not limited thereto, also can carry out lithography process, typography, ink-jetting process or other appropriate process or above-mentioned combinations such as photoresist coating, exposure, development.Similarly, switching device array base palte 510 and/or be that other rete on the subtend substrate 520 also can adopt similar dry film coating or lithography process or typography, ink-jetting process or other appropriate process or above-mentioned combination to make is given unnecessary details herein no longer one by one.
Refer again to Fig. 5, present embodiment is that black matrix 524 is made on the subtend substrate 520 equally, and black matrix 524 for example is corresponding to the metal pattern on the switching device array base palte 510, as switching device 512 or relevant distribution (as sweep trace and data line etc.) etc.In addition, present embodiment is an example with black matrix 524 and shared electrode layer 502, and then black matrix 524 is shared electrode layer 502 and covers, but is not limited thereto, and also can be positioned on the shared electrode layer 502.Certainly,, also can select to deceive matrix and be made on the switching device array base palte with reference to other existing technology, and black matrix can be positioned on the switching device or under.Also promptly, make black matrix earlier, make switching device more thereon; Or, make switching device earlier, make black matrix more thereon.This part should be those skilled in the art can the person of understanding according to prior art, therefore repeats no more.In addition, in order to keep the distance between switching device array base palte 510 and the subtend substrate 520, present embodiment is a plurality of separation materials 560 of configuration between switching device array base palte 510 and subtend substrate 520 more.The kenel of those separation materials 560 comprises light separation material, sphere gap thing or other separation material or above-mentioned combination, and the metal pattern configuration on matrix 524 and the switching device array base palte 510 can correspondingly be deceived in the position of separation material 560, to reduce the loss of aperture opening ratio.Similarly, with reference to the existing processes technology, except the configuration mode of present embodiment, the present invention also can form required black matrix and separation material by the direct storehouse of the chromatic filter layer of different colours, gives unnecessary details no longer one by one herein.
Must it should be noted that, the foregoing description preferably is formed on the first panel unit 300A or the 500A all sidedly with lining 340 or 540, promptly comprise viewing area and periphery circuit region, but be not limited thereto, lining 340 or 540 is formed on part first panel unit 300A or the 500A, promptly only comprises the viewing area.
In sum, the present invention has integrated the panel unit of multiple different size on the motherboard of same display panel, and the demand of visual reality is adjusted the configuration of panel unit.In addition, the present invention more compensates the cell gap difference of the panel unit of those different sizes in response to the panel unit of the different size on motherboard by lining, to meet the specification demand of each panel unit.In the present invention, lining can be formed on switching device array base palte or the subtend substrate, and the configuration of the kenel of switching device array base palte and subtend substrate and inner member can have many variations.In view of the above, motherboard of display panel proposed by the invention and preparation method thereof can be applied on all types of display panels, effectively to utilize the free space on the motherboard, improves the apparent not motherboard utilization factor of panel, and helps to promote whole production capacity.
Certainly; the present invention also can have other various embodiments; under the situation that does not deviate from spirit of the present invention and essence thereof; those of ordinary skill in the art work as can make various corresponding changes and distortion according to the present invention, but these corresponding changes and distortion all should belong to the protection domain of the appended claim of the present invention.
Claims (17)
1. the motherboard of a display panel, it is characterized in that, this motherboard has first panel unit group of a first size and the second panel unit group of one second size, each first panel unit in this first panel unit group has at least one first module gap, each second panel unit in this second panel unit group has at least one second cell gap, and this first size is different from this second size, and this motherboard comprises:
One switches component array baseplate, has a plurality of switching devices and the corresponding a plurality of pixel electrodes that connect those switching devices of arrayed;
One subtend substrate, parallel with this switching device array base palte;
One display dielectric layer is disposed between this switching device array base palte and this subtend substrate; And
One lining is disposed between this switching device array base palte and this subtend substrate, and this lining is corresponding to this first panel unit group, and the summation in the thickness of this lining and this first module gap equals this second cell gap.
2. the motherboard of display panel according to claim 1 is characterized in that, this lining is between this display dielectric layer and this subtend substrate.
3. the motherboard of display panel according to claim 2 is characterized in that, corresponding to this shared electrode layer of this first panel unit group between this lining and this display dielectric layer.
4. the motherboard of display panel according to claim 1 is characterized in that, this lining is between this display dielectric layer and this switching device array base palte.
5. the motherboard of display panel according to claim 4 is characterized in that, corresponding to those pixel electrodes of this first panel unit group between this lining and this display dielectric layer.
6. the motherboard of display panel according to claim 1 is characterized in that, this subtend substrate is a colored optical filtering substrates.
7. the motherboard of display panel according to claim 1 is characterized in that, this switching device array base palte is a colored filter in the substrate on the array or lists in substrate on the colored filter for a moment.
8. the motherboard of display panel according to claim 1 is characterized in that, also comprises a plurality of separation materials, is disposed between this switching device array base palte and this subtend substrate.
9. the motherboard of display panel according to claim 1 is characterized in that, this subtend substrate also has a black matrix thereon.
10. the motherboard of display panel according to claim 1 is characterized in that, this switching device array base palte has more a black matrix, its be positioned under those switching devices and/or on.
11. the method for making of the motherboard of a display panel, the motherboard of this display panel has first panel unit group of a first size and the second panel unit group of one second size, each first panel unit in this first panel unit group has at least one first module gap, each second panel unit in this second panel unit group has at least one second cell gap, and this first size is different from this second size, it is characterized in that the method for making of this motherboard comprises:
Make one and switch component array baseplate, this switching device array base palte has a plurality of switching devices and the corresponding a plurality of pixel electrodes that connect those switching devices of arrayed;
Make a subtend substrate; And
Form a display dielectric layer between this switching device array base palte and this subtend substrate,
Wherein when making this switching device array base palte or this subtend substrate, also comprise and form a lining on this switching device array base palte and/or this subtend substrate of part, this lining is corresponding to this first panel unit group, and the summation in the thickness of this lining and this first module gap equals this second cell gap.
12. the method for making of the motherboard of display panel according to claim 11 is characterized in that, the method that forms this lining comprises that coating one dry film photoresist is on this switching device array base palte and/or this subtend substrate of part.
13. the method for making of the motherboard of display panel according to claim 11 is characterized in that, this lining is to be formed on this subtend substrate.
14. the method for making of the motherboard of display panel according to claim 11 is characterized in that, this lining is before forming those pixel electrodes and/or is formed on afterwards on this switching device array base palte.
15. the method for making of the motherboard of display panel according to claim 11 is characterized in that, also comprises forming a plurality of separation materials between this switching device array base palte and this subtend substrate.
16. the method for making of the motherboard of display panel according to claim 11 is characterized in that, the making of this subtend substrate comprises that also forming one deceives matrix on this subtend substrate.
17. the method for making of the motherboard of display panel according to claim 11 is characterized in that, the making of this switching device array base palte also comprises and forms a black matrix, those switching devices are positioned on this black matrix or under.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200810007086A CN100580532C (en) | 2008-02-02 | 2008-02-02 | Motherboard of display panel and production method thereof |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200810007086A CN100580532C (en) | 2008-02-02 | 2008-02-02 | Motherboard of display panel and production method thereof |
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| CN101221326A true CN101221326A (en) | 2008-07-16 |
| CN100580532C CN100580532C (en) | 2010-01-13 |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102629018A (en) * | 2011-11-16 | 2012-08-08 | 北京京东方光电科技有限公司 | Color film substrate, thin film transistor (TFT) array substrate, manufacturing method thereof and liquid crystal display panel |
| CN102650762A (en) * | 2011-08-04 | 2012-08-29 | 北京京东方光电科技有限公司 | Mother board of liquid crystal display panel and manufacturing method for mother board |
| CN106918936A (en) * | 2017-01-22 | 2017-07-04 | 重庆捷尔士显示技术有限公司 | A kind of negative display mode LCD manufacture crafts of full visual angle TN |
| CN109116604A (en) * | 2018-09-11 | 2019-01-01 | 深圳市华星光电技术有限公司 | The method of display panel, display panel are made in mixed cutting |
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2008
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102650762A (en) * | 2011-08-04 | 2012-08-29 | 北京京东方光电科技有限公司 | Mother board of liquid crystal display panel and manufacturing method for mother board |
| CN102629018A (en) * | 2011-11-16 | 2012-08-08 | 北京京东方光电科技有限公司 | Color film substrate, thin film transistor (TFT) array substrate, manufacturing method thereof and liquid crystal display panel |
| WO2013071838A1 (en) * | 2011-11-16 | 2013-05-23 | 北京京东方光电科技有限公司 | Color film substrate, tft array substrate, manufacturing method thereof and liquid crystal display panel |
| US20140071553A1 (en) * | 2011-11-16 | 2014-03-13 | Beijing Boe Optoelectronics Technology Co., Ltd. | Color filter substrate, tft array substrate, manufacturing method of the same, and liquid crystal display panel |
| CN102629018B (en) * | 2011-11-16 | 2016-02-17 | 北京京东方光电科技有限公司 | Color membrane substrates, tft array substrate and manufacture method thereof and display panels |
| US9268182B2 (en) * | 2011-11-16 | 2016-02-23 | Beijing Boe Optoelectronics Technology Co., Ltd. | Color filter substrate, TFT array substrate, manufacturing method of the same, and liquid crystal display panel |
| CN106918936A (en) * | 2017-01-22 | 2017-07-04 | 重庆捷尔士显示技术有限公司 | A kind of negative display mode LCD manufacture crafts of full visual angle TN |
| CN109116604A (en) * | 2018-09-11 | 2019-01-01 | 深圳市华星光电技术有限公司 | The method of display panel, display panel are made in mixed cutting |
| CN109116604B (en) * | 2018-09-11 | 2021-05-11 | Tcl华星光电技术有限公司 | Method for manufacturing display panel through mixed cutting and display panel |
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| CN100580532C (en) | 2010-01-13 |
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