CN101382715A - Method for manufacturing pixel structure, display panel and optoelectronic device - Google Patents
Method for manufacturing pixel structure, display panel and optoelectronic device Download PDFInfo
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- CN101382715A CN101382715A CNA2008101696999A CN200810169699A CN101382715A CN 101382715 A CN101382715 A CN 101382715A CN A2008101696999 A CNA2008101696999 A CN A2008101696999A CN 200810169699 A CN200810169699 A CN 200810169699A CN 101382715 A CN101382715 A CN 101382715A
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Abstract
The invention provides production methods of a pixel structure, a display panel and an optoelectronic device, wherein, the production method of the pixel structure includes that firstly, a substrate formed with an on-off element and a memory capacitor is provided and a protection layer is formed on the substrate. The protection layer is provided with a patterning organic material layer and a plurality of raised patterns are formed on a part of the patterning organic material layer on which a plurality of first openings are arranged, and therefore a part of the protection layer is exposed. A reflecting layer is formed on the patterning organic material layer and the exposed part of the protection layer. A first patterning photoresist layer is formed on a part of the reflecting layer and provided with a plurality of second openings so as to expose a part of the reflecting layer. The first patterning photoresist layer is used as an etching photo mask so as to form a first contact window and a second contact window, and then the first patterning photoresist layer is removed and finally a pixel electrode is formed on the patterning organic material layer.
Description
Technical field
The invention relates to the manufacture method of a kind of dot structure, display panel, electrooptical device, and particularly relevant for a kind of semi-penetration, semi-reflective (transflective) or reflective (reflective) one pixel structure process method and have the manufacture method of the display panel and the electrooptical device of above-mentioned dot structure.
Background technology
General Thin Film Transistor-LCD can be divided into penetration, reflective, and the semi-penetration, semi-reflective three major types, and its The classification basis is the utilization of light source and the design of array base palte (array).Generally speaking, the Thin Film Transistor-LCD of penetration (transmissive TFT-LCD) mainly is as light source with backlight (backlight), pixel electrode on its thin-film transistor array base-plate is a transparency electrode, is beneficial to the light penetration that backlight sends.Reflective Thin Film Transistor-LCD (reflectiveTFT-LCD) mainly is as light source with front light-source (front-light) or external light source, pixel electrode on its thin-film transistor array base-plate is that metal or other have the reflecting electrode of good reflection characteristic material, is suitable for front light-source or external light source reflection.In addition, the semi-penetration, semi-reflective Thin Film Transistor-LCD then can be considered the assembling structure of penetration Thin Film Transistor-LCD and reflective Thin Film Transistor-LCD, and it can utilize backlight and front light-source or external light source to show simultaneously.
The one pixel structure process method of known reflective or semi-penetrated semi-reflected liquid crystal display comprises the following steps.At first, on a substrate, form a thin film transistor (TFT).Then, on substrate, form a protective seam, with the cover film transistor.Forming first a patterning photoresist layer with an opening afterwards is formed on the protective seam; and opening exposes the protective seam of the drain electrode top of thin film transistor (TFT); then; the protective seam that is exposed out is carried out etching to form contact hole; exposing the drain electrode of thin film transistor (TFT), and remove the first patterning photoresist layer.Then, form a patterned organic material layer on protective seam, this patterned organic material layer surface forms in a plurality of raised designs and this patterned organic material layer has an opening, and it exposes the contact hole in the protective seam.Then, deposition one deck reflection horizon on patterned organic material layer.Then, form second a patterning photoresist layer with an opening again on the reflection horizon, with the reflection horizon above the drain electrode that exposes thin film transistor (TFT), the mode with etching removes the reflection horizon that is exposed out again, exposing the drain electrode of thin film transistor (TFT), and remove the second patterning photoresist layer.At last, on the reflection horizon, form a pixel electrode, and pixel electrode is electrically connected with the drain electrode of thin film transistor (TFT) by the contact hole in the opening in the organic material layer and the protective seam.
The manufacturing course of above-mentioned dot structure is earlier protective seam to be carried out patterning, so that the drain electrode of thin film transistor (TFT) exposes.Afterwards, after forming the reflection horizon, the patterning program is being carried out in the reflection horizon.Thereby this kind mode need carry out one photoetching process respectively to protective seam and reflection horizon, promptly forms the secondary pattern photoresist layer.
In addition, owing to can carry out patterning to protective seam earlier in the manufacturing course of above-mentioned dot structure, so that the drain electrode of thin film transistor (TFT) comes out.Therefore when the etching program is carried out in the reflection horizon, must consider that this etching program can not cause damage to the drain electrode that is exposed out when follow-up.For this reason, the metal layer material in the current pixel structure is to use titanium as upper metal layers.Yet, use titanium need use the dry etching mode to be patterned, and the dry etching program can greatly reduce the productive rate of dot structure as the metal layer material of dot structure.
Summary of the invention
The invention provides a kind of one pixel structure process method, it can shorten the process time and can increase production capacity.
The invention provides a kind of manufacture method of display panel, to produce display panel with above-mentioned dot structure.
The invention provides a kind of manufacture method of electrooptical device, to produce electrooptical device with above-mentioned dot structure.
The present invention proposes a kind of one pixel structure process method.At first, provide a substrate.An on-off element and a holding capacitor have been formed with on the substrate.On substrate, form a protective seam.Protective seam covers on-off element and holding capacitor.On protective seam, form a patterned organic material layer, be formed with a plurality of raised designs and patterned organic material layer on the wherein partially patterned organic material layer and have a plurality of first openings.These first openings expose the protective seam of the top electrode top of the protective seam that is positioned at source/drain top and holding capacitor respectively.Forming a reflection horizon on the patterned organic material layer and on the partial protection layer that is exposed out.On partially reflecting layer, form one first patterning photoresist layer, and the first patterning photoresist layer have a plurality of second openings.These second openings expose partially reflecting layer, and each second opening is in fact corresponding to each first opening.With the first patterning photoresist layer as the etching photomask; removing the partially reflecting layer that is exposed out and to be positioned at partial protection layer under the partially reflecting layer that is exposed out, and form second contact hole that first contact hole and that exposes the source/drain of on-off element exposes the top electrode of holding capacitor.Remove the first patterning photoresist layer.On patterned organic material layer, form a pixel electrode, and pixel electrode is electrically connected with the source/drain of on-off element by first contact hole and second contact hole is electrically connected with the top electrode of holding capacitor.
In one embodiment of this invention, the above-mentioned protective seam that removes the reflection horizon that is exposed out and be positioned under the partially reflecting layer that is exposed out is to adopt original position program (in-situ process).
In one embodiment of this invention, above-mentionedly use a gray level mask that one organic material layer is carried out an exposure program to patterned organic material layer.
In one embodiment of this invention, the above-mentioned formation on-off element and the method for holding capacitor at first, form a first metal layer on substrate, and wherein the first metal layer comprises a grid and a bottom electrode.Then, on the first metal layer, form an insulation course.On the insulation course above the grid, form an active layers.At last, form one second metal level on insulation course, wherein second metal level comprises source electrode and drain electrode that is positioned at part active layers top and the top electrode that is positioned at the bottom electrode top.
In one embodiment of this invention, the above-mentioned formation on-off element and the method for holding capacitor at first, form a first metal layer on substrate, and wherein the first metal layer comprises a grid and a bottom electrode.Then, on the first metal layer, form an insulation course, semi-conductor layer and one second metal level in regular turn.Form one second patterning photoresist layer on second metal level, wherein the second patterning photoresist layer has a first and a second portion.First cover grid top, second metal level of second metal level of top, second portion cover grid both sides and bottom electrode top.With the second patterning photoresist layer is photomask, with patterning second metal level and semiconductor layer, to define an active layers in the grid top and to define top electrode in the bottom electrode top.The second patterning photoresist layer is carried out an ashing program, to remove first.At last, be photomask with the second portion of the second patterning photoresist layer, to remove second metal level of active layers top, to define source electrode and drain electrode.
In one embodiment of this invention, the second above-mentioned patterning photoresist layer is with a gray level mask one photoresist layer to be carried out an exposure program to be formed.
The present invention proposes a kind of manufacture method of display panel, comprises one pixel structure process method as described above.
The present invention proposes a kind of manufacture method of electrooptical device, comprises the manufacture method of display panel as described above.
In sum; since the present invention be utilize single or same patterning photoresist layer as the etching photomask; to remove the partially reflecting layer that is exposed out in regular turn and to be positioned at partial protection layer under the partially reflecting layer that is exposed out; one pixel structure process method compared to known reflective liquid-crystal display; one pixel structure process method of the present invention is except being reduced by at least photoetching process one; to shorten the process time and to increase outside the production capacity, can also protect second metal level to avoid being subjected to the erosion of etching liquid by protective seam simultaneously.
Description of drawings
Figure 1A to Fig. 1 L is the diagrammatic cross-section of a kind of one pixel structure process method of one embodiment of the invention.
Fig. 2 A to Fig. 2 N is the diagrammatic cross-section of a kind of one pixel structure process method of other embodiment of the present invention.
Fig. 3 is the synoptic diagram of a kind of display panel of one embodiment of the invention.
Fig. 4 is the synoptic diagram of a kind of electrooptical device of one embodiment of the invention.
Drawing reference numeral:
100,200: dot structure
100a, 200a: substrate
110a, 210a: on-off element
110b, 210b: holding capacitor
112,212: the first metal layer
112a, 212a: grid
112b, 212b: bottom electrode
112c, 212c: weld pad
114,214: insulation course
116,216 ': active layers
118,218: the second metal levels
118a, 218a: source electrode
118b, 218b: drain electrode
118c, 218c: top electrode
118d, 218d: conductive pattern
120,220: protective seam
130,230: patterned organic material layer
132a, 132b, 132c, 232a, 232b, 232c: opening
134,234: raised design
140,240: the reflection horizon
150,250: the first patterning photoresist layers
152a, 152b, 252a, 252b: opening
160,260: pixel electrode
160a: guard electrode
216: semiconductor layer
216a: channel material layer
216b: ohmic contact layer
219: the second patterning photoresist layers
219a: first
219b, 219b ': second portion
300: display panel
310: image element array substrates
320: another substrate
320a: transparency electrode
330: display medium
400: electrooptical device
410: electronic component
C1, C1 ': first contact hole
C2, C2 ': second contact hole
P1, P1 ': pixel region
P2, P2 ': pad zone
Embodiment
For above-mentioned and other purposes, feature and advantage of the present invention can be become apparent, embodiment cited below particularly, and cooperate appended graphic being described in detail below.
Figure 1A to Fig. 1 L is the diagrammatic cross-section of a kind of one pixel structure process method of one embodiment of the invention.Please refer to Figure 1A, at first, provide a substrate 100a, wherein substrate 100a has a pixel region P1 and a pad zone P2.Then, on substrate 100a, form a first metal layer 112.The first metal layer 112 comprises a grid 112a, a bottom electrode 112b and a weld pad 112c, and wherein grid 112a and bottom electrode 112b are positioned at the pixel region P1 of substrate 100a, and weld pad 112c is positioned at the pad zone P2 of substrate 100b.
What deserves to be mentioned is, in present embodiment graphic, be to be that example illustrates with the reflective pixel structure, but the present invention preferably is applied in the transflective pixel structure or in the micro-reflection type dot structure.In addition, in present embodiment graphic, pad zone P2 is to be that example illustrates with the sweep trace pad zone.Though the graphic data line pad zone that do not show, but the structure of data line pad zone is similar to the sweep trace pad zone, difference only is that the weld pad of data line pad zone is to belong to second metal level, but the weld pad 112c of the graphic sweep trace pad zone P2 that goes out to be illustrated belongs to the first metal layer 112.Moreover the structure of pad zone P2 is not limited to the described structure of following making flow process.That is to say, no matter pad zone P2 is to be example with sweep trace pad zone or data line pad zone, its structure only has the first metal layer, second metal level, above-mentioned two metal levels and exists simultaneously, and utilize other conductive layer to come stacking of above-mentioned two metal levels of cross-over connection or above-mentioned two metal levels.In other embodiment, dot structure can be only serves as mainly to illustrate and design with pixel region P1, and need not consider design and the explanation of pad zone P2.
In addition, in the present embodiment, the material of substrate 110a is to comprise inorganic transparent material (as: glass, quartzy, or other suitable material, or above-mentioned combination), organic transparent material (as: polyalkenes Ju Hai class, polyalcohols, polyesters, rubber, thermoplastic polymer, thermosetting polymer, the poly aromatic hydro carbons, poly-methyl propionyl acid methyl esters class, polycarbonate-based, or other suitable material, or above-mentioned derivant, or above-mentioned combination), inorganic transparent materials (as: silicon chip, pottery, or other suitable material, or above-mentioned combination), or above-mentioned combination.
In addition, be formed at the first metal layer 112 on the substrate 100a, its material preferably adopts can carry out the metal material of wet etching, but is not limited thereto, and in other embodiment, also can adopt the metal material that carries out dry etching.The first metal layer 112 can be single layer structure or sandwich construction, and in the present embodiment, the first metal layer 112 is to be example with the sandwich construction, for example is that molybdenum or molybdenum-aluminium are laminated or molybdenum-aluminium-molybdenum is laminated.So, the invention is not restricted to this.In other embodiment, the material of the first metal layer 112 can be by metal, above-mentioned alloy, above-mentioned metal oxide, above-mentioned metal nitride or above-mentioned combinations such as gold, silver, copper, tin, lead, hafnium, tungsten, molybdenum, neodymium, titanium, tantalum, aluminium, zinc.
Then, please refer to Figure 1B, form an insulation course 114 on the first metal layer 112, it covers grid 112a, the bottom electrode 112b of pixel region P1 and the weld pad 112c of pad zone P2.In the present embodiment, insulation course 114 can be the single or multiple lift structure, and its material for example is inorganic (as: monox, silicon nitride, silicon oxynitride, silit, hafnia, aluminium oxide or other material or above-mentioned combination), organic material (as: photoresist, benzocyclobutene (enzocyclobutane, BCB), cyclenes class, polyimide, polyamide-based, polyesters, polyalcohols, polyethylene oxide class, polyphenyl class, resene, polyethers, polyketone class or other suitable material or above-mentioned combination) or above-mentioned combination.
Please refer to Fig. 1 C, on the insulation course above the grid 112a 114, form an active layers 116.Specifically, in the present embodiment, the material of active layers 116 can be N type doping silicide or the P type doping silicide of above-mentioned lattice or germanium silicide or other material or the above-mentioned combination of above-mentioned lattice of amorphous silicon, monocrystalline silicon, microcrystal silicon, polysilicon or above-mentioned lattice, and the structure of active layers 116 can be single layer structure or sandwich construction.For example, the single layer structure that active layers 116 can be made up of amorphous silicon (a-Si) and/or N type heavily doped amorphous silicon, the also double-decker that can be made up of amorphous silicon (a-Si) and N type heavily doped amorphous silicon, the structural arrangement that it is above-mentioned can be horizontally and/or homeotropic alignment.Active layers 116 is to serve as to implement example with the double-decker that amorphous silicon (also being called channel layer) and N type heavily doped amorphous silicon (also being called ohmic contact layer) are formed in the present embodiment, but not as limit.
Then, please refer to Fig. 1 D, form one second metal level 118 on insulation course 114, wherein second metal level 118 comprises source electrode 118a, drain electrode 118b, the top electrode 118c above bottom electrode 112b and the conductive pattern 118d that is positioned at pad zone P2 of part active layers 116 tops that are positioned at pixel region P1.So far, on substrate 100a, roughly finish the making of on-off element 110a and holding capacitor 110b.Must it should be noted that at this production method and the structure of above-mentioned on-off element 110a and memory capacitance 110b are the example of the embodiment of the invention, are not limited to this mode, the structure or the production method that also can adopt other to be suitable for.In addition, be formed at second metal level 118 on the insulation course 114, its material preferably adopts can carry out the metal material of wet etching, but is not limited thereto, and also can adopt the metal material that carries out dry etching.Second metal level 118 can be single layer structure or sandwich construction, and in the present embodiment, second metal level 118 is to be example with the sandwich construction, for example is that molybdenum or molybdenum-aluminium are laminated or molybdenum-aluminium-molybdenum is laminated.So, the invention is not restricted to this.In other embodiment, the material of second metal level 118 can be by metal, above-mentioned alloy, above-mentioned metal oxide, above-mentioned metal nitride or above-mentioned combinations such as gold, silver, copper, tin, lead, hafnium, tungsten, molybdenum, neodymium, titanium, tantalum, aluminium, zinc.
In addition, must it should be noted that on-off element 110a of the present invention and structure thereof serve as to implement example with the bottom gate type structure, but are not limited thereto.In other embodiment, only if change first gold medal layer by layer 112 and the order that is formed on the substrate 100a of active layers 116 can become the top gate type structure.Illustrate, go up in substrate 100a and form active layers 116, then, form an insulation course 114 on active layers 116, wherein insulation course 114 covers the active layers 116 of pixel region P1.Then, form the first metal layer 110a on substrate 100a, wherein the first metal layer 112 comprises the weld pad 112c of grid 112a, bottom electrode 112b and pad zone P2, and grid 112a is on the insulation course above the active layers 116 114.Afterwards, the mode of all similar the above embodiment of the present invention of remaining step.
In addition, in order to obtain preferable electric characteristics, can be after the first metal layer 112 be finished, cover inner layer dielectric layer (not illustrating) again on this first metal layer 112 and insulation course 114, then second metal level 118 of this top gate type structure just is formed on inner layer dielectric layer (not illustrating), and wherein second metal level 118 comprises source electrode 118a, drain electrode 118b, the top electrode 118c above bottom electrode 112b and the conductive pattern 118d that is positioned at pad zone P2 of part active layers 116 tops that are positioned at pixel region P1.So far, on substrate 100a, roughly finish the making of on-off element 110a and holding capacitor 110b.
Please then refer to Fig. 1 E, form a protective seam 120 on substrate 100a, wherein protective seam 120 covers the on-off element 110a of pixel region P1 and conductive pattern 118d and the insulation course 114 of holding capacitor 110b and pad zone P2.In the present embodiment; protective seam 120 can be the single or multiple lift structure, and its material is organic material (for example: photoresist, benzocyclobutene, cyclenes class, polyimide, polyamide-based, polyesters, polyalcohols, polyethylene oxide class, polyphenyl class, resene, polyethers, polyketone class or other material or above-mentioned combination), inorganic (for example being monox, silicon nitride, silicon oxynitride, other materials that are fit to or above-mentioned combination) or above-mentioned combination.
Please refer to Fig. 1 F, then, on protective seam 120, form a patterned organic material layer 130, be formed with a plurality of raised designs 134 on the wherein partially patterned organic material layer 130, and patterned organic material layer 130 has a plurality of opening 132a, 132b, 132c.The raised design 134 of the embodiment of the invention is formed on the organic material layer of pixel region P1, but is not limited thereto, and raised design 134 also can be formed on the surface or other suitable rete of surface, insulation course 114 of protective seam 120.Opening 132a exposes the protective seam 120 on the drain electrode 118b that is positioned at pixel region P1; opening 132b exposes the protective seam 120 of the top electrode 118c top that is positioned at pixel region P1, and opening 132c exposes the part metals layer 118d that be positioned at pad zone P2 and the protective seam 120 of partial insulative layer 114 tops.
In the present embodiment, the generation type of patterned organic material layer 130 is to use a gray level mask (Grey-Level Mask, do not illustrate), semi-transparent mask (Half-Tone Mask), multistage mask (Multi-Tone Mask) or other suitable mask, one organic material layer (not illustrating) is carried out an exposure program, wherein gray level mask is to use the mask of different shading values, make organic material layer be subjected to the exposure of different illumination, after developing process, can obtain the shape of different weights, promptly form patterned organic material layer 130.In addition, the material of patterned organic material layer 130 comprises photoresist, benzocyclobutene, cyclenes class, polyimide, polyamide-based, polyesters, polyalcohols, polyethylene oxide class, polyphenyl class, resene, polyethers, polyketone class or other material or above-mentioned combination.
Please refer to Fig. 1 G, then, forming a reflection horizon 140 on the patterned organic material layer 130 and on the partial protection layer 120 that is exposed out.That is to say; these raised designs 134 and partial protection layer 120 of reflection horizon 140 overlay pattern organic material layers 130; in other words, reflection horizon 140 covers whole pixel region P1 and pad zone P2 or is called reflection horizon 140 and is conformally formed on whole pixel region P1 and pad zone P2.In addition, in the present embodiment, reflection horizon 140 can be single layer structure or sandwich construction, and its material can be aluminium, aluminium alloy, silver or other have the metal of high reflectance.In addition, the described raised design 134 of the embodiment of the invention also can be formed on the surface in reflection horizon 140 in other embodiment.
Please refer to Fig. 1 H, then, on the reflection horizon 140 of pixel region P1, form one first patterning photoresist layer 150, and the first patterning photoresist layer 150 has a plurality of opening 152a, 152b.More specifically, the first patterning photoresist layer 150 exposes the reflection horizon 140 that is positioned at pad zone P2, and opening 152a, the 152b of the first patterning photoresist layer 150 expose the partially reflecting layer 140 that is positioned at pixel region P1, and opening 152a is in fact corresponding to opening 132a, and opening 152b is in fact corresponding to opening 132b.
Please also refer to Fig. 1 I and Fig. 1 J; then; with the first patterning photoresist layer 150 as the etching photomask; be arranged in the partially reflecting layer 140 that pixel region P1 is exposed out and be positioned at partial protection layer 120 under the partially reflecting layer 140 that is exposed out to remove; and form one first contact hole C1 and one second contact hole C2; wherein the first contact hole C1 exposes the drain electrode 118b of on-off element 110a, and the second contact hole C2 exposes the top electrode 118c of holding capacitor 110b.In addition, in pad zone P2, reflection horizon 140 is removed fully, partial protection layer 120 is removed and expose the conductive pattern 118d of part, and partial protection layer 120 is removed with partial insulative layer 114 and exposes the weld pad 112c of part.Must it should be noted that at this (as pixel region P1) is as the etching photomask with the first patterning photoresist layer 150 and patterned organic material layer 130 when removing the partial protection layer 120 that is positioned under the partially reflecting layer that is exposed out 140.When removing the partial protection layer 120 (as pad zone P2) that is patterned organic material layer 130 and is exposed is as the etching photomask with patterned organic material layer 130.In the present embodiment, the preferred approach that removes the partially reflecting layer 140 that is exposed out and be positioned at the partial protection layer 120 under the partially reflecting layer that is exposed out 140 comprises wet etching, but is not limited thereto, and also can adopt suitable dry etching.
Specifically, in the present embodiment, removing the reflection horizon 140 that is exposed out and being positioned at the partially reflecting layer 140 beneath protective seams 120 that are exposed out is to adopt original position program (in-situ process).That is to say, when removing the reflection horizon 140 that is exposed out and being positioned at protective seam 120 under the partially reflecting layer that is exposed out 140, can be in identical reaction chamber etching reflection horizon 140 and protective seam 120 are finished in regular turn with different etching liquids.That is to say, photoetching process or be called or same patterning photoresist layer are only arranged once only, but finish reflection horizon 140 etchings and protective seam 120 etchings simultaneously.
Please refer to Fig. 1 K, then, remove the first patterning photoresist layer 150, to expose reflection horizon 140.Then, please refer to Fig. 1 L, on the reflection horizon 140 of pixel region P1 and partially patterned organic material layer 130, form and form guard electrode 160a on a pixel electrode 160 and the organic material layer 130 at pad zone P2.Particularly, pixel electrode 160 is electrically connected with the drain electrode 118b of on-off element 110a by the first contact hole C1, and pixel electrode 160 is electrically connected with the top electrode 118c of holding capacitor 110b by the second contact hole C2.Conductive pattern 118d and weld pad 112c are electrically connected to each other by guard electrode 160a.So far, dot structure 100 is roughly finished.
Specifically; on the practice, the method that forms pixel electrode 160 and guard electrode 160a for example be with physical vapor deposition (Physical Vapor Deposition, PVD) sputtering technology of method forms; but be not limited thereto, also can use screen painting method, ink-jet method or other suitable method.Pixel electrode 160 and guard electrode 160a can be the single or multiple lift structure, and the display mode of its material visible pixel structure 100 design and different.For example, pixel electrode 160 and guard electrode 160a can be that to be made by the electrically conducting transparent material for example be indium tin oxide, indium-zinc oxide, indium tin zinc oxide, hafnia, zinc paste, aluminium oxide, aluminium tin-oxide, aluminium zinc oxide, cadmium tin-oxide, cadmium zinc oxide or above-mentioned combination.Preferably, pixel electrode 160 forms simultaneously with guard electrode 160a, but is not limited thereto, and the two also can not form simultaneously.
In the present invention; because removing the partially reflecting layer 140 that is exposed out and being positioned at the partially reflecting layer 140 beneath partial protection layer 120 that are exposed out is to utilize same patterning photoresist layer as the etching photomask; and the mode that can adopt the original position program in regular turn; therefore compared to the one pixel structure process method of known reflective liquid-crystal display; present embodiment can omit photoetching process at least one time; use number to reduce mask, and the process time that can shorten dot structure 100 is to reduce production costs.In addition, present embodiment is to adopt the molybdenum or the laminated of molybdenum and aluminium that can carry out wet etching to be preferable example as the first metal layer 112 and second metal level 118, but is not limited thereto.Because wet-etching technology is fast compared to dry etch process, therefore can increase production capacity.In addition, when carrying out wet etching, because therefore matcoveredn 120 protections second metal level 118 can avoid second metal level 118 to be subjected to the erosion of etching liquid.
What is particularly worth mentioning is that the foregoing description is to be that example illustrates with the reflective pixel structure, thereby reflection horizon 140 can cover whole pixel region P1.Yet the present invention preferably is applied in the transflective pixel structure or in the micro-reflection type dot structure.If the foregoing description is to be applied to transflective pixel structure or micro-reflection type dot structure, then can be divided at least one echo area and at least one penetrating region (not illustrating) or at least one little echo area and at least one penetrating region (not illustrating) among the pixel region P1 of substrate 100a.And when follow-up formation patterned organic material layer 130 and reflection horizon 140, wherein raised design 134 on the patterned organic material layer 130 and reflection horizon 140 only can be formed in the echo area.
Fig. 2 A to Fig. 2 N is the diagrammatic cross-section of a kind of one pixel structure process method of another embodiment of the present invention.Please refer to Fig. 2 A, at first, provide a substrate 200a, wherein substrate 200a has a pixel region P1 ' and a pad zone P2 '.Then go up and form a first metal layer 112 in substrate 200a, the first metal layer 212 comprises a grid 212a, a bottom electrode 212b and a weld pad 212c, wherein grid 212a and bottom electrode 212b are positioned at the pixel region P1 ' of substrate 200a, and weld pad 212c is positioned at the pad zone P2 ' of substrate 200b.In addition, the structure of the material of the material of substrate 200a, the first metal layer 212, the design of weld pad 212c and weld pad 212c such as first previous paragraphs are described (the substrate 100a of corresponding Figure 1A and the paragraph of the first metal layer 112), so do not repeat them here.In other embodiment, dot structure, can be only serve as mainly to illustrate and design with pixel region P1 ', and need not consider explanation and the design of pad zone P2 '.
Please refer to Fig. 2 B, then, on the first metal layer 212, form an insulation course 214, semi-conductor layer 216 and one second metal level 218 in regular turn.That is to say, insulation course 214 covers grid 212a, the bottom electrode 212b of pixel region P1 ' and the weld pad 212c of pad zone P2 ', semiconductor layer 216 covers insulation course 214, second metal level 218 covers semiconductor layer 216, in other words, insulation course 214, semiconductor layer 216 and second metal level 218 stack together in regular turn.What deserves to be mentioned is that in the present embodiment, semiconductor layer 216 can be by a channel layer 216a and an ohmic contact layer 216b with example that homeotropic alignment is consisted of, but is not limited thereto, also can be horizontal.Wherein, the material of channel layer 216a comprises amorphous silicon, monocrystalline silicon, microcrystal silicon, polysilicon or other suitable material or above-mentioned combination.Channel layer is to serve as to implement example with amorphous silicon (a-Si) in the present embodiment, but not as limit.In addition, the material of ohmic contact layer 216b comprises N type doped amorphous silicon, P type doped amorphous silicon, N type doping/P type doped monocrystalline silicon, N type doping/P type doped microcrystalline silicon, N type doping/P type doped polycrystalline silicon or other suitable material or above-mentioned combination.Ohmic contact layer 216b is to serve as to implement example with N type heavily doped amorphous silicon in the present embodiment, but not as limit.In addition, the material of the insulation course 214 and second metal level 218 such as first previous paragraphs are described (insulation course 214 of corresponding Figure 1B and the paragraph of Fig. 1 D second metal level 118), so do not repeat them here.
Please refer to Fig. 2 C, then, on second metal level 218, form one second patterning photoresist layer 219.The second patterning photoresist layer 219 has a 219a of first and a second portion 219b, the 219a of first cover grid 212a top wherein, second metal level 218 of top, second portion 219b cover grid 212a both sides, second metal level 218 of bottom electrode 212b top and the conductive pattern 218d of pad zone P2.
Specifically, the second patterning photoresist layer 219 is with a gray level mask (not illustrating), semi-transparent mask (Half-Tone Mask), multistage mask (Multi-Tone Mask) or other suitable mask, one photoresist layer (not illustrating) is carried out an exposure program to be formed, wherein gray level mask is to use the mask of different shading values, make photoresist layer be subjected to the exposure of different illumination, after developing process, can obtain the shape of different weights, promptly form the 219a of first and the second portion 219b of the second patterning photoresist layer 219, and expose the part second metal level 218, wherein, the thickness of the 219a of first is in fact less than the thickness of second portion 219b.
Please refer to Fig. 2 D, then, with the second patterning photoresist layer 219 is photomask, second metal level 218 that comes the part that etching is exposed out with its under rete (as: 216), with patterning second metal level 218 and semiconductor layer 216, and in defining an active layers 216 ' above the grid 212a, above bottom electrode 212b, defining top electrode 218c and define conductive pattern 218d in pad zone P2 '.At this moment, the zone of not covered by the second patterning photoresist layer 219 will expose partial insulating layer 214.Specifically, the material of the active layers 216 ' of present embodiment is with the material of the channel layer 216a of the semiconductor layer 216 of above-mentioned Fig. 2 B, and it all is to serve as to implement example with amorphous silicon (a-Si), but not as limit.
Please refer to Fig. 2 E, then, the second patterning photoresist layer 219 is carried out an ashing program, to control the thickness that the second patterning photoresist layer 219 is etched in the cineration technics, removing the 219a of first fully, and form part second metal level 218 that second portion 219b ' after the thinning can expose active layers 216 ' top.
Then, please refer to Fig. 2 F and 2G, with the second portion 219b ' after 219 thinnings of the second patterning photoresist layer as photomask, to remove second metal level 218 of active layers 216 ' top, to define source electrode 218a and drain electrode 218b, and remove part ohmic contact layer 216b partly, and expose part active layers 216 '.Afterwards, the second portion 219b ' after removing thinning is to expose the source electrode 218a that is positioned at pixel region P1, the conductive pattern 218d that drains 218b and top electrode 218c and pad zone P2, shown in Fig. 2 G.Particularly, in the present embodiment, active layers 216 ' is as the electron channel between source electrode 218a and the drain electrode 218b, and ohmic contact layer 216b then can reduce the source electrode 218a/ drain electrode 218b of second metal level 218 and the contact impedance between the active layers 216 '.So far, on substrate 200a, roughly finish on-off element 210a and holding capacitor 210b.Wherein, present embodiment is to be example with the bottom gate type structure, but is not limited thereto, and also can use the described top gate type structure of the foregoing description.Must it should be noted that at this production method and the structure of above-mentioned on-off element 110a and memory capacitance 110b are the example of the embodiment of the invention, are not limited to this mode, the structure or the production method that also can adopt other to be suitable for.
Please continue the 2G with reference to figure, then, form a protective seam 220 on substrate 200a, wherein protective seam 220 covers the on-off element 210a of pixel region P1 ' and the conductive pattern 218d of holding capacitor 210b and pad zone P2 '.In addition, the material of protective seam 220 such as first previous paragraphs are described (paragraph of the protective seam 120 of corresponding diagram 1E), so do not repeat them here.
Please refer to Fig. 2 H, then, on protective seam 220, form a patterned organic material layer 230, be formed with a plurality of raised designs 234 on the wherein partially patterned organic material layer 230, and patterned organic material layer 230 has a plurality of opening 232a, 232b, 232c.The raised design 234 of the embodiment of the invention is formed on the organic material layer of pixel region P1, but is not limited thereto, and raised design 234 also can be formed on the surface or other suitable rete of surface, insulation course 214 of protective seam 220.Opening 232a exposes the protective seam 220 on the drain electrode 218b that is positioned at pixel region P1 '; opening 232b exposes the protective seam 220 of the top electrode 218c top that is positioned at pixel region P1 ', and opening 232c exposes the part metals layer 218d that be positioned at pad zone P2 ' and the protective seam 220 of partial insulative layer 214 tops.
In the present embodiment, the generation type of patterned organic material layer 230 is to use a gray level mask (Grey-Level Mask) (not illustrating), semi-transparent mask (Half-Tone Mask), multistage mask (Multi-Tone Mask) or other suitable mask, one organic material layer (not illustrating) is carried out an exposure program, wherein gray level mask is to use the mask of different shading values, make organic material layer be subjected to the exposure of different illumination, after developing process, can obtain the shape of different weights, promptly form patterned organic material layer 230.In addition, the material of patterned organic material layer 230 such as first previous paragraphs are described (paragraph of the patterned organic material layer 130 of corresponding diagram 1F), so do not repeat them here.
Please refer to Fig. 2 I, then, forming a reflection horizon 240 on the patterned organic material layer 230 and on the partial protection layer 220 that is exposed out.That is to say; these raised designs 234 and partial protection layer 220 of reflection horizon 240 overlay pattern organic material layers 230; in other words, reflection horizon 240 covers whole pixel region P1 ' and pad zone P2 ' or is called reflection horizon 240 and is conformally formed on whole pixel region P1 ' and pad zone P2 '.In the present embodiment, reflection horizon 240 can be single layer structure or sandwich construction, and its material can be aluminium, aluminium alloy, silver or other have the metal of high reflectance.In addition, the position of the described raised design 134 of the embodiment of the invention, also can be formed on the surface in reflection horizon 140 in the embodiment that other does not illustrate only for illustrating.
Please refer to Fig. 2 J, then, on the partially reflecting layer 240 of pixel region P1 ', form one first patterning photoresist layer 250, and the first patterning photoresist layer 250 has a plurality of opening 252a, 252b.More specifically, the first patterning photoresist layer 150 exposes the reflection horizon 240 that is positioned at pad zone P2 ', and these openings 252a, the 252b of the first patterning photoresist layer 250 are to expose partially reflecting layer 240, and opening 252a is in fact corresponding to opening 232a, and opening 252b is in fact corresponding to opening 232b.
Please also refer to Fig. 2 K and Fig. 2 L; then; with the first patterning photoresist layer 250 as the etching photomask; be arranged in the partially reflecting layer 240 that pixel region P1 ' is exposed out and be positioned at partial protection layer 220 under the partially reflecting layer 240 that is exposed out to remove; and form one first contact hole C1 ' and one second contact hole C2 '; wherein the first contact hole C1 ' exposes the drain electrode 218b of on-off element 210a, and the second contact hole C2 ' exposes the top electrode 218c of holding capacitor 210b.In addition, in pad zone P2 ', reflection horizon 240 is removed fully, partial protection layer 220 is removed and expose the conductive pattern 218d of part, and partial protection layer 220 is removed with partial insulative layer 214 and exposes the weld pad 212c of part.Must it should be noted that at this (as pixel region P1) is as the etching photomask with the first patterning photoresist layer 250 and patterned organic material layer 230 when removing the partial protection layer 220 that is positioned under the partially reflecting layer that is exposed out 140.When removing the partial protection layer 220 (as pad zone P2) that is patterned organic material layer 230 and is exposed is as the etching photomask with patterned organic material layer 230.In the present embodiment, the preferred approach that removes the partially reflecting layer 240 that is exposed out and be positioned at the partial protection layer 220 under the partially reflecting layer that is exposed out 240 comprises wet etching, but is not limited thereto, and also can adopt suitable dry etching.
Specifically, in the present embodiment, removing the reflection horizon 240 that is exposed out and being positioned at the partially reflecting layer 240 beneath protective seams 220 that are exposed out is to adopt original position program (in-situ process).That is to say, when removing the reflection horizon 240 that is exposed out and being positioned at protective seam 220 under the partially reflecting layer that is exposed out 240, can be in identical reaction chamber etching reflection horizon 240 and protective seam 220 are finished in regular turn with different etching liquids.That is to say, photoetching process or be called or same patterning photoresist layer are only arranged once only, but finish reflection horizon 240 etchings and protective seam 220 etchings simultaneously.
Please refer to Fig. 2 M, then, remove the first patterning photoresist layer 250, to expose reflection horizon 240.Then, please refer to Fig. 2 N, on the reflection horizon 240 of pixel region P1 ' and partially patterned organic material layer 230, form and form guard electrode 260a on a pixel electrode 260 and the organic material layer 230 at pad zone P2 '.Particularly, pixel electrode 260 is electrically connected with the drain electrode 218b of on-off element 210a by the first contact hole C1 ', and pixel electrode 260 is electrically connected with the top electrode 218c of holding capacitor 210b by the second contact hole C2 '.Conductive pattern 218d and weld pad 212c are electrically connected to each other by guard electrode 260a.In the present embodiment, the material of pixel electrode 260 such as first previous paragraphs are described (paragraph of the pixel electrode 160 of corresponding diagram 1L), so do not repeat them here.So far, dot structure 200 is roughly finished.Preferably, pixel electrode 260 forms simultaneously with guard electrode 260a, but is not limited thereto, and the two also can not form simultaneously.
Similarly, present embodiment can omit one time photoetching process equally at least, uses number to reduce mask, and the process time that can shorten dot structure 200 is to reduce production costs.In addition, present embodiment is if adopt wet-etching technology to come the etching the first metal layer 212 and second metal level 218 also can increase production capacity.In addition, when carrying out wet etching, because therefore matcoveredn 220 protections second metal level 218 can avoid second metal level 218 to be subjected to the erosion of etching liquid equally.
What need explanation once more is, the foregoing description is to be that example illustrates with the reflective pixel structure, thereby reflection horizon 240 can cover whole pixel region P1 '.Yet the present invention preferably is applied in the transflective pixel structure or in the micro-reflection type dot structure.If the foregoing description is to be applied to transflective pixel structure, then can be divided at least one echo area and at least one penetrating region (not illustrating) or at least one little echo area and at least one penetrating region (not illustrating) among the pixel region P1 ' of substrate 200a.And when follow-up formation patterned organic material layer 230 and reflection horizon 240, wherein raised design 234 on the patterned organic material layer 230 and reflection horizon 240 only can be formed in the echo area.
Fig. 3 is the synoptic diagram of a kind of display panel of one embodiment of the invention.Please refer to Fig. 3, the finished product of the display panel 300 of present embodiment comprises that at least one image element array substrates 310, another substrate 320 and one with respect to this image element array substrates 310 are arranged at the display medium 320 between image element array substrates 310 and another substrate 320, wherein image element array substrates 310 has above-mentioned dot structure 100 or the dot structure shown in Fig. 2 N 200 shown in Fig. 1 L, and another substrate 320 optionally has a transparency electrode 320a.The manufacture method of display panel 300 comprises the manufacture method of aforesaid dot structure 100 or dot structure 200, also assembles according to the manufacturing course of various display panels 300, to obtain display device 300 again.
In addition, when display medium 330 is photoelectricity deviation material, for example be liquid crystal material, then display panel 300 can be semi-penetrating and semi-reflecting type display panel, micro-reflection type display panel reflective display panel, colored filter display panel of (color filter on array) on active layers, active layers display panel of (array on color filter) on colored filter, vertical orientation type (VA) display panel, horizontal switch type (IPS) display panel, multi-domain perpendicular alignment-type (MVA) display panel, twisted nematic (TN) display panel, super-twist nematic (STN) display panel, pattern vertical orientation type (PVA) display panel, super pattern vertical orientation type (S-PVA) display panel, the advanced person is type (ASV) display panel with great visual angle, fringe field switch type (FFS) display panel, continuous fireworks shape arrange type (CPA) display panel, rotational symmetry is arranged micro unit type (ASM) display panel, optical compensation curved arrange type (OCB) display panel, super horizontal switch type (S-IPS) display panel, advanced super horizontal switch type (AS-IPS) display panel, extreme edge electric field switch type (UFFS) display panel, stabilizing polymer alignment-type display panel, double vision angle type (dual-view) display panel, three visual angle type (triple-view) display panels, 3 d display (three-dimensional), multiaspect display panel (multi-panel), or other profile plate.If display medium 330 is the electroluminescence material, 300 of display panels are called electric exciting light emitting display panel (as: phosphorescence electric exciting light emitting display panel, fluorescence electric exciting light emitting display panel or above-mentioned combination), also be called light-emitting display panel, and its electroluminescence material can be organic material, organic material, inorganic material or above-mentioned combination, moreover the molecular size of above-mentioned material comprises micromolecule, macromolecule or above-mentioned combination.If display medium 330 comprises liquid crystal material and electroluminescence material simultaneously, then display panel 300 is called hybrid (hybrid) display panel or half self-luminescent display panel.
Fig. 4 is the synoptic diagram of a kind of electrooptical device of one embodiment of the invention.Please refer to Fig. 4, the display panel 300 described by the foregoing description can be combined into an electrooptical device 400 with electronic component 410 electrical connections, and the manufacture method of electrooptical device 400, the manufacture method that comprises aforesaid display panel 300, again according to the manufacturing course of various electrooptical devices 400 and assemble the gained display, to obtain electrooptical device 400.Because, in the present embodiment, display panel 300 is to adopt above-mentioned dot structure 100 (please refer to Fig. 1 L) or dot structure 200 (please refer to Fig. 2 N) as image element array substrates 310 (please refer to Fig. 3), therefore adopt the electrooptical device 400 of above-mentioned dot structure 100 or dot structure 200 to increase the productive rate, also can reduce production costs simultaneously except reducing the process time.
In addition, electronic component 410 comprises as control element, executive component, treatment element, input element, memory cell, driving element, light-emitting component, protecting component, sensing element, detecting element or other function element or aforesaid combination.And the type of electrooptical device 400 comprises the panel in portable product (as mobile phone, video camera, camera, notebook computer, game machine, wrist-watch, music player, electronic mail transceiver, map navigator, digital photo or similar products like), video and audio product (as audio and video player or similar products like), screen, TV, billboard, the projector etc.
Though the present invention discloses as above with embodiment; right its is not in order to limit the present invention; the technician who has common knowledge in the technical field under any; without departing from the spirit and scope of the present invention; when can doing a little change and retouching, so protection scope of the present invention defines and is as the criterion when looking appended claim scope.
Claims (8)
1. an one pixel structure process method is characterized in that, described method comprises:
One substrate is provided, has been formed with an on-off element and a holding capacitor on the described substrate;
On described substrate, form a protective seam, cover described on-off element and described holding capacitor;
On described protective seam, form a patterned organic material layer, wherein be formed with a plurality of raised designs on the described patterned organic material layer of part and described patterned organic material layer has a plurality of first openings, it exposes the described protective seam of the top electrode top of the described protective seam that is positioned at described source/drain top and described holding capacitor respectively;
Forming a reflection horizon on the described patterned organic material layer and on the described protective seam of the part that is exposed out;
Form one first patterning photoresist layer on the described reflection horizon of part, and the described first patterning photoresist layer has a plurality of second openings, exposing the described reflection horizon of part, and each second opening is in fact corresponding to each first opening;
With the described first patterning photoresist layer as the etching photomask, removing the described reflection horizon of the part that is exposed out and to be positioned at the described protective seam of part under the described reflection horizon of the part that is exposed out, and form first contact hole and that exposes the source/drain of described on-off element expose described holding capacitor top electrode second contact hole and;
Remove the described first patterning photoresist layer; And
On described patterned organic material layer, form a pixel electrode, and described pixel electrode is electrically connected with the source/drain of described on-off element by described first contact hole and described second contact hole is electrically connected with the top electrode of described holding capacitor.
2. one pixel structure process method as claimed in claim 1 is characterized in that, removing the described reflection horizon that is exposed out and being positioned at the beneath described protective seam in the described reflection horizon of the part that is exposed out is to adopt the original position program.
3. one pixel structure process method as claimed in claim 1 is characterized in that, described patterned organic material layer use-gray level mask is carried out an exposure program to an organic material layer.
4. one pixel structure process method as claimed in claim 1 is characterized in that, the method that forms described on-off element and described holding capacitor comprises:
Form a first metal layer on described substrate, it comprises a grid and a bottom electrode;
On described the first metal layer, form an insulation course;
On the described insulation course above the described grid, form an active layers; And
Form one second metal level on described insulation course, it comprises described source electrode and described drain electrode that is positioned at the described active layers of part top and the described top electrode that is positioned at described bottom electrode top.
5. one pixel structure process method as claimed in claim 1 is characterized in that, the method that forms described on-off element and described holding capacitor comprises:
Form a first metal layer on described substrate, it comprises a grid and a bottom electrode;
On described the first metal layer, form an insulation course, semi-conductor layer and one second metal level in regular turn;
On described second metal level, form one second patterning photoresist layer, it has a first and a second portion, described first covers described grid top, and described second portion covers second metal level of top, described grid both sides and second metal level of described bottom electrode top;
With the described second patterning photoresist layer is photomask, with described second metal level of patterning and described semiconductor layer, to define an active layers in described grid top and to define described top electrode in described bottom electrode top;
The described second patterning photoresist layer is carried out an ashing program, to remove described first;
Described second portion with the described second patterning photoresist layer is a photomask, to remove described second metal level of described active layers top, to define described source electrode and described drain electrode.
6. one pixel structure process method as claimed in claim 5 is characterized in that, the described second patterning photoresist layer is with a gray level mask one photoresist layer to be carried out an exposure program to be formed.
7. the manufacture method of a display panel is characterized in that, described method comprises as claim 1 a described one pixel structure process method.
8. the manufacture method of an electrooptical device is characterized in that, described method comprises the manufacture method as claim 7 a described display panel.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2008101696999A CN101382715A (en) | 2008-10-20 | 2008-10-20 | Method for manufacturing pixel structure, display panel and optoelectronic device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2008101696999A CN101382715A (en) | 2008-10-20 | 2008-10-20 | Method for manufacturing pixel structure, display panel and optoelectronic device |
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| CN101382715A true CN101382715A (en) | 2009-03-11 |
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| CNA2008101696999A Pending CN101382715A (en) | 2008-10-20 | 2008-10-20 | Method for manufacturing pixel structure, display panel and optoelectronic device |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102419931A (en) * | 2011-11-18 | 2012-04-18 | 友达光电股份有限公司 | Display panel |
| CN103676467A (en) * | 2012-09-20 | 2014-03-26 | 李永春 | Metal-embedded mask and method for manufacturing the same |
| CN104952882A (en) * | 2015-03-26 | 2015-09-30 | 友达光电股份有限公司 | Active element array substrate |
| CN111627933A (en) * | 2019-12-10 | 2020-09-04 | 友达光电股份有限公司 | Active element substrate and manufacturing method thereof |
| WO2022134029A1 (en) * | 2020-12-25 | 2022-06-30 | 京东方科技集团股份有限公司 | Display panel, method for manufacturing display panel, and display device |
-
2008
- 2008-10-20 CN CNA2008101696999A patent/CN101382715A/en active Pending
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102419931A (en) * | 2011-11-18 | 2012-04-18 | 友达光电股份有限公司 | Display panel |
| CN102419931B (en) * | 2011-11-18 | 2013-09-04 | 友达光电股份有限公司 | Display panel |
| CN103676467A (en) * | 2012-09-20 | 2014-03-26 | 李永春 | Metal-embedded mask and method for manufacturing the same |
| CN103676467B (en) * | 2012-09-20 | 2019-05-21 | 李永春 | Metal-embedded mask and method for manufacturing the same |
| CN104952882A (en) * | 2015-03-26 | 2015-09-30 | 友达光电股份有限公司 | Active element array substrate |
| CN104952882B (en) * | 2015-03-26 | 2018-02-09 | 友达光电股份有限公司 | Active element array substrate |
| CN111627933A (en) * | 2019-12-10 | 2020-09-04 | 友达光电股份有限公司 | Active element substrate and manufacturing method thereof |
| CN111627933B (en) * | 2019-12-10 | 2023-04-18 | 友达光电股份有限公司 | Active element substrate and manufacturing method thereof |
| WO2022134029A1 (en) * | 2020-12-25 | 2022-06-30 | 京东方科技集团股份有限公司 | Display panel, method for manufacturing display panel, and display device |
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