CN101211040B - Display components pixel structure and its drive method - Google Patents
Display components pixel structure and its drive method Download PDFInfo
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- CN101211040B CN101211040B CN2006101721239A CN200610172123A CN101211040B CN 101211040 B CN101211040 B CN 101211040B CN 2006101721239 A CN2006101721239 A CN 2006101721239A CN 200610172123 A CN200610172123 A CN 200610172123A CN 101211040 B CN101211040 B CN 101211040B
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Abstract
The invention relates to a pixel structure of a display component and a drive method thereof. The pixel structure comprises a pixel capacitor, a switch, a pre-writing unit and a reset unit; wherein the pre-writing unit is coupled with the switch, so as to pre-write display data to the pre-writing unit when the switch is switched on; the reset unit is coupled between the pre-writing unit and the pixel capacitor, so as to reset the pixel capacitor. When the pixel capacitor is reset, the display data is firstly pre-written to the pre-writing unit; and when the pixel capacitor has been reset and is ready to display the display data, the display data is written to the pixel capacitor.
Description
Technical field
The present invention relates to a kind of dot structure and driving method thereof of display module.
Background technology
Arriving along with digital Age, flat-panel screens market is flourish down, drive the rapid growth of demand of active flat liquid crystal display, bring people as many application appearance like the mushrooms after rain such as domestic TV, portable type information products, mobile computer, digital cameras and live more easily.Therefore the manufacturing technology of many novelties and the correlative study of thin film transistor (TFT) get most of the attention.Research aspect amorphous silicon mainly is conceived to the demand trend of high resolving power high image quality LCD TV panel large tracts of landization, the characteristic of amorphous silicon film transistor also is required to promote day by day, the influence that the RC that produces except itself lead and stray capacitance postpones, the processing procedure cost of reduction integral panels also will be another development trend.
In addition, by the technology of color separation sequence (color sequential), for example United States Patent (USP) the 6th, 392, can effectively reduce the processing procedure cost of panel back segment No. 620, and the color saturation that promotes panel.Therefore, the introducing of new model backlight module also will be for the color saturation of whole LCD TV panel, economize and can, and reduce on the cost of manufacture significant lifting is arranged.
Yet the display mode of this novel backlight technology is to utilize single pixel to show that three primary colors reach the display effect of panel in the mode of time integral.For the demonstration demand in response to this technology, thin-film transistor component will shorten to 1/3rd original (being about 3-4 μ sec) for the duration of charging of pixel capacitance.Therefore, for introduction in response to large scale large tracts of landization and novel backlight technology (color sequential), also will shorten in the requirement in pixel duration of charging, how in the shorter time correct signal to be write pixel capacitance is one of present institute urgent problem.
Summary of the invention
Because the problems referred to above, the present invention proposes a kind of dot structure, and proposes the panel driving method of a kind of zone-transfer (area transfer) based on aforementioned dot structure, in the hope of can in the shorter time correct signal being write pixel capacitance.
Therefore,, propose a kind of dot structure, be applicable to that the color separation sequence drives according to embodiment of the present invention.Aforementioned dot structure comprise pixel capacitance, switch,
A pre-writing unit and a reset cell.Pre-writing unit is coupled to switch, in order to when the switch conduction, video data is write pre-writing unit in advance.Reset cell is coupled between pre-writing unit and the pixel capacitance, in order to the replacement pixel capacitance.When pixel capacitance is reset, earlier video data is write pre-writing unit in advance; When pixel capacitance is reset back and preparation demonstration video data, video data is write pixel capacitance.
According to one embodiment of the invention, switch can be the first transistor, and it has grid, source electrode and drain electrode, and wherein, grid is connected to sweep trace, and source electrode is connected to data line.Pre-writing unit can more comprise first memory capacitance and transistor seconds.One end of first memory capacitance is connected with the drain electrode of the first transistor, and the other end connects predetermined voltage.Transistor seconds has grid, source electrode and drain electrode, and wherein, grid receives the pixel setting signal, and source electrode is connected with the drain electrode of the first transistor.Reset cell can more comprise second memory capacitance and the 3rd transistor.
One end of second memory capacitance is connected to the drain electrode of transistor seconds, and the other end is connected to predetermined voltage.The 3rd (replacement) transistor has grid, source electrode and drain electrode, and wherein, grid receives the pixel reset signal, and source electrode is connected to the drain electrode of transistor seconds.
In addition, above-mentioned dot structure more can be revised as and be applicable to that electric capacity is positioned at the structure on the grid.At this moment, the other end of two memory capacitance is to be connected to a sweep trace.
In addition, the present invention more proposes a kind of displaying panel driving method, and aforementioned panel is made of a plurality of pixel, and these pixels lay respectively at the infall of multi-strip scanning line and many data lines.Above-mentioned displaying panel driving method comprises: a) set aforementioned panel, make the viewing area of aforementioned panel comprise at least first viewing area and second viewing area or more than; B) these pixels in replacement first viewing area, and drive these pixels that show in second viewing area; C) when resetting these pixels of first viewing area, more view data is write first viewing area; D) these pixels of second viewing area of resetting, and drive these pixels of first viewing area, with display image data; And e) when resetting these pixels of second viewing area, more view data is write second viewing area, and get back to step b).
According to embodiments of the present invention, the division of aforementioned panel viewing area can be according to sweep trace, data line or both.First and/or the second above-mentioned viewing area is divided into a plurality of viewing areas more respectively.In addition, each viewing area of first and second viewing areas can be adjacent arrangement, or makes each viewing area in first viewing area and each viewing area in second viewing area for being staggered.
For above and other objects of the present invention, feature and advantage can be become apparent, preferred embodiment cited below particularly, and conjunction with figs. are described in detail below.
Description of drawings
Fig. 1 shows the sequential synoptic diagram of color separation sequence type of drive.
Fig. 2 A be according to the embodiment of the invention shown the synoptic diagram of dot structure, it corresponds to electric capacity and is positioned at structure on the common electrode.
Fig. 2 B shows the variation example of the dot structure of Fig. 2 A.
Fig. 3 A be according to the embodiment of the invention shown the synoptic diagram of another dot structure, it corresponds to electric capacity and is positioned at structure on the grid.
Fig. 3 B shows the variation example of the dot structure of Fig. 3 A.
Fig. 4 A and 4B be according to the embodiment of the invention shown the synoptic diagram of another kind of dot structure, it corresponds to electric capacity and is positioned on the common electrode with electric capacity and is positioned at mixed structure on the grid.
Fig. 5 be according to the embodiment of the invention shown type of drive flow process signal topic.
Fig. 6 A-6H according to present embodiment shown several divide the example of panel zones.
Fig. 7 shows the panel driving mode of one embodiment of the invention.
Fig. 8 shows the panel driving mode of another embodiment of the present invention.
Fig. 9 shows the panel driving mode of another embodiment of the present invention.
Figure 10 A-10C shows the panel driving mode of another embodiment of the present invention.
The reference numeral explanation
M1, M2, M3: transistor
C
S1, C
S2: memory capacitance
C
LC: pixel capacitance
Embodiment
Fig. 1 shows the sequential synoptic diagram of color separation sequence type of drive.This kind type of drive is not used color filter, but replaces with blue (B) three kinds of light sources with red (R), green (G).To do explanation with the RGB look in the embodiment of the invention, if use other color system, also can do the correction of appropriateness certainly.Fig. 1 acceptance of the bid is shown with the expression light output cycle of RGB, and other then is data write cycles.The light output cycle also is about to the cycle that view data demonstrates.As shown in Figure 1, before the light output cycle of data R, data can write earlier in the memory capacitance in the dot structure, wait until and finish write cycle, that is data with form of electrical charges to the memory capacitance charging after, next be exactly to make pixel begin to present view data.In output data R, corresponding green data G also begins to write pixel.By the time after the data R output, data G just can then export.In like manner, in output data G, corresponding blue data B also begins to write pixel.By the time after the data G output, data B just can then export.So just, can reach in color separation sequence mode and drive the panel pixels demonstration.
The present invention except framework the color separation sequence drives, more focus on the subregion that solves image retention and panel and drive (zone is transferred).At first structure and the mode of operation thereof with single pixel illustrates, the following examples then can further illustrate the type of drive of the liquid crystal panel with this kind pixel.According to the structure of electric capacity, the present invention can be applied to electric capacity and be positioned at (C on the common electrode
SOn common) is positioned at (CSon gate) two kinds of structures on the grid with electric capacity.Fig. 2 A be according to the embodiment of the invention shown the synoptic diagram of dot structure, it corresponds to electric capacity and is positioned at structure on the common electrode.
The dot structure of present embodiment can comprise pixel capacitance, switch, pre-writing unit and reset cell.Below at this basic structure propose several can the embodiment circuit example.Shown in Fig. 2 A, dot structure can be by the first transistor M1 (switch), as the first memory capacitance C of pre-writing unit
S1With transistor seconds M2, as the second memory capacitance C of reset cell
S2With reset transistor M3 and pixel (liquid crystal) capacitor C
LCConstitute, following examples are all distinguished in an identical manner.Above-mentioned transistor M1, M2 and M3 can be thin film transistor (TFT)s.In addition, this embodiment be liquid crystal capacitance with LCD as illustrative examples, still,, all can be suitable for method of the present invention so long as can adopt the display module of color separation sequence type of drive.Therefore, just not special qualification pixel capacitance is a liquid crystal capacitance.The grid of the first transistor M1 is connected to sweep trace (is example with the N bar), and source electrode is connected to data line.The first memory capacitance C
S1An end be connected with the drain electrode of the first transistor M1, and the other end is received predetermined voltage (for example ground connection or common electrode voltage).The source electrode of transistor seconds M2 is connected to the drain electrode of the first transistor M1, and grid is the setting end of liquid crystal pixel.The second memory capacitance C
S2An end be connected with the drain electrode of transistor seconds M1, and the other end is received aforementioned predetermined voltage.The grid of reset transistor M3 can receive control signal, in order to replacement liquid crystal capacitance C
LCInterior stored charge, source electrode is connected with the drain electrode of transistor seconds M2, and aforementioned predetermined voltage is then received in drain electrode.In addition, the drain electrode of reset transistor M3 also not necessarily will be received above-mentioned predetermined voltage, for example can receive high-frequency pulse signal (with reference to embodiment described later).
Follow the type of drive of key diagram 2A dot structure, and above-mentioned predetermined voltage is example with the ground voltage.Before driving this pixel, earlier previous charge discharge is fallen, perhaps with LCD, can be with pixel capacitance charges to common (centre) voltage Vcom.At this moment, the liquid crystal reset signal can be applied to the grid of reset transistor M3 earlier, and this liquid crystal reset signal for example is a pulse signal.At this moment, transistor M1 and M2 are closed condition.Be applied to when the liquid crystal reset signal on the grid of reset transistor M3, reset transistor M3 conducting, cause pixel capacitance C because transistor M1, M2 close and the drain electrode of transistor M3 ground connection then this moment
LCTwo end electrodes is ground connection, so can make pixel capacitance C
LCFully discharge, the previous stored charge of draining.
Then, scanning-line signal is applied on the grid of transistor M1, makes transistor M1 conducting.At this moment, the view data of coming from data line just can be to the first memory capacitance C
S1Charge, after charging finished, transistor M1 closed.Then, the liquid crystal setting signal is applied on the grid of transistor M2, makes transistor M2 conducting.At this moment, reset transistor M3 is a closed condition, so the first memory capacitance C
S1Stored charge just can be passed through transistor M2, to the second memory capacitance C
S2Charge, and make liquid crystal capacitance C
LCAlso reach the identical quantity of electric charge, shown this pixel.
The dot structure that Fig. 2 B shows is the variation example of Fig. 2 A.The discrepancy of Fig. 2 B and Fig. 2 A is pixel capacitance C
LCOriginally an end of ground connection changes to and is connected to transparency electrode voltage Vito.In addition, remaining structure is all identical, and the type of drive of pixel is identical with Fig. 2 A also, this just few superfluous stating.
Fig. 3 A be according to the embodiment of the invention shown the synoptic diagram of another kind of dot structure, it corresponds to electric capacity and is positioned at structure on the grid.The difference of Fig. 3 A and Fig. 2 A is two memory capacitance C
S1, C
S2Originally earth terminal changes with last sweep trace and is connected.In addition, reset transistor M3 is the drain electrode of ground connection originally, becomes with last sweep trace grid to be connected.
The first memory capacitance C
S1Value Q (electric charge) decide according to the low voltage level of a last sweep trace N-1.Before opening N bar sweep trace, the voltage of N-1 bar sweep trace can change.When the first transistor M1 conducting, the first memory capacitance C
S1Set (charging) behind needed voltage, promptly charge to the data voltage Vdata that will write after, the voltage level of N-1 bar sweep trace is just in variation.All scan up to all sweep traces and to finish, the voltage of N-1 bar sweep trace is set to common voltage Vcom.Then, with reset transistor M3 conducting, be set to common voltage Vcom because of previous voltage with N-1 bar sweep trace this moment, so node Vpp is set at common voltage Vcom.Therefore, two electrode tips of pixel capacitance CLC are common voltage Vcom, just can discharge fully, and the view data of previous frame is removed.Afterwards, the voltage with N-1 bar sweep trace is set to the primary voltage value.Then, the liquid crystal setting signal is applied on the transistor seconds, with transistor seconds M2 conducting, this moment, reset transistor M3 was a closed condition.Therefore, before be written to the first memory capacitance C
S1Viewdata signal (electric charge) just can be to the second memory capacitance C
S2With liquid crystal capacitance charging C
LC, use this pixel of driving and carry out video picture.
Fig. 3 B is the variation example of Fig. 3 A, and wherein, the drain electrode of reset transistor M3 is the grid that is connected to transistor seconds M.In Fig. 3 B, when conducting reset transistor M3, with liquid crystal capacitance C
LCReset, will determine that transistor M2 is a closed condition this moment.Afterwards, M3 closes with reset transistor, improves voltage V again
CTMake transistor seconds M2 conducting, to carry out that electric charge is transferred to the second memory capacitance C
S2With liquid crystal capacitance C
LCCharging is used this pixel of driving and is carried out video picture.
Fig. 4 A and 4B be according to the embodiment of the invention shown the synoptic diagram of another kind of dot structure, it corresponds to electric capacity and is positioned on the common electrode with electric capacity and is positioned at mixed structure on the grid.The discrepancy of Fig. 4 A, 4B and Fig. 2 A, 2B is the connected mode of memory capacitance.In addition, in Fig. 4 A, the first memory capacitance C
S1Originally earth terminal changes with last sweep trace and is connected the second memory capacitance C
S2Connected mode then keep identical.In Fig. 4 B, the second memory capacitance C
S2Originally earth terminal changes with last sweep trace and is connected the first memory capacitance C
S1Connected mode then keep identical.The type of drive of Fig. 4 A and 4B is substantially similar to the type of drive of Fig. 2 A, and the sequential chart among the cooperation figure just is appreciated that so seldom do superfluous stating at this.
The notion of type of drive of the present invention is the mode of the driving of zone-transfer (area transfer), and it can be divided into panel two groups, and elder generation drives another group after driving one group again after finishing.Under this notion, can comply with different embodiments, panel is divided into several parts.To enumerate various examples below and do explanation.
Fig. 5 be according to the embodiment of the invention shown wherein a kind of schematic flow sheet of type of drive.The viewing area of panel is made of a plurality of pixel, and these pixels lay respectively at the infall of multi-strip scanning line and many data lines.The structure of each pixel all can be any structure of Fig. 2 A to Fig. 4 or other.Below with Fig. 2 A as the example that cooperates explanation.At first, at step S100, when the type of drive of design panel, to confirm panel will be divided into how many zones earlier.Present embodiment the viewing area of panel can be divided at least comprise at least first viewing area and second viewing area or more than.This first and second dividing region is to carry out according to sweep trace, data line or both.Detailed partition mode and example can illustrate hereinafter.
Then, at step S102, these pixels in first viewing area of resetting, and drive these pixels that show in second viewing area.Here be when carrying out the demonstration of second area, the pixel capacitance in all dot structures in first viewing area can be reset that also the electric charge that is about in the pixel capacitance discharges, its image that can not remain in next frame is shown.With the structure of Fig. 2 A, be with reset transistor M3, make pixel capacitance C
LCDischarge.
At step S104, after all pixels of first viewing area were reset, view data just can write first viewing area.With the structure of Fig. 2 A, be with the transistor M1 of view data, to the first memory capacitance C by conducting
S1Charge, it is had voltage level that should view data.
At step S106, the view data of second area shows when finishing, promptly the pixel capacitance of these pixels is reset.Corresponding is to write the first memory capacitance C of first area
S1View data (voltage) just be able to pixel capacitance is charged and display image data.With the structure of Fig. 2 A, be to make transistor M2 conducting and close reset transistor M3, make the first memory capacitance C
S1Voltage to pixel capacitance C
LCCharge.
At step S108, just after the pixel of pixel that shows the first area and replacement second area, view data just can continue to write first memory capacitance of each dot structure of corresponding second area.Step S110 judges whether to continue to have the view data input, if there is then above-mentioned step S102 to S108 will continue to drive panel, with display image.
Therefore,, just can utilize the mode of zone-transfer, drive whole display panel by above-mentioned method.Be divided into two when above when at step S100 the viewing area of face being drawn, the correction that an outline is done on the sequential just can reach.
In addition, the action of first area and second area is overlapped (resetting and display action), as long as two zones are different steps.In addition, when resetting with zone-transfer, all pixels on the whole front panel can be reset to these pixels.Afterwards, in foundation selection area transfer sequence, respectively view data is shown in each these viewing area.By this, can reduce immediate current, to reach purpose of power saving.
Fig. 6 A-6H according to present embodiment shown several divide the example of panel zones.The example of Fig. 6 A is that whole front panel is divided into two regional P1, P2 according to sweep trace, and wherein regional P1 is contained all pixels of sweep trace 1 to N, and regional P2 is contained all pixels of sweep trace N+1 to M.The example of Fig. 6 B also is to be divided into four zones according to sweep trace, but regional P1, P2 divide into two districts and discontinuous each other again respectively.Zone P1 is contained sweep trace 1 all pixels to P and N+1 to Q, and regional P2 is contained all pixels of sweep trace P+1 to N and Q+1 to M.The example of Fig. 6 C also is to be divided into three zones according to sweep trace, and two regional P1 and a regional P2 are wherein arranged, and regional P1 is contained sweep trace 1 all pixels to P and N+1 to M, and regional P2 is contained all pixels of sweep trace P+1 to N.Above-mentioned area dividing is several case illustrated, can do suitable adjustment according to actual demand when reality is implemented.
Fig. 6 D, 6E and 6F then show other panel zone and divide example.In these a little examples, the foundation of area dividing is a data line.Fig. 6 D is divided into two regional P1, P2 with whole front panel according to data line, and wherein, regional P1 is contained all pixels of data line 1 to R, and regional P2 is contained all pixels of data line R+1 to Y.Fig. 6 E is divided into four zones with panel, and wherein, regional P1 is contained data line 1 all pixels to R and Q+1 to P, and regional P2 is contained all pixels of data R+1 to Q and P+1 to Y.Fig. 6 F is divided into three regional P1, P2 with panel, and wherein regional P1 is contained data line 1 all pixels to R and Q+1 to Y, and regional P2 is contained all pixels of data line R+1 to Q.Above-mentioned area dividing is several case illustrated, can do suitable adjustment according to actual demand when reality is implemented.
Fig. 6 G and 6H then show other panel zone and divide example, and this routine area dividing is to carry out according to sweep trace and data line simultaneously.Fig. 6 G is divided into each two of regional P1, P2 with panel, wherein regional P1 is contained all pixels in the zone of the zone of data line 1 to P and sweep trace 1 to N and data line P+1 to Y and sweep trace N+1 to M, and regional P2 is contained all pixels in the zone of the zone of data line 1 to P and sweep trace N+1 to M and data line P+1 to Y and sweep trace 1 to N.Fig. 6 H is divided into panel in four zones such as regional P1, P2, P3 and P4, wherein regional P1 is contained all pixels of data line 1 to P and sweep trace 1 to N, zone P2 is contained all pixels of data line P+1 to Y and sweep trace 1 to N, zone P3 is contained all pixels of data line 1 to P and sweep trace N+1 to M, and regional P4 is contained all pixels of data line P+1 to Y and sweep trace N+1 to M.Above-mentioned area dividing is several case illustrated, can be when reality is implemented according to actual demand, and the kind in the number of area dividing and zone or the like all can be done suitable adjustment.
When driving panel, when for example all pixels drive with display image in to regional P2, all pixels of regional P1 are reset and begun to carry out writing of data.Drive in the pixel that finishes regional P2, the pixel of regional P2 is reset (to pixel capacitance), just can drive the pixel of regional P1 this moment.The detailed driving sequential of each pixel can be with reference to the explanation of top Fig. 2 A to Fig. 4.
Fig. 7 shows the panel driving mode of one embodiment of the invention.Example shown in Figure 7 is that the pixel with whole front panel is divided into two regional P1, P2, and corresponds to the area dividing mode of Fig. 6 A.Dot structure shown in Figure 7 only shows one of them pixel of whole regional P1 or P2.For example, in the pixel (last figure) of corresponding region P1, when replacement pixel or setting pixel, sweep trace refers to the 1st to N bar (all pixels among the regional P1 of Fig. 6 A); In the pixel of corresponding region P2 (middle figure), when replacement pixel or setting pixel, sweep trace refers to N+1 bar to the M bar (all pixels among the regional P2 of Fig. 6 A).The sequential chart that drives can be with reference to figure below, and the mode that drives can be with reference to the explanation of figure 2A.Therefore, in the embodiment of Fig. 7, be whole front panel to be drawn be divided into two adjacent areas.When viewing area P2 shows, just can be to the pixel capacitance of the regional P1 that resets, and data are write earlier in first memory capacitance of regional P1.
Among this external Fig. 7, the first half of sequential chart is the sequential chart that the explanation sweep trace is opened in regular turn, and Lower Half is the timing diagram that pixel is reset and set.That is not necessarily there is the relation of sequential successively top and the bottom.Reset and the timing diagram of setting with pixel, just carry out the action that pixel is set after pixel is reset, just carry out zone-transfer.But, the time point that pixel is reset and may not be certain will be before sweep trace M opens, it also is feasible carrying out just after sweep trace M opens that pixel resets.In like manner, the expression mode of each figure below also is identical.In addition, about the setting in P2 zone, do not have to be right after after finish in the P1 zone.In carry out in the P1 zone, just can begin transfer action is carried out in the P2 zone.
Fig. 8 shows the panel driving mode of another embodiment of the present invention, and shown example is that the pixel with whole front panel is divided into two regional P1, P2, and corresponds to the area dividing mode of Fig. 6 B.Mode and Fig. 7 of driving are similar, just seldom do superfluous stating at this.In this example, regional P1 and P2 arrange in mode separately to form.Fig. 9 shows the panel driving mode of another embodiment of the present invention, and shown example is that the pixel with whole front panel is divided into four regional P1, P2, P3 and P4, and corresponds to the area dividing mode of Fig. 6 H.According to the example of prior figures 6A to 6G, cooperate suitable sequential and aforementioned pixel type of drive just can reach the panel driving mode of zone-transfer mode of the present invention.In addition, Fig. 7 to shown in Figure 8 be to be positioned on the common electrode structure as example with electric capacity.Each dot structure is changed to any structure of above-mentioned Fig. 2 B to Fig. 4 and cooperates corresponding driving sequential, also is feasible.
Figure 10 A-10C shows the panel driving mode of another embodiment of the present invention.Figure 10 A-10C is a kind of variation example of the various embodiments described above basically, and the type of drive aspect zone-transfer is identical, just omits at this not illustrate, different part only is described.
Shown in Figure 10 A, present embodiment focus on when the grid that reset signal is applied to reset transistor M3 so that pixel is reset, apply the drain electrode that a high-frequency signal is given reset transistor M3 simultaneously.This high-frequency signal is the signal of frequency 10kHz-50kHz for example.When applying this high-frequency signal, can produce effect to the liquid crystal molecule heating, the rotational speed of liquid crystal molecule is accelerated, and then the reaction velocity of liquid crystal molecule is accelerated.In addition, this high-frequency signal and to may not be certain must be a fixing frequency.High-frequency signal can carry out suitable feedback action according to ambient temperature, in time changes operating frequency.In addition, the number of the pulse of high-frequency signal (pulse) also can change according to the temperature feedback of display medium.For example, temperature is 50kHz in the time of 0 ℃, reduces to 20kHz in the time of 25 ℃, does not then add this high-frequency signal in the time of 50 ℃.In other words, when the display medium temperature is low, can heightens frequency or increase umber of pulse, the reaction velocity of liquid crystal molecule is accelerated.
In addition, shown in Figure 10 B, this high-frequency signal also can be applied to the end of liquid crystal capacitance CLC, equally can reach identical effect.In the structure shown in Figure 10 C, when pixel is reset, high-frequency signal is applied to the drain electrode of reset transistor M3 and the end of liquid crystal capacitance CLC simultaneously in addition.So, can provide bigger pressure reduction, make the reaction of liquid crystal molecule become faster to the liquid crystal molecule.Outside inferior, when applying high-frequency signal to reset transistor M3 and liquid crystal capacitance CLC at the same time, both phase places must be for anti-phase, to strengthen pressure reduction.
Though the present invention discloses as above with preferred embodiment; right its is not in order to limit the present invention; have in the technical field under any and know the knowledgeable usually; without departing from the spirit and scope of the present invention; when can doing a little change and retouching, so protection scope of the present invention is as the criterion when looking appended the claim person of defining.
Claims (37)
1. a dot structure is applicable to that the color separation sequence drives, and aforementioned dot structure comprises:
Pixel capacitance;
The first transistor has grid, source electrode and drain electrode, and wherein, aforementioned grid is connected to sweep trace, and aforementioned source electrode is connected to data line;
Pre-writing unit is coupled to aforementioned the first transistor, in order to when the aforementioned the first transistor conducting, video data is write aforementioned pre-writing unit in advance; And
Reset cell is coupled between aforementioned pre-writing unit and the aforementioned pixel capacitance, in order to the aforementioned pixel capacitance of resetting,
Wherein, when aforementioned pixel capacitance is reset, earlier aforementioned video data is write aforementioned pre-writing unit in advance, when reset back and when preparing to show aforementioned video data of aforementioned pixel capacitance, with the aforementioned pixel capacitance of aforementioned video data asynchronous write,
Wherein, aforementioned pre-writing unit comprises:
First memory capacitance, an end is connected with the aforementioned drain electrode of aforementioned the first transistor, and the other end connects predetermined voltage; And
Transistor seconds has grid, source electrode and drain electrode, and wherein, aforementioned grid receives the pixel setting signal, and aforementioned source electrode is connected with the aforementioned drain electrode of aforementioned the first transistor,
Wherein, aforementioned reset cell comprises: second memory capacitance, an end are connected to the aforementioned drain electrode of aforementioned transistor seconds and an end of aforementioned pixel capacitance, and the other end is connected to aforementioned predetermined voltage; And
The 3rd transistor has grid, source electrode and drain electrode, and wherein, aforementioned grid receives the pixel reset signal, and aforementioned source electrode is connected to the aforementioned drain electrode of aforementioned transistor seconds.
2. dot structure as claimed in claim 1, wherein, aforementioned first, aforementioned second with aforementioned the 3rd transistor be thin film transistor (TFT).
3. dot structure as claimed in claim 1, wherein, aforementioned predetermined voltage is ground voltage or common electrode voltage.
4. dot structure as claimed in claim 1, wherein, the aforementioned the 3rd transistorized aforementioned drain electrode is connected to aforementioned predetermined voltage.
5. dot structure as claimed in claim 1, wherein, the aforementioned the 3rd transistorized aforementioned drain electrode is connected to high-frequency signal.
6. dot structure as claimed in claim 1, wherein, the other end of aforementioned pixel capacitance is connected to high-frequency signal.
7. dot structure as claimed in claim 1, wherein, the other end of the aforementioned the 3rd transistorized aforementioned drain electrode and aforementioned pixel capacitance is connected to high-frequency signal.
8. dot structure as claimed in claim 1, wherein, the other end of aforementioned pixel capacitance is connected to predetermined voltage or transparency electrode voltage.
9. dot structure as claimed in claim 8, wherein, aforementioned predetermined voltage is ground voltage or common electrode voltage.
10. dot structure as claimed in claim 1, wherein, aforementioned pixel capacitance is a liquid crystal capacitance.
11. a dot structure is applicable to that the color separation sequence drives, aforementioned dot structure comprises:
Pixel capacitance;
The first transistor has grid, source electrode and drain electrode, and wherein, aforementioned grid is connected to sweep trace, and aforementioned source electrode is connected to data line;
Pre-writing unit is coupled to aforementioned the first transistor, in order to when the aforementioned the first transistor conducting, video data is write aforementioned pre-writing unit in advance; And
Reset cell is coupled between aforementioned pre-writing unit and the aforementioned pixel capacitance, in order to the aforementioned pixel capacitance of resetting,
Wherein, when aforementioned pixel capacitance is reset, earlier aforementioned video data is write aforementioned pre-writing unit in advance, when reset back and when preparing to show aforementioned video data of aforementioned pixel capacitance, with the aforementioned pixel capacitance of aforementioned video data asynchronous write,
Wherein aforementioned pre-writing unit comprises:
First memory capacitance, an end is connected with the aforementioned drain electrode of aforementioned the first transistor, and the other end is connected to last sweep trace;
Transistor seconds has grid, source electrode and drain electrode, and wherein, aforementioned grid receives the pixel setting signal, and aforementioned source electrode is connected with the aforementioned drain electrode of aforementioned the first transistor;
Wherein aforementioned reset cell comprises:
Second memory capacitance, an end are connected to the aforementioned drain electrode of aforementioned transistor seconds and an end of aforementioned pixel capacitance, and the other end is connected to aforementioned last sweep trace;
The 3rd transistor has grid, source electrode and drain electrode, and wherein, aforementioned grid receives the pixel reset signal, and aforementioned source electrode is connected to the aforementioned drain electrode of aforementioned transistor seconds, and aforementioned drain electrode is connected to the aforementioned grid or aforementioned last the sweep trace of aforementioned transistor seconds.
12. dot structure as claimed in claim 11, wherein, aforementioned first, aforementioned second with aforementioned the 3rd transistor be thin film transistor (TFT).
13. dot structure as claimed in claim 11, wherein, the other end of aforementioned pixel capacitance is connected to high-frequency signal.
14. dot structure as claimed in claim 11, wherein, the other end of aforementioned pixel capacitance is connected to predetermined voltage or transparency electrode voltage.
15. dot structure as claimed in claim 14, wherein, aforementioned predetermined voltage is ground voltage or common electrode voltage.
16. dot structure as claimed in claim 11, wherein, aforementioned pixel capacitance is a liquid crystal capacitance.
17. a dot structure is applicable to that the color separation sequence drives, aforementioned dot structure comprises:
Pixel capacitance;
The first transistor has grid, source electrode and drain electrode, and wherein, aforementioned grid is connected to sweep trace, and aforementioned source electrode is connected to data line;
Pre-writing unit is coupled to aforementioned the first transistor, in order to when the aforementioned the first transistor conducting, video data is write aforementioned pre-writing unit in advance; And
Reset cell is coupled between aforementioned pre-writing unit and the aforementioned pixel capacitance, in order to the aforementioned pixel capacitance of resetting,
Wherein, when aforementioned pixel capacitance is reset, earlier aforementioned video data is write aforementioned pre-writing unit in advance, when reset back and when preparing to show aforementioned video data of aforementioned pixel capacitance, with the aforementioned pixel capacitance of aforementioned video data asynchronous write,
Wherein aforementioned pre-writing unit comprises:
First memory capacitance, an end is connected with the aforementioned drain electrode of aforementioned the first transistor;
Transistor seconds has grid, source electrode and drain electrode, and wherein, aforementioned grid receives the pixel setting signal, and aforementioned source electrode is connected with the aforementioned drain electrode of aforementioned the first transistor,
Wherein aforementioned reset cell comprises:
Second memory capacitance, one end is connected to the aforementioned drain electrode of aforementioned transistor seconds and an end of aforementioned pixel capacitance, wherein, the other end that the other end of aforementioned first memory capacitance is connected to last sweep trace and aforementioned second memory capacitance is connected to predetermined voltage, or the other end that the other end of aforementioned first memory capacitance is connected to aforementioned predetermined voltage and aforementioned second memory capacitance is connected to aforementioned last sweep trace; And
The 3rd transistor has grid, source electrode and drain electrode, and wherein, aforementioned grid receives the pixel reset signal, and aforementioned source electrode is connected to the aforementioned drain electrode of aforementioned transistor seconds, and aforementioned drain electrode is connected to the aforementioned grid of aforementioned transistor seconds.
18. dot structure as claimed in claim 17, wherein, aforementioned predetermined voltage is ground voltage or common electrode voltage.
19. dot structure as claimed in claim 17, wherein, aforementioned first, aforementioned second with aforementioned the 3rd transistor be thin film transistor (TFT).
20. dot structure as claimed in claim 17, wherein, the other end of aforementioned pixel capacitance is connected to high-frequency signal, and the frequency of aforementioned high-frequency signal is 10kHz-50kHz.
21. dot structure as claimed in claim 17, wherein, the other end of aforementioned pixel capacitance is connected to predetermined voltage or transparency electrode voltage.
22. dot structure as claimed in claim 17, wherein, aforementioned pixel capacitance is a liquid crystal capacitance.
23. displaying panel driving method, aforementioned panel is made of a plurality of pixel, these pixels lay respectively at the infall of multi-strip scanning line and many data lines, and aforementioned each pixel is by being made of claim 1,11 or 17 described dot structures, and aforementioned displaying panel driving method comprises:
A) set aforementioned panel, make the viewing area of aforementioned panel comprise first viewing area and second viewing area at least;
B) these pixels in aforementioned first viewing area of replacement, and drive these pixels that show in aforementioned second viewing area;
C) after these pixels of aforementioned first viewing area of resetting, more view data is write aforementioned first viewing area;
D) these pixels of aforementioned second viewing area of resetting, and drive these pixels of aforementioned first viewing area, to show aforementioned view data; And
E) after these pixels of aforementioned second viewing area of resetting, more view data is write aforementioned second viewing area, and get back to abovementioned steps b).
24. displaying panel driving method as claimed in claim 23, wherein, abovementioned steps a) more comprises: according to sweep trace, divide aforementioned first with aforementioned second viewing area.
25. displaying panel driving method as claimed in claim 23, wherein, abovementioned steps a) more comprises: according to data line, divide aforementioned first with aforementioned second viewing area.
26. displaying panel driving method as claimed in claim 23, wherein, abovementioned steps a) more comprises: according to sweep trace and data line, divide aforementioned first with aforementioned second viewing area.
27. displaying panel driving method as claimed in claim 23, wherein, abovementioned steps a) more comprises: with aforementioned first and/or aforementioned second viewing area be divided into a plurality of viewing areas more respectively.
28. displaying panel driving method as claimed in claim 27, wherein, abovementioned steps a) more comprises: making these viewing areas of aforementioned first viewing area is adjacent arrangement, and to make these viewing areas of aforementioned second viewing area be adjacent arrangement.
29. displaying panel driving method as claimed in claim 27, wherein, abovementioned steps a) more comprises: make each these viewing area in these viewing areas in aforementioned first viewing area and aforementioned second viewing area for being staggered.
30. displaying panel driving method as claimed in claim 23, wherein, the step of reset aforementioned first viewing area and aforementioned second viewing area of resetting can overlap on sequential.
31. displaying panel driving method as claimed in claim 23 wherein, shows that aforementioned first viewing area and the step that shows aforementioned second viewing area can overlap on sequential.
32. displaying panel driving method as claimed in claim 23, wherein, these pixels are liquid crystal pixel.
33. displaying panel driving method, aforementioned panel is made of a plurality of pixel, these pixels lay respectively at the infall of multi-strip scanning line and many data lines, and aforementioned each pixel is by being made of claim 1,11 or 17 described dot structures, and aforementioned displaying panel driving method comprises:
Set aforementioned panel, distinguishing aforementioned panel is a plurality of viewing areas;
Reset all these pixels in the aforementioned panel;
View data is write each these viewing area; And
According to zone sequence, respectively with earlier figures as data presentation in each these viewing area.
34. displaying panel driving method as claimed in claim 33 more comprises:, divide each these viewing area according to sweep trace.
35. displaying panel driving method as claimed in claim 33 more comprises:, divide each these viewing area according to data line.
36. displaying panel driving method as claimed in claim 33 more comprises:, divide each these viewing area according to sweep trace and data line.
37. displaying panel driving method as claimed in claim 33, wherein, these pixels are liquid crystal pixel.
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| CN102568405B (en) * | 2010-12-31 | 2014-10-08 | 上海天马微电子有限公司 | Field sequence liquid crystal display device and driving method thereof |
| TWI544266B (en) * | 2015-06-03 | 2016-08-01 | 友達光電股份有限公司 | Pixel circuit |
| TWI711951B (en) * | 2016-09-08 | 2020-12-01 | 仟融科技股份有限公司 | Touch sensing unit and fingerprint touch apparatus appling the touch sensing unit |
| CN106782400A (en) * | 2017-01-17 | 2017-05-31 | 京东方科技集团股份有限公司 | A kind of image element circuit and its driving method, display device and its driving method |
| CN107068107A (en) | 2017-06-23 | 2017-08-18 | 京东方科技集团股份有限公司 | Image element circuit, display device and driving method |
| CN109493808B (en) * | 2017-09-12 | 2020-11-17 | 元太科技工业股份有限公司 | Display device |
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| CN1346450A (en) * | 1999-12-03 | 2002-04-24 | 三菱电机株式会社 | Liquid crystal display |
| US6392620B1 (en) * | 1998-11-06 | 2002-05-21 | Canon Kabushiki Kaisha | Display apparatus having a full-color display |
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|---|---|---|---|---|
| US6392620B1 (en) * | 1998-11-06 | 2002-05-21 | Canon Kabushiki Kaisha | Display apparatus having a full-color display |
| CN1346450A (en) * | 1999-12-03 | 2002-04-24 | 三菱电机株式会社 | Liquid crystal display |
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