CN101202532B - Complementary type metal oxidizing layer semiconductor noise generator - Google Patents
Complementary type metal oxidizing layer semiconductor noise generator Download PDFInfo
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- CN101202532B CN101202532B CN2006101651166A CN200610165116A CN101202532B CN 101202532 B CN101202532 B CN 101202532B CN 2006101651166 A CN2006101651166 A CN 2006101651166A CN 200610165116 A CN200610165116 A CN 200610165116A CN 101202532 B CN101202532 B CN 101202532B
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Abstract
The invention relates to the noise generator technical field. The invention discloses a complementary metal oxide semiconductor noise generator, comprising a bias circuit which is used for providing DC working points for a dual-drain complementary metallic oxide semiconductor transistor current mirror and a differential amplifier; the dual-drain complementary metallic oxide semiconductor transistor current mirror is used for converting slight noise current signals into amplified or larger differential voltage signals which are then output to the differential amplifier; the invention also comprises the differential amplifier which is used for converting differential both-terminal signals input by the dual-drain complementary metallic oxide semiconductor transistor current mirror into single-terminal signals and amplifies and outputs the single-terminal signals. By adopting the CMOS process which is widely applied, the invention greatly reduces the power loss of noise generator and well solves the problem that reactive label working distance is shortened even the power loss is only a plurality of MuW.
Description
Technical field
The present invention relates to the noise generator technical field, relate in particular to a kind of low-power consumption complementary metal oxide layer semiconductor (CMOS) noise generator.
Background technology
Noise generator is a most important building block in the randomizer.And the technologic noise generator of the CMOS of low-power consumption designs the necessary part of Low-Power CMOS real random number generator especially, especially is applied in the real random number generator in the RFID tag, is the technology of a key.
RFID tag is very harsh to the requirement of power consumption, and is particularly passive radio-frequency identification labeled.It is all bigger to use common CMOS pipe to make the noise generator power consumption that noise source forms.Because the noise of common CMOS pipe is big inadequately, need complicated circuit effectively to be amplified to available scope to noise, so consume more energy.
For passive radio-frequency identification labeled, the power consumption of each unit generally will be lower than 1 μ W, the operating distance of the unconspicuous shortening label of ability.
Summary of the invention
(1) technical problem that will solve
In view of this, main purpose of the present invention is to provide a kind of CMOS noise generator, to realize the low-power consumption noise generator.
(2) technical scheme
For achieving the above object, technical scheme of the present invention is achieved in that
A kind of complementary metal oxide layer semiconductor CMOS noise generator, this noise generator comprises:
Biasing circuit is used to two drain electrode complementary metal oxide layer semiconductor transistor current mirrors and differential amplifier that dc point is provided;
Two drain electrode complementary metal oxide layer semiconductor transistor current mirrors are used for small noise current and take place and small noise current conversion of signals is zoomed into bigger differential voltage signal to export to differential amplifier;
Differential amplifier is used for the difference double-end signal of two drain electrode complementary metal oxide layer semiconductor transistor current mirror inputs is converted to single-ended signal, and this single-ended signal is amplified output;
Wherein, described two drain electrode complementary metal oxide layer semiconductor transistor current mirror is connected and composed by two drain electrode complementary metal oxide layer semiconductor transistors of two P types two drain electrode complementary metal oxide layer semiconductor transistor and two N types, and concrete connected mode is:
The transistorized grid of described two P types two drain electrode complementary metal oxide layer semiconductor interconnects, and be connected to the transistorized drain electrode of each P complementary metal oxide layer semiconductor, and form the positive input terminal of differential amplifier, transistorized two other drain electrode of two P type two drain electrode complementary metal oxide layer semiconductors is interconnected to form the negative input end of differential amplifier;
The transistorized grid of described two N types two drain electrode complementary metal oxide layer semiconductor interconnects, and be connected to described biasing circuit, and two the two drain electrode of N type complementary metal oxide layer semiconductor transistor drain are connected with the two drain electrode of two P types complementary metal oxide layer semiconductor transistor drain respectively, form the positive-negative input end of differential amplifier.
Described two drain electrode complementary metal oxide layer semiconductor transistor current mirror is a noise source.
Described differential amplifier is an one-level CMOS differential amplifier.
(3) beneficial effect
From technique scheme as can be seen, the present invention has following beneficial effect:
1, this CMOS noise generator provided by the invention adopts widely used CMOS technology to make, and greatly reduces the power consumption of noise generator, even solved the problem that the power consumption of a few μ W all can shorten the passive label operating distance well.
2, this CMOS noise generator provided by the invention, because two transistorized grids of P type Split-drain CMOS of two drain electrode complementary metal oxide layer semiconductor (Split-drain CMOS) transistor current mirrors interconnect, and be connected to self drain electrode, and two P type Split-drainCMOS transistor drain are connected in the positive input terminal of differential amplifier jointly, and transistorized two other drain electrode of two P type two drain electrode complementary metal oxide layer semiconductors is interconnected to form the negative input end of differential amplifier; Two transistorized grids of N type Split-drain CMOS interconnect, and be connected to described biasing circuit, and two the two drain electrode of N type complementary metal oxide layer semiconductor transistor drain are connected with the two drain electrode of two P types complementary metal oxide layer semiconductor transistor drain respectively, form the positive-negative input end of differential amplifier.So, utilize the present invention can effectively eliminate the magnetic mudulation effect.
3, this CMOS noise generator provided by the invention, because the grid of two N type Split-drain CMOS pipes of Split-drain CMOS transistor current mirror is connected to described biasing circuit, grid voltage is provided by biasing circuit, so, can effectively control the size of current of Split-drain CMOS transistor current mirror.
4, this CMOS noise generator provided by the invention is particularly suitable for being applied in the real random number generator in radio-frequency (RF) identification (RFID) label chip.
Description of drawings
Fig. 1 is the block diagram of Low-Power CMOS noise generator provided by the invention;
Fig. 2 is the schematic diagram of Spit-drain CMOS transistor current mirror provided by the invention;
The circuit diagram of the Low-Power CMOS noise generator that provides according to the embodiment of the invention is provided Fig. 3;
Embodiment
For making the purpose, technical solutions and advantages of the present invention clearer, below in conjunction with specific embodiment, and with reference to accompanying drawing, the present invention is described in more detail.
As shown in Figure 1, Fig. 1 is the block diagram of Low-Power CMOS noise generator provided by the invention, and this noise generator comprises: biasing circuit 10, Split-drain CMOS transistor current mirror 11 and differential amplifier 12.
Wherein, biasing circuit 10 is used to Split-drain CMOS transistor current mirror and differential amplifier that dc point is provided.Split-drain CMOS transistor current mirror 11 is used for that small noise current conversion of signals is zoomed into bigger differential voltage signal and exports to differential amplifier.Differential amplifier 12 is used for the difference double-end signal of Split-drain CMOS transistor current mirror input is converted to single-ended signal, and this single-ended signal is amplified output.
Based on the block diagram of the described Low-Power CMOS noise generator of Fig. 1, Fig. 2 shows the schematic diagram of Spit-drain CMOS transistor current mirror provided by the invention.This Split-drain CMOS transistor current mirror is as noise source, connected and composed by the Split-drain CMOS transistor of two P type Split-drain CMOS transistors and two N types.Two transistorized grids of P type Split-drain CMOS interconnect, and be connected to self drain electrode, and two P type Split-drainCMOS transistor drain are connected in the positive input terminal of differential amplifier jointly, and transistorized two other drain electrode of two P type two drain electrode complementary metal oxide layer semiconductors is interconnected to form the negative input end of differential amplifier.Two transistorized grids of N type Split-drain CMOS interconnect, and be connected to described biasing circuit, and two the two drain electrode of N type complementary metal oxide layer semiconductor transistor drain are connected with the two drain electrode of two P types complementary metal oxide layer semiconductor transistor drain respectively, form the positive-negative input end of differential amplifier.
Based on the block diagram of the described Low-Power CMOS noise generator of Fig. 1 and, the schematic diagram of the described Spit-drain CMOS of Fig. 2 transistor current mirror, the circuit diagram of the Low-Power CMOS noise generator that provides according to the embodiment of the invention is provided Fig. 3.Wherein, Split-drain CMOS transistor current mirror is a noise source, and Split-drain CMOS transistor current mirror is that the Split-drain CMOS transistor by two N types and two P types connects and composes.Differential amplifier is the CMOS differential amplifier of an one-level.
We are with this low-power consumption provided by the invention, high sensitivity CMOS noise generator is applied in the real random number generator, real random number generator circuit design and layout design have been carried out, the result of test can be by American National Standard and (the National Institute of Standards and Technology of technical research institute for the random number sequence that real random number generator produced, NIST) to the requirement of random number sequence, lowest power consumption is 0.65 μ W, proof the present invention is practicable, is particularly suitable for being applied in the real random number generator in radio-frequency (RF) identification (RFID) label chip.
Above-described specific embodiment; purpose of the present invention, technical scheme and beneficial effect are further described; institute is understood that; the above only is specific embodiments of the invention; be not limited to the present invention; within the spirit and principles in the present invention all, any modification of being made, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (3)
1. complementary metal oxide layer semiconductor CMOS noise generator is characterized in that this noise generator comprises:
Biasing circuit is used to two drain electrode complementary metal oxide layer semiconductor transistor current mirrors and differential amplifier that dc point is provided;
Two drain electrode complementary metal oxide layer semiconductor transistor current mirrors are used for small noise current and take place and small noise current conversion of signals is zoomed into bigger differential voltage signal to export to differential amplifier;
Differential amplifier is used for the difference double-end signal of two drain electrode complementary metal oxide layer semiconductor transistor current mirror inputs is converted to single-ended signal, and this single-ended signal is amplified output;
Wherein, described two drain electrode complementary metal oxide layer semiconductor transistor current mirror is connected and composed by two drain electrode complementary metal oxide layer semiconductor transistors of two P types two drain electrode complementary metal oxide layer semiconductor transistor and two N types, and concrete connected mode is:
The transistorized grid of described two P types two drain electrode complementary metal oxide layer semiconductor interconnects, and be connected to the transistorized drain electrode of each P complementary metal oxide layer semiconductor, and form the positive input terminal of differential amplifier, transistorized two other drain electrode of two P type two drain electrode complementary metal oxide layer semiconductors is interconnected to form the negative input end of differential amplifier;
The transistorized grid of described two N types two drain electrode complementary metal oxide layer semiconductor interconnects, and be connected to described biasing circuit, and two the two drain electrode of N type complementary metal oxide layer semiconductor transistor drain are connected with the two drain electrode of two P types complementary metal oxide layer semiconductor transistor drain respectively, form the positive-negative input end of differential amplifier.
2. CMOS noise generator according to claim 1 is characterized in that, described two drain electrode complementary metal oxide layer semiconductor transistor current mirrors are noise source.
3. CMOS noise generator according to claim 1 is characterized in that, described differential amplifier is an one-level CMOS differential amplifier.
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| Application Number | Priority Date | Filing Date | Title |
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| CN2006101651166A CN101202532B (en) | 2006-12-13 | 2006-12-13 | Complementary type metal oxidizing layer semiconductor noise generator |
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| Application Number | Priority Date | Filing Date | Title |
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| CN2006101651166A CN101202532B (en) | 2006-12-13 | 2006-12-13 | Complementary type metal oxidizing layer semiconductor noise generator |
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| CN101202532A CN101202532A (en) | 2008-06-18 |
| CN101202532B true CN101202532B (en) | 2010-06-23 |
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Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101833434B (en) * | 2009-03-13 | 2012-10-17 | 国民技术股份有限公司 | CMOS (Complementary Metal Oxide Semiconductor) random number generator |
| CN103186361B (en) * | 2011-12-27 | 2017-07-04 | 国民技术股份有限公司 | CMOS randomizers |
| CN114871084B (en) * | 2022-07-06 | 2022-10-28 | 南京声息芯影科技有限公司 | Digital signal output's PMUT unit, chip and ultrasonic equipment |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1507148A (en) * | 2002-12-12 | 2004-06-23 | 上海科星自动化技术有限公司 | Bandwidth-limiting analog white noise generator |
| CN1792030A (en) * | 2003-03-26 | 2006-06-21 | 艾利森电话股份有限公司 | Noise generator |
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2006
- 2006-12-13 CN CN2006101651166A patent/CN101202532B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1507148A (en) * | 2002-12-12 | 2004-06-23 | 上海科星自动化技术有限公司 | Bandwidth-limiting analog white noise generator |
| CN1792030A (en) * | 2003-03-26 | 2006-06-21 | 艾利森电话股份有限公司 | Noise generator |
Non-Patent Citations (4)
| Title |
|---|
| Fabrizio Cortigiani等.Very High-Speed True Random Noise Generator.Electronics, Circuits and Systems, 2000. ICECS 2000. The 7th IEEE International Conference on.2002,120-123. * |
| Fernando C. Castaldo等.Transversal noise current in split-drain transistors.Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on.2006,5175-5178. * |
| 王云峰等.混沌随机数发生器的设计.半导体学报26 12.2005,26(12),2433-2439. |
| 王云峰等.混沌随机数发生器的设计.半导体学报26 12.2005,26(12),2433-2439. * |
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