CN101197574B - Switch current unit and its array used for current rudder type D/A converter - Google Patents
Switch current unit and its array used for current rudder type D/A converter Download PDFInfo
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Abstract
The invention provides a switching current unit for a current steering D/A converter, which consists of a power supply, a current supply Isic, a first inverter (1), a switch SO (3), a switch SD (2), a second inverter (6), a first NOR gate (4) and a second NOR gate (5), wherein, one end of the current supply Isic is connected with the power supply, one ends of the switch SD (2) and the switch SO(3) are commonly connected with the other end of the current supply Isic; the control end of the switch SO (3) is connected with the output end of the first inverter (1); the control end of the switch SD (2) is connected with the input end of the first inverter (1); the input end of the first inverter (1) is connected with the output end of the first NOR gate (4); two input ends of the first NOR gate (4) are respectively connected with the output end of the second NOR gate (5) and the output end of the second inverter (6). The D/A converter provided by the invention is of smooth output curve, and small interference caused by the injection of an electric charge.
Description
Technical field
The present invention relates to the digital analog converter field, relate in particular to a kind of switching current unit and array thereof that is applied to current steering digital-to-analog converter.
Background technology
The kind of design of digital to analog converter has delta sigma type, R-2R type, resistance serial type, current steer type or the like, and they are all inequality at aspects such as circuit complexity, the speed of service, power consumption and chip areas.Wherein current steering digital-to-analog converter is having a wide range of applications at a high speed and in the circuit that matching is had relatively high expectations, and the capacity usage ratio of current steering digital-to-analog converter is higher, when the output signal being carried out almost can all energy be exported when difference is utilized.Current steering digital-to-analog converter is converting digital signal in the process of analog signal, and its static state and dynamic property mainly depend on the switching current unit.The switching current unit of current steering digital-to-analog converter has three types: binary type, thermometer-code type and mixed type.
In the binary type digital to analog converter, any one unit is controlled by binary digit all, and its output current size is the twice of adjacent low bit location.In this transducer, digital input signals is directly controlled each current unit.The advantage of this structure is; Circuit structure is simple; Chip area is less because it does not need extra logical circuit, but the shortcoming of the maximum of this structure be exactly can not mate caused differential nonlinearity between each unit and dynamic error bigger; Thereby cause big burr to produce (being big noise), reduced the signal to noise ratio of digital to analog converter.
In thermometer-code type digital to analog converter, each current unit all is equivalent to a lowest order (LSB), and by control separately.Digital input signals at first converts thermometer-code into through the thermometer-code decoder, controls these unit by thermometer-code then.This transducer advantage is that differential nonlinearity is good, and dynamic error is less, because for two adjacent input codes, has only a switching current unit to need to switch.Its major defect is that decoding circuit is very complicated, and digital circuit and the line of extra increase increase with exponential form with respect to bit number, this just mean need be bigger the chip area and the layout design of complicacy more.Therefore such transducer generally all can use the array architecture of two sections decodings.
The mixed type digital to analog converter has combined the advantage of binary type and thermometer-code type.In the transducer of this structure, the digital to analog converter of N bit is split as two sub-transducers usually, and wherein the R lowest order adopts binary coding, and C highest order (MSB) adopts thermometer-code.Therefore, the mixed type digital to analog converter is actually the compromise of binary type and thermometer-code type.
At present in existing array thermometer-code type transducer; Switching current cellular construction commonly used is as shown in Figure 1, comprises first inverter (1), switch S D (the expression Control current flows to the switch of discarded end) (2) and switch S O (the expression Control current flows to the switch of output) (3), as input CTR (control; The control signal end) when being logic low; Switch S O is closed (switch S D opens simultaneously), and electric current I sic (electric current of the switching current unit of flowing through) flows to DMP (discarding) end through switch S D, when input CTR is logic high; Switch S O opens (switch S D closes simultaneously), and electric current I sic flows to OUT (output) end through switch S O.
Its units corresponding array structure is as shown in Figure 2, the digital to analog converter of N bit be divided into R capable with C row (R+C=N wherein, C represent the input code of a high position, R represents the input code of low level).Input signal at the N bit transforms to from 00...0 the process of 11...1 continuously, and the output waveform of row, row thermometer-code decoder is as shown in Figure 3, waveform 108,107 ..., 106 be 2 of row decoder
R-1 output, waveform 105,104 ..., 103 be 2 of column decoder
C-1 output.Be carved into A during wherein from O constantly, have 2
RFrom left to right one by one the unlatching successively (for output OUT) of individual state, the unit in array first row (ROW1); Be carved into B during from A constantly, the unit among the array second row ROW2 all is in opening (for output OUT), the switch of the first row ROW1 from left to right one by one unlatching successively (for output OUT) again simultaneously; Be carved into C during from B constantly, the second row ROW2 of array all is in opening (for output OUT) with the unit among the third line ROW3, another from left to right unlatching successively of the unit among the first row ROW1 simultaneously, or the like.
That is to say that the N of array is capable will open the time, it second walks to the capable unit of N-1 and all is in opening, and the unit of first row is from left to right opened successively.Like this, through A, B, C ... when waiting constantly, always to close 2
R-1 unit opens other 2 again simultaneously
RIndividual unit.The unit is in the process of closing, opening, and the electric charge in the raceway groove need be redistributed, and the output of digital to analog converter will disturb, and is as shown in Figure 3, will produce burr 100 (also being noise) on the curve of output 102 of digital to analog converter.
Summary of the invention
The present invention provides a kind of switching current unit and array thereof that is applied to current steering digital-to-analog converter for solving the bigger defective of output noise of existing digital to analog converter.
A kind of switching current unit that is applied to current-steering digital-to-analog converter.Comprise power supply, current source Isic, first inverter, second inverter, first NOR gate, second NOR gate, switch S D and switch S O; Wherein the end of current source Isic links to each other with power supply; The end of the other end and switch S D, switch S O links to each other jointly; The control end of switch S O is connected with the output of first inverter, and the control end of switch S D is connected with the input of first inverter, and the input of first inverter links to each other with the output of first NOR gate; Two inputs of first NOR gate link to each other with the output of second NOR gate, the output of second inverter respectively; Wherein, current source Isic is the said input that is applied to the switching current unit of current steering digital-to-analog converter, the discarded end of another termination of switch S D (2); Another termination output of switch S O (3) is as the said output that is applied to the switching current unit of current steering digital-to-analog converter.
Being input as of wherein said second NOR gate " carry " and " OK "; Being input as of said second inverter " row ".
Wherein when input " row " when being logic low, switch S O is closed, and SD opens simultaneously, and electric current I sic flows to " discard " through switch S D and holds.
Wherein when input " row " when being logic high,
(1) when " OK " end had at least one to be in high level with " carry " end, switch S O opened, and switch S D closes simultaneously, and electric current I sic flows to output through switch S O;
(2) when " OK " end all was in logic low with " carry " end, switch S O closed, and SD opens simultaneously, and electric current I sic flows to " discarding " end through switch S D.
The present invention has increased by second inverter, first NOR gate and second NOR gate on the basis of original circuit, make the injecting the interference that causes by electric charge and can ignore of digital to analog converter provided by the invention output.
Description of drawings
The circuit diagram of switching current unit in Fig. 1 prior art;
Fig. 2 is existing switching current cellular array figure;
Fig. 3 is row corresponding when input code increases continuously, the output waveform that column decoder is exported shape and switching current cell array;
Fig. 4 is the circuit diagram of the switching current unit among the present invention;
Fig. 5 is the switching current cellular array figure among the present invention.
Embodiment
Switching current provided by the present invention unit is as shown in Figure 4; With main not being both of prior art; Three doors have been increased; NOR gate (4), NOR gate (5) and inverter (6), wherein the control end of switch S D (2) is connected with the input of inverter (1), and the output of inverter (1) links to each other with the end of switch S O (3); The input of inverter (1) links to each other with the output of NOR gate (4), and two inputs of NOR gate (4) link to each other with the output of NOR gate (5), the output of inverter (6) respectively.。Its concrete operation principle is following:
As input COL (" row ") when being logic low, switch S O (3) is closed, and switch S D (2) opens simultaneously, and electric current I sic will flow to DMP through switch S D (2) and hold.
When input COL end was logic high, the flow direction of electric current I sic depended on input ROW and CAR:
(1) when ROW (" OK ") end had at least one to be in high level with CAR (" carry ") end, switch S O (3) opened, and switch S D (2) is when closing simultaneously, and electric current I sic flows to OUT through switch S O (3) and holds;
(2) when ROW end all was in logic low with the CAR end, switch S O (3) closed, and SD (2) opens simultaneously, and electric current I sic flows to DMP through switch S D (2) and holds, and is as shown in the table:
Based on the switching current cellular construction among the present invention; The switching current cell array is as shown in Figure 5; The digital to analog converter of a N bit is divided into the capable and C row (R+C=N, C represent the high position in the input code, and R represents the low level in the input code) of R; Input signal at the N bit transforms to from 00...0 the process of 11...1 continuously, and row, row thermometer-code decoder output waveform are shown in Fig. 3 bottom.Be carved into A during from O constantly, have 2
ROne by one the unlatching successively from top to bottom of individual state, the unit among the array first row COL1; Be carved into B during from A constantly, the unit among the array first row COL1 is all opened, and just in time only needs unit one by one the unlatching successively from top to bottom among the secondary series COL2; Be carved into C during from B constantly, the unit in preceding two row (COL1 and COL2) of array is all opened, and just in time only needs the 3rd unit one by one the unlatching from top to bottom that be listed as among the COL3 again, or the like.Like this, at Z previous state constantly, 2 in the array
R+C-1 switching current unit is all opened, and has only a switching current unit in the lower left corner to be in closing state (in fact, this unit can omit) always.
As shown in Figure 3, the curve of output 101 of this digital to analog converter is very level and smooth, does not have burr, and its interference is very little.
Compare with prior art, based on switching current cell array provided by the present invention, even through A, B, C ... when waiting constantly, the switching current unit also is unlatching successively one by one.The topmost advantage of the present invention is to inject the interference that causes by electric charge can ignore.
Claims (4)
1. switching current unit that is applied to current steering digital-to-analog converter; Comprise that power supply, current source Isic, first inverter (1), switch S O (3) and switch S D (2) is characterized in that; Also comprise second inverter (6), first NOR gate (4) and second NOR gate (5); Wherein the end of current source Isic links to each other with power supply; The other end links to each other with switch S D (2), switch S O (3) one ends jointly; The control end of switch S O (3) is connected with the output of first inverter (1), and the control end of switch S D (2) is connected with the input of first inverter (1), and the input of first inverter (1) links to each other with the output of first NOR gate (4); Two inputs of first NOR gate (4) link to each other with the output of second NOR gate (5), the output of second inverter (6) respectively; Wherein, current source Isic is the said input that is applied to the switching current unit of current steering digital-to-analog converter, the discarded end of another termination of switch S D (2); Another termination output of switch S O (3) is as the said output that is applied to the switching current unit of current steering digital-to-analog converter.
2. a kind of switching current unit that is applied to current steering digital-to-analog converter as claimed in claim 1 is characterized in that, being input as of described second NOR gate (5) " carry " and " OK "; Being input as of described second inverter (6) " row ".
3. a kind of switching current unit that is applied to current steering digital-to-analog converter as claimed in claim 2; It is characterized in that when input " row " when being logic low, switch S O is closed; Switch S D opens simultaneously, and electric current I sic flows to " discarding " end through switch S D.
4. a kind of switching current unit that is applied to current steering digital-to-analog converter as claimed in claim 2 is characterized in that, when " row " end is logic high,
(1) when " OK " end had at least one to be in high level with " carry " end, switch S O opened, and switch S D closes simultaneously, and electric current I sic flows to " output " end through switch S O;
(2) when " OK " end all was in logic low with " carry " end, switch S O closed, and switch S D opens simultaneously, and electric current I sic flows to " discarding " end through switch S D.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2007101735734A CN101197574B (en) | 2007-12-28 | 2007-12-28 | Switch current unit and its array used for current rudder type D/A converter |
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| Application Number | Priority Date | Filing Date | Title |
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| CN2007101735734A CN101197574B (en) | 2007-12-28 | 2007-12-28 | Switch current unit and its array used for current rudder type D/A converter |
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| CN101197574A CN101197574A (en) | 2008-06-11 |
| CN101197574B true CN101197574B (en) | 2012-05-09 |
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Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN108233935A (en) * | 2018-01-26 | 2018-06-29 | 延安大学 | A kind of wide band digital analog converter for wideband wireless local area network |
| CN109672445B (en) * | 2018-12-22 | 2023-06-27 | 成都华微科技有限公司 | R-2R resistor network low-area high-linearity switch array |
| CN114640352B (en) * | 2022-03-28 | 2023-05-09 | 电子科技大学 | DAC based on current rudder and R-2R resistor mixture |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5815104A (en) * | 1997-03-20 | 1998-09-29 | Sigmatel, Inc. | Method and apparatus for digital to analog conversion |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5815104A (en) * | 1997-03-20 | 1998-09-29 | Sigmatel, Inc. | Method and apparatus for digital to analog conversion |
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Owner name: SHANGHAI MUNICIPAL ELECTRIC POWER COMPANY SHANGHAI Effective date: 20121127 Owner name: STATE GRID CORPORATION OF CHINA Free format text: FORMER OWNER: HONGLI SEMICONDUCTOR MANUFACTURE CO LTD, SHANGHAI Effective date: 20121127 |
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Inventor after: Sheng Fangzheng Inventor after: Hong Jun Inventor after: Zhang Huamei Inventor after: Yu Jianping Inventor after: Qin Yishou Inventor after: Chen Xiaojie Inventor before: Qin Yishou Inventor before: Chen Xiaojie |
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Free format text: CORRECT: INVENTOR; FROM: QIN YISHOU CHEN XIAOJIE TO: SHENG FANGZHENG HONG JUN ZHANG HUAMEI YU JIANPING QIN YISHOU CHEN XIAOJIE Free format text: CORRECT: ADDRESS; FROM: 201203 PUDONG NEW AREA, SHANGHAI TO: 100031 XICHENG, BEIJING |
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Effective date of registration: 20121127 Address after: 100031 Xicheng District West Chang'an Avenue, No. 86, Beijing Patentee after: State Grid Corporation of China Patentee after: Shanghai Electric Power Corporation Patentee after: Shanghai Runpower Information Technology Co., Ltd. Address before: 201203 Shanghai Zhangjiang hi tech park GuoShouJing Road No. 818 Patentee before: Hongli Semiconductor Manufacture Co., Ltd., Shanghai |