CN101179041A - Method for identifying main reference plane position of burnishing epitaxial slice - Google Patents
Method for identifying main reference plane position of burnishing epitaxial slice Download PDFInfo
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- CN101179041A CN101179041A CNA2007101571734A CN200710157173A CN101179041A CN 101179041 A CN101179041 A CN 101179041A CN A2007101571734 A CNA2007101571734 A CN A2007101571734A CN 200710157173 A CN200710157173 A CN 200710157173A CN 101179041 A CN101179041 A CN 101179041A
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- main reference
- epitaxial wafer
- reference plane
- polishing
- reference surface
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Abstract
The invention provides a method for determining the location of the main reference surface of a polishing epitaxial wafer, with the following steps: first taking a polishing epitaxial wafer, corroding the wafer for 2 minutes by Sirtl etching solution, and then observing the polishing epitaxial wafer which is corroded with the main reference surface facing outwards under a microscope. If the tip of a dislocation defect triangle faces the left side, the main reference surface of the polishing epitaxial wafer is determined to be right; and if the tip of the dislocation defect triangle faces the right side, the main reference surface of the polishing epitaxial wafer is determined to be wrong. The practice shows that the method for determining whether the location of the main reference surface is right, has accuracy up to 100 per cent.
Description
[technical field]
The invention belongs to the technique for processing silicon chip technical field, especially relate to a kind of dislocation defects that utilizes and show the method for confirming to polish the epitaxial wafer main reference plane position.
[background technology]
In the silicon chip processing and device production process of microelectronic, the plane of reference plays the effect of identification and location, and it is the datum level that silicon chip is divided chip, and therefore, the plane of reference is one of standardized important content of silicon chip.Device production at first is will produce several to separate tube core or circuit on silicon chip surface, the mode that adopts scribing to cut apart then is divided into separate unit to tube core or circuit, again these separate units are loaded onto support, press lead-in wire, be encapsulated in the shell and make device.Because silicon crystal has the anisotropy characteristics, so should select best scribing dividing method during scribing, otherwise will cause die yield to reduce.One of principle that the plane of reference is selected is corresponding to the cleavage surface of crystal.The crystal preparation in (111) used always and (100) crystal orientation is determined according to above-mentioned principle.In the prior art, usually the scribing of square or rectangle tube core is cut apart and be to be undertaken by the plane of reference direction of silicon chip preparation in advance.The problem that exists is: conventional process flow is found out several main ribs of monocrystalline by range estimation monocrystalline main ridge, according to the difference in the crystal orientation main reference plane position that draws, in case deviation appears in the differentiation of main rib, will cause the making mistake of the monocrystal rod plane of reference again.In the case, people are seeking always and after monocrystal rod is cut into silicon chip the main reference plane that draws are being carried out the means that correctness is judged, and means that in fact also do not find so far and method detect and judge whether the main reference plane of monocrystalline silicon piece is correct, to avoid continuing to occur mistake in the silicon chip following process, cause unnecessary loss.
The polishing epitaxial wafer in crystal orientation (111) generally all have 4 the degree monotectics to, if the irrelevance mistake is then unfavorable to epitaxial growth, but also can cause pattern distortion.So must guarantee of the requirement of various circuit in the silicon chip processing, and monotectic has direct relation to cutting and main reference plane correctness to the wafer crystal orientation.
[summary of the invention]
For solving the above-mentioned technical problem that prior art exists, the present invention aims to provide a kind of method of confirming to polish the epitaxial wafer main reference plane position, judges with this method whether main reference plane position of silicon chip is correctly simple, accuracy rate is high.
A kind of method of confirming to polish the epitaxial wafer main reference plane position: get a polishing epitaxial wafer earlier, with Sirtl corrosive liquid corrosion 2 minutes.The weight proportion of corrosive liquid is CrO
3: H
2O=1: 2 (standard liquids), HF (40%): (standard liquid)=1: 1 (volume ratio); Polishing epitaxial wafer main reference plane after the corrosion is placed on microscopically outwardly to be observed, if the leg-of-mutton wedge angle of dislocation defects is during towards a left side, it is correct that then decidable is somebody's turn to do the main reference plane that polishes epitaxial wafer, if the leg-of-mutton wedge angle of dislocation defects is during towards the right side, the main reference plane mistake that decidable should the polishing epitaxial wafer then.
Beneficial effect: applicant's repetition test has drawn the simple and easy method of judging that main reference plane position of silicon chip is whether correct, facts have proved and utilizes this method to judge whether reference plane position is correct, and its accuracy rate can reach 100%.
For sharpening understanding, also the invention will be further described in conjunction with the accompanying drawings below by embodiment.
[description of drawings]
Fig. 1 observes schematic diagram, the state when the figure shows the leg-of-mutton wedge angle of dislocation defects towards a left side down for microscope lens of the present invention.
Fig. 2 observes schematic diagram, the state when the figure shows the leg-of-mutton wedge angle of dislocation defects towards the right side down for another mirror of microscope of the present invention.
[embodiment]
Referring to Fig. 1.Observing multiplying power is 200, and the wedge angle 3 of dislocation defects triangle 2 that is positioned at the visual field 1 among Fig. 1 is towards a left side, one side relative with wedge angle 3 then be vertical wire, therefore, we can judge that the main reference plane on this polishing epitaxial wafer is correct.
Referring to Fig. 2.The leg-of-mutton wedge angle of dislocation defects among Fig. 2 in the visual field is towards the right side, one side relative with wedge angle then be vertical wire, therefore, we can judge that the main reference plane on this polishing epitaxial wafer is wrong.
The so-called main reference plane meaning outwardly is that mark with main reference plane is towards the observer.
Certainly, this method also can be applied to the main reference plane differentiation of diffusion sheet.
Claims (1)
1. method of confirming to polish the epitaxial wafer main reference plane position is characterized in that: get a polishing epitaxial wafer earlier, with Sirtl corrosive liquid corrosion 2 minutes, the weight proportion of corrosive liquid was CrO
3: H
2O=1: 2 (standard liquids), HF (40%): (standard liquid)=1: 1 (volume ratio); Polishing epitaxial wafer main reference plane after the corrosion is placed on microscopically outwardly observes, if the leg-of-mutton wedge angle of dislocation defects during towards a left side, then main reference plane that decidable should the polishing epitaxial wafer is correct; If the leg-of-mutton wedge angle of dislocation defects is during towards the right side, the main reference plane mistake that decidable should the polishing epitaxial wafer then.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2007101571734A CN101179041A (en) | 2007-11-27 | 2007-11-27 | Method for identifying main reference plane position of burnishing epitaxial slice |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2007101571734A CN101179041A (en) | 2007-11-27 | 2007-11-27 | Method for identifying main reference plane position of burnishing epitaxial slice |
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| Publication Number | Publication Date |
|---|---|
| CN101179041A true CN101179041A (en) | 2008-05-14 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNA2007101571734A Pending CN101179041A (en) | 2007-11-27 | 2007-11-27 | Method for identifying main reference plane position of burnishing epitaxial slice |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102425011A (en) * | 2011-11-17 | 2012-04-25 | 浙江大学 | Corrosive liquid for displaying void defects of heavily P-doped Czochralski silicon crystal and application thereof |
| CN103048335A (en) * | 2012-12-25 | 2013-04-17 | 开化县质量技术监督检测所 | Method for judging effectiveness of positioning surface of polishing substrate with crystal orientation (111) |
| CN106367813A (en) * | 2016-08-25 | 2017-02-01 | 西安中晶半导体材料有限公司 | Processing method for reference surfaces of semiconductor monocrystalline silicon crystal bar and silicon wafer |
-
2007
- 2007-11-27 CN CNA2007101571734A patent/CN101179041A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102425011A (en) * | 2011-11-17 | 2012-04-25 | 浙江大学 | Corrosive liquid for displaying void defects of heavily P-doped Czochralski silicon crystal and application thereof |
| CN102425011B (en) * | 2011-11-17 | 2014-06-18 | 浙江大学 | Corrosive liquid for displaying void defects of heavily P-doped Czochralski silicon crystal and application thereof |
| CN103048335A (en) * | 2012-12-25 | 2013-04-17 | 开化县质量技术监督检测所 | Method for judging effectiveness of positioning surface of polishing substrate with crystal orientation (111) |
| CN106367813A (en) * | 2016-08-25 | 2017-02-01 | 西安中晶半导体材料有限公司 | Processing method for reference surfaces of semiconductor monocrystalline silicon crystal bar and silicon wafer |
| CN106367813B (en) * | 2016-08-25 | 2019-02-26 | 西安中晶半导体材料有限公司 | A kind of processing method of semiconductor monocrystal silicon crystal bar and the silicon wafer plane of reference |
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