CN101169774A - Multi-processor system, sharing control device and slave processor starting method - Google Patents
Multi-processor system, sharing control device and slave processor starting method Download PDFInfo
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Abstract
The invention discloses a multiprocessor shared control device, a multiprocessor system using the device and a method for starting a slave processor. The device comprises a shared control module and at least one sharable device, wherein the shared control module is used for controlling address, data or other buses and controlling the start-up of the slaved processor, and the shared device is used for storing programs and data required by starting the slave processor. The system comprises a master system, at least a slave system and at least one multiprocessor shared control device, wherein, the slave system is connected with the master system through the multiprocessor shared control device and through a master-slave system communication interface. The invention realizes maximally equipment sharing of the master processor and the plurality of slave processors through the shared control device, so as to reuse hardware resources, reduce complexity of hardware design, simplify the start-up process of the slave processor, and simplify the designing difficulty of control system software.
Description
Technical field
The invention belongs to the embedded system technology field, particularly be used for multicomputer system a kind of shared control device, comprise the processor system of this device, and based on this device from processor startup method.
Background technology
Along with the continuous development of embedded system, though the functional integration of monolithic processor is more and more higher, single flush bonding processor still is difficult to take into account demands such as system's control, service management and data processing.So increasing deviser begins to adopt a plurality of processors, and control, business and function are carried out decentralized management.At present, most common form is to use two processors, is partial to control and management for one, and another is partial to business processing.Certainly, also have and use the more situation of multiprocessor, to meet the different needs.
The increase of processor quantity makes system architecture distincter, but has also brought many new problems simultaneously.Along with the increase of processor number in the system, the required peripheral components of minimum system also increases thereupon, has improved the cost of hardware circuit, has strengthened the complexity of hardware design; Simultaneously, the start-up course of system also can because of the cooperation relation between each processor become very complicated, increase the difficulty of system's control greatly, indirect raising the complexity of software design.
In the existing technology, the deviser is many to isolate each processor minimum system, each processor has independently ROM (Read Only Memory, ROM (read-only memory)) and RAM (Random-Access Memory, random access memory), then by serial, parallel or more complicated communication interface with a plurality of system interconnect, like this along with the lifting of processor number in the system, hardware design and software design complexity also increase thereupon greatly, can't effectively utilize hardware resource, software flow also can't be optimized.
On the basis that guarantees systemic-function integrality and system architecture stratification, if can realize more peripheral components shares, the control method of energy simplified processor, like this, hardware resource obtains the utilization of repetition, the hardware scheme complexity can reduce greatly, and the flow process of system's control can be simplified greatly, and the complexity of software design also can decrease.
Summary of the invention
The problem to be solved in the present invention is defectives such as the hardware resource that overcomes existing multicomputer system existence can not effectively be shared, control method complexity, provides a kind of multiprocessor to share control device.Simultaneously, the present invention also provides a kind of multicomputer system that adopts this device and from the startup method of processor.
For solving the problems of the technologies described above, the multiprocessor that the present invention proposes is shared control device and is comprised a shared control module and at least one shared device.Shared control module is accepted the configuration of primary processor, realizes the control of address, data and other buses and starts control from processor; Shared device is used to preserve startup from processor required program and data, can be ROM, RAM or other memory devices.
Described shared control module is connected with shared device with control signal by address, data bus, and passes through address, data bus and control signal and primary processor and be connected from processor.
The multicomputer system that the present invention proposes comprises a main system, at least one shares control device from system and at least one multiprocessor.Main system comprises primary processor, ROM, RAM, principal and subordinate's communication interface and outside communication interface, ROM is used to store primary processor and starts required program and data, primary processor is connected ROM, RAM, principal and subordinate's communication interface and outside communication interface by address, data bus with control signal, outside communication interface can connect other equipment, as the auxiliary source from processor start-up routine and data.Comprise from processor, RAM and principal and subordinate's communication interface from system, be connected RAM, principal and subordinate's communication interface and multiprocessor from processor with control signal by address, data bus and share control device.
Be connected with principal and subordinate's communication interface of main system from principal and subordinate's communication interface of system; Principal and subordinate's communication interface is not limited to specific serial or parallel communication interface.
Multiprocessor is shared control device and is comprised a shared control module and at least one shared device.Shared control module is accepted the configuration of primary processor, realizes the control of address, data and other buses and starts control from processor; Shared device is used to preserve startup from processor required program and data, can be ROM, RAM or other memory devices; Share control module by address, data bus and control signal respectively with shared device, primary processor be connected from processor.
A plurality of under the situation of system's symmetry, above-mentioned multicomputer system only needs the shared control device of a multiprocessor to get final product, main system according to certain order start selected one after system, can start the next one from system according to same step, carry out successively finishing from system start-up up to all.So-called " symmetry from system ", be meant main system with any one is the same from system with other from system.Because each all is the same from system, so boot sequence can be random.
From system under the asymmetrical situation, above-mentioned multicomputer system can be set up one or more multiprocessors as required and share control device, utilizes hardware resource to greatest extent under the situation that guarantees the systemic-function integrality a plurality of.A plurality of shared control device can be distinguished by address, data bus, other buses or signal specific.So-called " asymmetrical from system " is meant that the main system band is not all from system, but exists different from system.
Start method in a kind of multicomputer system that the present invention proposes from processor, described multicomputer system comprises that a main system, one share control device from system and a multiprocessor, the shared device that described multiprocessor is shared in the control device is ROM, a RAM or other memory devices, said method comprising the steps of:
The first step, primary processor start finish after, will start required program and data write the shared device from processor by sharing control module;
In second step, primary processor abandons visiting the required address of shared device, data and other buses;
In the 3rd step, primary processor switches to from processor by disposing shared control module address, data and other buses that shared device is required, starts then from processor;
In the 4th step, after the processor startup, set up communication by principal and subordinate's communication interface with primary processor and link;
In the 5th step, primary processor disposes at last to sharing control device as required, to set the last right of attribution of shared device.
Wherein, the described first step further comprises the steps:
(a) primary processor is configured sharing control module, to obtain the control of shared device;
(b) share control module and address, data and control signal are handled, give primary processor, accept its control the access control power of shared device according to configuration;
What (c) primary processor obtained to preserve in the shared device starts the required program and the information of data from processor; If it is imperfect to start required program or data from processor, then obtains required program or data and be kept at the shared device from the outside communication interface of main system.
The present invention also proposes to start in a kind of multicomputer system the method from processor, described multicomputer system comprises a main system, a plurality of from system, and when described be a plurality of during of symmetry from system from system, described multicomputer system comprises that also a multiprocessor shares control device, the shared device that described multiprocessor is shared in the control device is one or more ROM, RAM or other memory devices, perhaps when described be asymmetric a plurality of during from system from system, described multicomputer system comprises that also two or more multiprocessors share control device, and the shared device that described multiprocessor is shared in the control device is one or more ROM, RAM or other memory devices; Said method comprising the steps of:
The first step, primary processor start finish after, will start required program and data write the selected shared device from processor by sharing control module;
In second step, primary processor abandons visiting selected required address, data and other buses of shared device;
In the 3rd step, primary processor is shared control module and will be selected the required address of shared device, data and other buses and switch to selectedly from processor by disposing, and starts selected from processor then;
The 4th step, selected start from processor after, set up communication by principal and subordinate's communication interface with primary processor and link;
In the 5th step, primary processor is prepared to start other from processor according to the order of setting;
The 6th step repeated for second step to the 5th step,, finish up to all starting from processor;
In the 7th step, primary processor disposes at last to sharing control device as required, to set the last right of attribution of shared device, guarantees the normal operation of system.
Wherein, the described first step further comprises the steps:
(a) primary processor is configured corresponding shared control module, with the control of the shared device that obtains to select;
(b) share control module and address, data and control signal are handled, give primary processor, accept its control the access control power of selected shared device according to configuration;
What (c) primary processor obtained to preserve in the selected shared device starts the required program and the information of data from processor; If it is imperfect to start required program or data from processor, then obtains required program or data and be kept at the selected shared device from the outside communication interface of main system.
The shared control module that said method is addressed can be controlled multichannel address, data and other buses, and connects one or more shared devices by address, data and other buses; Simultaneously primary processor can be configured to realize to the control of address, data and other buses with from the control of the startup of processor sharing control module.
The shared device that the present invention shares in the control device can use from system for a plurality of, can not be equipped with ROM equipment thereby make from system, has reused hardware resource, has reduced the quantity and the cost of assembly, reduces hardware design complexity.Simultaneously, primary processor can pass through to share the state of control module control from processor, thereby simplifies the start-up control flow process from system greatly, has reduced the design difficulty of system controlling software.The present invention deposits shared device by main system by sharing control module from required all programs of system start-up and data, rather than by primary processor with from the transmission of the principal and subordinate's communication interface between the processor, has reduced the software development difficulty from system.Simultaneously, from the management of required all programs of system start-up and data and from the startup flow process of system all by main system control, can increase the rate of reusing of main system code greatly, also reduced the software development difficulty of main system.
Description of drawings
Fig. 1 is that the hardware of multicomputer system of the present invention is realized schematic diagram;
Fig. 2 is of the present invention from processor startup process flow diagram;
Fig. 3 is the multicomputer system synoptic diagram of the present invention from system's symmetry;
Fig. 4 is from the asymmetrical multicomputer system synoptic diagram of the present invention of system.
Embodiment
Below in conjunction with a case history and accompanying drawing, be described in further detail to multicomputer system of the present invention and from the concrete enforcement of processor startup method.
Fig. 1 is the synoptic diagram according to a multicomputer system of the invention process.As shown in Figure 1, multicomputer system comprises main system 100, shares control device 300 from system 200 and multiprocessor, although a main system 100 only is provided in the present embodiment and, can also have existed in the multicomputer system of the present invention more from system 200 from system 200.
Comprise processor CPU 110, ROM 120, RAM 130, principal and subordinate's communication interface 140 and outside communication interface 150 in the main system 100.CPU 110 is connected ROM120, RAM 130, principal and subordinate's communication interface 140 and outside communication interface 150 by address, data bus with control signal.120 of ROM are used to store main system 100 and start required program and data, do not comprise start-up routine and data from system 200.Outside communication interface 150 can connect other equipment, as the source from system start-up program and data.
From system 200, comprise processor CPU 210, RAM 230 and principal and subordinate's communication interface 240.CPU210 is connected RAM 230 and principal and subordinate's communication interface 240 by address, data bus with control signal.Also be connected from principal and subordinate's communication interface 240 of system 200, be not limited to specific serial or parallel communication interface from principal and subordinate's communication interface 240 of system 200 and principal and subordinate's communication interface 140 of main system 100 with principal and subordinate's communication interface 140 main system 100.
Multiprocessor is shared control device 300 and is comprised and share control module 310 and ROM 320, and sharing module 310 is connected the CPU 110 of ROM 320, main system 100 respectively by address, data bus and control signal and from the CPU 210 of system 200.
In the present embodiment, the shared device that multiprocessor is shared control device 300 has only comprised ROM 320, but multiprocessor of the present invention is shared the shared device of control device and is not limited to ROM equipment, can also adopt other shared devices such as RAM, SRAM or ethernet controller, these shared devices all are connected with shared control module 310.
Then with reference to process flow diagram shown in Figure 2, on apparatus of the present invention basis, be further described from the main flow process of processor startup method in to present embodiment.
Step S110,110 pairs of shared control modules 310 of the CPU of main system 100 are configured, and to obtain the control of ROM 320, described configuration mainly is meant sets the logic of sharing control module 310, comprise register is set, perhaps set the logic state of special pin etc.;
Step S120, sharing control module 310 handles address, data and control signal according to configuration, give the CPU 110 of main system 100 with the access control power of ROM 320, accept its control, described processing comprises switches address, data and control signal in main system 100, if there is clock signal will eliminate the shake that clock occurs in switching in the control signal, makes main system 100 can visit multiprocessor and share ROM 320 shared devices in the control device 300;
Step S130, what the CPU 110 of main system 100 obtained to preserve in the ROM 320 starts the required program and the information of data from system 200; If it is imperfect to start required program or data from system 200, just obtains required program or data and be kept at the ROM 320 from the outside communication interface 150 of main system 100;
Step S140, ROM 320 have preserved from system 200 and started the required program and the information of data at this moment;
Step S150,110 pairs of shared control modules 310 of the CPU of main system are configured, with the control of abandoning ROM320 and give from system 200;
Step S160 shares control module 310 and according to configuration address, data and control signal is handled, and accepts from the control of the CPU 210 of system 200;
Step S170,110 pairs of shared control modules 310 of the CPU of main system 100 are configured, to start the CPU 210 from system 200;
Step S180 shares control module 310 and according to configuration address, data and control signal is handled, and starts the CPU 210 from system 200;
Step S190 from CPU 210 startups of system 200, reads start-up routine and data from ROM 320, send the link setup requests by principal and subordinate's communication interface 240 to the CPU 110 of main system 100 after initialization finishes;
Step S200, principal and subordinate's communication interface 140 of main system 100 receives after the link setup request of the CPU 210 of system and responds, and sets up communication and connects.
As mentioned above, do not comprise ROM from system 200 but multiprocessor is shared control device 300, provide, and multiprocessor share in the control device 300 ROM 320 also can for other from system's 200 uses, thereby reduced the quantity and the cost of assembly.Simultaneously, main system 100 can be controlled the state of the CPU 210 from system 200 by sharing control module, thereby has simplified the start-up control flow process from system 200 greatly, has reduced the design difficulty of system controlling software.
All programs and the data required from system's 200 startups deposit ROM 320 by main system 100 in by sharing control module, rather than by what transmit between principal and subordinate's communication interface 140 and the principal and subordinate's communication interface 240, have reduced the software development difficulty from system 200.Simultaneously, from system 200 start the management of all required programs and data and from the startup flow process of system 200 all by main system 100 controls, can increase the rate of reusing of main system code greatly, also reduced the software development difficulty of main system.
Only have one in the foregoing description from system, but that multicomputer system of the present invention can also comprise is more a plurality of from system:
Fig. 3 is the multicomputer system synoptic diagram of the present invention from system's symmetry.As shown in the figure, main system have for 100 times first from system 2001, second from system 2002 even more from system, respectively identical from system architecture.In this case, multicomputer system can only adopt a multiprocessor to share control device 300, and main system 100 is shared control device 300 and respectively is connected from system by multiprocessor, also connects by the master-slave communication interface simultaneously.The shared device that multiprocessor is shared in the control device 300 can be one or more as required, and its type can be ROM, RAM or other memory devices.Main system 100 starts selected after system according to abovementioned steps, can start nextly from system according to same step, carries out successively finishing from system start-up up to all.
Fig. 4 is from the asymmetrical multicomputer system synoptic diagram of the present invention of system.As shown in the figure, main system have for 1 00 times first from system 2001, second from system 2002 ..., n is from the 200n of system, m from the 200m of system even more from system, first is identical from system's 2002 structures with second from system 2001, constitutes a class from system; N is identical from system's 200m structure with m from the 200n of system, constitutes another kind of from system.But this two class is inequality from the structure of system, therefore constitutes from the asymmetrical multicomputer system of system.In this case, can share control device for this multicomputer system is provided with two multiprocessors, be respectively that first multiprocessor is shared control device 3001 and second multiprocessor is shared control device 3002, so that under the situation that guarantees the systemic-function integrality, share hardware resource to greatest extent.Comprise first and share control device 3001 from this class of system 2002 from system by first multiprocessor from system 2001 and second and is connected, also pass through the connection of master-slave communication interface simultaneously with main system 100.Start such all required programs and data from system and all be stored in the shared device of the shared control device 3001 of first multiprocessor, this shared device can be one or more as required, and its type can be ROM, RAM or other memory devices; Comprise n and be connected with main system 100 by the shared control device 3002 of second multiprocessor from system from this class of the 200m of system with m, also connect simultaneously by the master-slave communication interface from the 200n of system.Start such all required programs and data from system and all be stored in the shared device of the shared control device 3002 of second multiprocessor, this shared device can be one or more as required, and its type can be ROM, RAM or other memory devices.After main system 100 starts, share control device 3002 by the shared control device 3001 of first multiprocessor and second multiprocessor respectively according to abovementioned steps and start accordingly from system.If one of them depends on another startup from system from system, then in start-up course, should defer to the corresponding order requirement, can from current dependence minimum begin to start from system; Promptly can from current dependence minimum begin to start from processor.
In the above-mentioned multicomputer system, control device 3001 shared by first multiprocessor and the shared control device 3002 of second multiprocessor can be distinguished by address, data bus, other buses or signal specific.For example, can two multiprocessors be shared control device by map addresses is mapped in the different address spaces.Multiprocessor is shared control device and is in a single day distinguished, just can distinguish naturally shared shared device respectively from system, and then finish corresponding processing.
Obviously, the present invention is not limited to the foregoing description, can change and changes according to the demand of reality, and not depart from the scope of the present invention and main idea.
Claims (9)
1. a multiprocessor is shared control device, it is characterized in that comprising a shared control module and at least one shared device;
Described shared control module is accepted the configuration of primary processor, realize the control of address, data and other buses and start control from processor, by address, data bus and control signal and primary processor be connected from processor;
Described shared device is used to preserve startup from processor required program and data, is connected with shared control module by address, data bus and control signal.
2. multicomputer system that comprises the described device of claim 1 is characterized in that comprising a main system, at least one shares control device from system and at least one multiprocessor;
Described main system comprises primary processor, read only memory ROM, random access memory ram, principal and subordinate's communication interface and outside communication interface, ROM is used to store primary processor and starts required program and data, primary processor is connected ROM, RAM, principal and subordinate's communication interface and outside communication interface by address, data bus with control signal, outside communication interface connects other equipment, as the auxiliary source from processor start-up routine and data;
Describedly comprise from processor, RAM and principal and subordinate's communication interface from system, is connected the shared control device of RAM, principal and subordinate's communication interface and multiprocessor from processor with control signal by address, data bus, is connected with principal and subordinate's communication interface of main system from principal and subordinate's communication interface of system.
3. multicomputer system according to claim 2 is characterized in that, described have only one from system; Described multiprocessor is shared control device and is also had only one;
The shared device that described multiprocessor is shared in the control device is ROM, a RAM or other memory devices.
4. multicomputer system according to claim 2 is characterized in that, described is a plurality of from system of symmetry from system; Described multiprocessor is shared control device and is had only one;
The shared device that described multiprocessor is shared in the control device is one or more, and its type is ROM, RAM or other memory devices.
5. multicomputer system according to claim 2 is characterized in that, described is asymmetrical a plurality of from system from system; It is two or more that described multiprocessor is shared control device;
The shared device that described multiprocessor is shared in the control device is one or more, and its type is ROM, RAM or other memory devices.
6. start method in the multicomputer system as claimed in claim 3, it is characterized in that comprising the steps: from processor
The first step, primary processor start finish after, will start required program and data write the shared device from processor by sharing control module;
In second step, primary processor abandons visiting the required address of shared device, data and other buses;
In the 3rd step, primary processor switches to from processor by disposing shared control module address, data and other buses that shared device is required, starts then from processor;
In the 4th step, after the processor startup, set up communication by principal and subordinate's communication interface with primary processor and link;
In the 5th step, primary processor disposes at last to sharing control device as required, to set the last right of attribution of shared device.
7. startup according to claim 6 is characterized in that from the method for processor the described first step further comprises the steps:
(a) primary processor is configured sharing control module, to obtain the control of shared device;
(b) share control module and address, data and control signal are handled, give primary processor, accept its control the access control power of shared device according to configuration;
What (c) primary processor obtained to preserve in the shared device starts the required program and the information of data from processor; If it is imperfect to start required program or data from processor, then obtains required program or data and be kept at the shared device from the outside communication interface of main system.
8. one kind as starting the method from processor in claim 4 or the 5 described multicomputer systems, it is characterized in that comprising the steps:
The first step, primary processor start finish after, will start required program and data write the selected shared device from processor by sharing control module;
In second step, primary processor abandons visiting selected required address, data and other buses of shared device;
In the 3rd step, primary processor is shared control module and will be selected the required address of shared device, data and other buses and switch to selectedly from processor by disposing, and starts selected from processor then;
The 4th step, selected start from processor after, set up communication by principal and subordinate's communication interface with primary processor and link;
In the 5th step, primary processor is prepared to start other from processor according to the order of setting;
The 6th step repeated for second step to the 5th step, finished up to all starting from processor;
In the 7th step, primary processor disposes at last to sharing control device as required, to set the last right of attribution of shared device.
9. startup according to claim 8 is characterized in that from the method for processor the described first step further comprises the steps:
(a) primary processor is configured corresponding shared control module, with the control of the shared device that obtains to select;
(b) share control module and address, data and control signal are handled, give primary processor, accept its control the access control power of selected shared device according to configuration;
What (c) primary processor obtained to preserve in the selected shared device starts the required program and the information of data from processor; If it is imperfect to start required program or data from processor, then obtains required program or data and be kept at the selected shared device from the outside communication interface of main system.
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| CN102306139A (en) * | 2011-08-23 | 2012-01-04 | 北京科技大学 | Heterogeneous multi-core digital signal processor for orthogonal frequency division multiplexing (OFDM) wireless communication system |
| CN107273248A (en) * | 2016-04-05 | 2017-10-20 | 瑞萨电子株式会社 | Semiconductor equipment and access management method |
| CN107770078A (en) * | 2017-10-13 | 2018-03-06 | 广州视源电子科技股份有限公司 | Interactive intelligent tablet computer, the transmission method of data, device and storage medium |
| CN107807615A (en) * | 2017-10-26 | 2018-03-16 | 东莞市乔锋机械有限公司 | A kind of machining center complex control system |
| CN111381882A (en) * | 2018-12-28 | 2020-07-07 | 上海寒武纪信息科技有限公司 | Data processing device and related product |
| CN111381882B (en) * | 2018-12-28 | 2022-12-02 | 上海寒武纪信息科技有限公司 | Data processing device and related product |
| CN112328315A (en) * | 2021-01-04 | 2021-02-05 | 江苏华创微系统有限公司 | Storage sharing type multi-chip processor system based on bridge chip and starting method thereof |
| TWI785870B (en) * | 2021-09-13 | 2022-12-01 | 大陸商訊牧信息科技(上海)有限公司 | Multi-processor system and startup method thereof |
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