CN101162440A - Design method for built-in processor high speed on-line download straight-through channel - Google Patents
Design method for built-in processor high speed on-line download straight-through channel Download PDFInfo
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Abstract
The present invention discloses a design method for the high-speed on-line download direct channel of embedded processor. On the base of the prior single data-downloading mode, the present invention is provided with a data-downloading direct mode and greatly improves downloading speed. In the data-downloading direct mode, a downloading agent service program only needs to set the start address of a downloading data block, and downloads data onto the a direct channel according to address order; on-line debugging interface hardware is responsible for downloading data which is transmitted from the downloading agent service program directly onto the corresponding memory of a target platform. An on-line debugging interface can automatically generate a download address in data direct connection mode, which cancels the calculating and setting process of the redundant addresses of the downloading agent service program, and greatly improves the throughput of data download.
Description
Technical field
The present invention relates to a kind of method for designing of built-in processor high speed on-line download straight-through channel.By in flush bonding processor on-line debugging interface module, increasing special-purpose download straight-through channel, can improve rapidly that main frame downloads and the speed of data, improve code on-line debugging efficient.
Background technology
Along with integrated circuit (IC) design enters SOC (system on a chip) (SoC) epoch, the design complexities of embedded system increases day by day, and function constantly strengthens.Flush bonding processor is the core of embedded system.Improving constantly of the handling property of flush bonding processor makes that need can be designed to software with the function that special hardware circuit is realized originally realizes.Can effectively improve the dirigibility and the extendability of system with the function of software realization.The mistake that stays when increasing new function or revising design can be finished fast by upgrade software.Therefore for Embedded System Design person, can satisfy at processor performance under the situation of specific demand, those specific functions that need realize can be paid the utmost attention to is designed to software.So just cause the software section of embedded system constantly to increase.
Traditional embedded system is debugged target software by the method for on-line debugging on the embedded hardware platform.On-line debugging refers to, communicates by letter between the on-line debugging interface of user by debug host and flush bonding processor, follows the tracks of and the implementation of control flush bonding processor, to reach the requirement of debugging embedded software.Debug host and flush bonding processor on-line debugging interface communicate by standard JTAG.Because JTAG is the bus of a serial, message transmission rate is relatively slow.
In the debug process, the generally support of instrument chain that need be relevant with flush bonding processor.The instrument chain refers to support a whole set of software program of flush bonding processor software translating, link and debugging.Embedded software generally adopts the method for cross compile, with the instrument chain object code is compiled on main frame, and link downloads to by debugged program then and carries out on-line debugging in the target developing system.General embedded system on-line debugging process as shown in Figure 1.
(jtag bus generally is used as boundary scan because the bus of debug communications adopts the very low JTAG universal serial bus of data transfer rate, it is for multiplexing pins that flush bonding processor on-line debugging module adopts this bus protocol), so traditional debugging interface communication speed generally very low (generally all in 10K).Traditional debugging interface adopts pattern data download as shown in Figure 2.The data of finding a word of download agent service routine download from Fig. 2 need be through the operation in 3 stages.Phase one need move into the address of current data downloaded in the processor scan chain, after being carried out by processor then the address is saved in the general-purpose register of processor.Subordinate phase moves into data downloaded in the processor scan chain, is saved in the general-purpose register of processor after being carried out by processor equally.Phase III, instruction processorunit running memory write operation was write data in the corresponding internal memory by move into an internal memory write operation instruction in the processor scan chain.Because each stage all need produce a large amount of redundant data operations, greatly the speed of download of restriction by the TAP controller of software-driven in-circuit debugger.
Along with the continuous expansion of embedded software scale, data downloaded and routine data amount sharply rise.Speed of download has become the bottleneck of restriction Embedded Software Engineer debugging efficiency slowly.Therefore improve the online download of flush bonding processor and debugging speed to become the extremely urgent work that must solve in the flush bonding processor practical application.In order to solve this bottleneck, a few thing before this mainly concentrates on two aspects: an aspect is by improving the frequency of debugger JTAG, improves the bandwidth of data download by the raising communication frequency; The work of another aspect is to download one section specific small routine (bootload) to internal memory with traditional on-line debugging interface earlier, working procedure then, this program can improve speed of download by other high-speed interfaces data download such as (as network interface cards, USB interface) of embedded system.Though the simplest on the first method way, be subjected to the restriction of frequency upgrading; Though second method has improved speed of download to a certain extent, it is to download by round-about way, and the user needs downloading of design specialized, and different application scalability is bad, and downloading process need be created by the user.Based on the starting point that solves speed of download and make things convenient for the user to debug, the present invention proposes a kind of by reducing the redundant data communication between the jtag bus, increase communication efficiency, the specialized hardware download straight-through channel is set, realized lifting significantly the online speed of download of flush bonding processor.
Summary of the invention
The method for designing that the purpose of this invention is to provide a kind of built-in processor high speed on-line download straight-through channel.
Feature comprises as follows:
1) in online hardware debug interface, increases a kind of put-through channel pattern that batch data is downloaded that is intended to carry out;
2) on-line debugging interface inside is provided with piece and downloads initial address register and metadata cache register, is used for depositing from the start address of download agent program transmission and continuous data;
3) the current data download corresponding memory address of the inner generation automatically of on-line debugging interface, word is pressed in the data address support, and half-word and byte are downloaded;
4) the on-line debugging interface is finished the filling of processor scan chain automatically and is downloaded in the streamline by order or data that the interface of processor pipeline will be preset, finishes the operation that instruction is carried out by streamline;
5) download straight-through channel metadata cache register has buffering, is supported in when sending data, receives next data with further raising speed of download;
6) the on-line debugging interface module is supported the dynamic switching of common downloading mode and straight-through downloading mode;
7) the download agent program is provided with the download start address earlier when downloading batch data, downloads batch data then continuously.
Describedly increase a kind of put-through channel pattern that batch data is downloaded that is intended to carry out in online hardware debug interface: the mode of download is downloaded individual data from original single-address, and to change single-address into be that start address is downloaded batch data.
Described on-line debugging interface inside is provided with piece and downloads initial address register and metadata cache register, be used for depositing from the start address of download agent program transmission and continuous data: on the original original register of on-line debugging interface, expand two registers for the download straight-through channel special use, external interface is identical with original register with accessing operation.
The current data download corresponding memory address of the inner generation automatically of described on-line debugging interface, word is pressed in the data address support, half-word and byte are downloaded: the State Control by on-line debugging interface internal hardware logic calculates the destination address that next time needs data downloaded automatically; Hardware control logic is according to configuration information, and automatically according to word, half-word and byte are downloaded.
Described on-line debugging interface is finished the filling of processor scan chain automatically and is downloaded in the streamline by order or data that the interface of processor pipeline will be preset, finish the operation that instruction is carried out by streamline: download straight-through channel is changed by hardware state, automatically the current data that wait for downloads are required address and data message move in the streamline of processor by the scan chain of processor, and processor is operated accordingly according to operation and data that scan chain moves into.
Put-through channel metadata cache register had buffering in described year, be supported in when sending data, receive next data with further raising speed of download: this register is supported in the downloading process of current data, handle next data from the input of JTAG serial port, promptly do not consider at the download agent service routine whether current data is downloaded under the situation about finishing by download straight-through channel, directly send next data, eliminated redundant status poll process, improve data download rate.
Described on-line debugging interface module is supported the dynamic switching of common downloading mode and straight-through downloading mode: the download agent service routine can be downloaded the direct mode operation enable bit by closing, directly close the download direct mode operation, data after this can directly be downloaded by general mode.
Described download agent program is provided with the download start address earlier when downloading batch data, download batch data then continuously: the download agent service routine is in downloading the batch data procedures, at first download start address, download batch data then, move in circles successively, downloaded all data.
Method for designing of the present invention is easy, is easy to realize that hardware spending is very little, and can download by the online of compatible original version, will play a positive role for the debugging efficiency that improves embedded system.
Description of drawings
Fig. 1 is the debug process synoptic diagram of traditional embedded system;
Fig. 2 is 3 process synoptic diagram of conventional download agency service program data download experience;
Fig. 3 is a high-speed downloads put-through channel downloading process synoptic diagram;
Fig. 4 is that high-speed downloads put-through channel hardware is realized schematic diagram;
Fig. 5 is a high-speed downloads put-through channel downloading process state of a control transition diagram.
Embodiment
The present invention has reduced the setting that internal memory operation was set and write to data address redundant in the conventional download pattern, only keeps valid data and downloads single process, has improved the efficient of data downloads, thereby can effectively improve the bandwidth that data are downloaded.
The method for designing of built-in processor high speed on-line download straight-through channel:
1) in online hardware debug interface, increases a kind of put-through channel pattern that batch data is downloaded that is intended to carry out;
2) on-line debugging interface inside is provided with piece and downloads initial address register and metadata cache register, is used for depositing from the start address of download agent program transmission and continuous data;
3) the current data download corresponding memory address of the inner generation automatically of on-line debugging interface, word is pressed in the data address support, and half-word and byte are downloaded;
4) the on-line debugging interface is finished the filling of processor scan chain automatically and is downloaded in the streamline by order or the data that will preset with the interface of processor pipeline, finishes the operation that instruction is carried out by streamline;
5) download straight-through channel metadata cache register has buffering, is supported in when sending data, receives next data with further raising speed of download;
6) the on-line debugging interface module is supported the dynamic switching of common downloading mode and straight-through downloading mode;
7) the download agent program is provided with the download start address earlier when downloading batch data, downloads batch data then continuously.
Describedly increase a kind of put-through channel pattern that batch data is downloaded that is intended to carry out in online hardware debug interface: the mode of download is downloaded individual data from original single-address, and to change single-address into be that start address is downloaded batch data.Downloading process is the single-address multidata, as shown in Figure 3.The download agent service routine is at first opened download straight-through channel by the download straight-through channel enable bit is set.Choose initial address register then, set start address.Choose the download straight-through channel data buffer register at last, continuously data download.Data are downloaded with batch mode, improve downloading rate greatly.
Described on-line debugging interface inside is provided with piece and downloads initial address register and metadata cache register, be used for depositing from the start address of download agent program transmission and continuous data: on the original original register of on-line debugging interface, expand two registers for the download straight-through channel special use, external interface is identical with original register with accessing operation.In original debugging interface passage, can simple extension go out two registers that aim at the download straight-through channel design: initial address register and data buffer register.Two registers have been distinguished 32 hardware registers.
The current data download corresponding memory address of the inner generation automatically of described on-line debugging interface, word is pressed in the data address support, half-word and byte are downloaded: the State Control by on-line debugging interface internal hardware logic calculates the destination address that next time needs data downloaded automatically; Hardware control logic is according to configuration information, and automatically according to word, half-word and byte are downloaded.Download straight-through channel supports that with word (4 byte) half-word (2 byte) and byte are that unit carries out the batch download.In the control register of in-circuit debugger, expand 2 bit registers and represent the pattern of the current download of processor: 00 expression is that unit downloads with the word, 01 expression is that unit downloads with the half-word, and 10 expressions are that unit downloads with the byte, and 11 expressions are with undefined length.Default conditions are that unit downloads according to word, improve downloading efficiency as far as possible.Under the download straight-through channel pattern, the next address that need be downloaded data of the dynamic auto generation of on-line debugging interface.This address is calculated by one 32 hardware address adder unit, and the address can be with 4 bytes, and 2 bytes and 1 byte are that unit increases.This requires upper strata download agent service routine must tell the hardware address totalizer in advance by the address increment pattern position of setting download straight-through channel before data download.The increment mode that 32 hardware address accumulator module will be set according to upper layer software (applications), the unit of directly selecting the address to increase.
The on-line debugging interface is finished the filling of processor scan chain automatically and is downloaded in the streamline by order or the data that will preset with the interface of processor pipeline, finish the operation that instruction is carried out by streamline: download straight-through channel is changed by hardware state, automatically the current data that wait for downloads are required address and data message move in the streamline of processor by the scan chain of processor, and processor is operated accordingly according to operation and data that scan chain moves into.The data of put-through channel are finished filling and the default order of processor pipeline interface and the data of scan chain automatically, finally download data in the target internal memory, need the experience following several stages as shown in Figure 5:
1. idle condition: idle condition is the pattern that a kind of put-through channel is closed.Behind the electrification reset, download straight-through channel enters this state automatically.
2. wait for the start address state: if put-through channel is unlocked, state of a control enters this state by idle condition automatically.The groundwork of this state is to wait for from the download agent service routine sending and next data address the start address that promptly waits for downloads.
3. address transmit status:, enter this state at once if successfully receive by the download agent service routine and send and the data start address of coming.The groundwork of this state is that ready start address is sent to the processor scan chain.After scan chain was filled and finished, processor controls withdrawed from debugging mode executive address preliminary work (address being deposited in the general-purpose register of processor).
4. data waiting status: after the address is successfully sent, enter this state at once.The task of this state is to wait for from download agent service routine end data downloaded.If data are successfully received, enter data at once and send the stage.If what the agency service program moved into is a new address, then state is back to the address and sends the stage, and 3 modes are reset start address set by step.
5. data transmit status: after data are successfully received, download straight-through channel is set handling device scan chain immediately, the current data that receive are transferred to the processor scan chain with relevant steering order, and processor controls withdraws from debugging mode and instructs execution, and current data are deposited in the corresponding general-purpose register.
6. download command produces state: behind the general-purpose register that be saved to processor of processor with data address and data content success, need send the instruction of internal memory write operation to processor, thereby make the data can downloading in the destination address by success.Because the download straight-through channel support is with word, half-word and byte are that unit carries out the batch download, and therefore, this state selects to generate STW according to downloading mode, STH or STB instruction.
7. instruction transmit status: under the instruction transmit status, instruction is sent to the streamline of processor and carries out.
8. waiting status is finished in instruction: because the execution of download instruction needs the time, the instruction that is used for waiting for downloads of this state is complete from streamline.
Next download address produces state: this state is the kernel state of whole download straight-through channel.In this state, hardware will generate the destination address of next data download automatically according to the downloading mode of current put-through channel.This state replaces the process that data address originally is set by the download agent service routine, and the hardware calculated address only needs a clock period, has improved downloading rate greatly.After download address produces, state will change the address automatically over to and send the stage, and the current download address that is generated automatically by hardware is downloaded in the processor.Because the transmission of download address only changes the register in the processor, before the next control of download service program or data arrived, download address was safe and by voidable in advance.
Download straight-through channel metadata cache register has buffering, be supported in when sending data, receive next data with further raising speed of download: this register is supported in the downloading process of current data, handle next data from the input of JTAG serial port, promptly do not consider at the download agent service routine whether current data is downloaded under the situation about finishing by download straight-through channel, directly send next data, eliminated redundant status poll process, improve data download rate.The download agent service routine is by driving the TAP controller (standard JTAG state exchange mechanism) of in-circuit debugger, and data according to protocol requirement, are sent in the shift register of on-line debugging interface in the mode of serial data.The serial data that shift register is responsible for the debugging proxy service routine is sended over is resolved according to the requirement of agreement, and serial data is become parallel data.Parallel data sent in data buffer register or the address register after the TAP controller was finished displacement.At the initial period of bulk transfer, start address need move in the address register by the TAP controller; Follow-up data all can move in the data buffer register according to the order of transmission.Data register can receive and next transmit the data of getting off from JTAG when sending to CPU, has buffering.
The on-line debugging interface module is supported the dynamic switching of common downloading mode and straight-through downloading mode: the download agent service routine can be downloaded the direct mode operation enable bit by closing, and directly closes the download direct mode operation, and data after this can be directly by common download.For the download agent service routine of compatible legacy version, in the control register of processor on-line debugging interface module, the download straight-through channel enable bit is set.Default setting was for closing after this position powered on, download straight-through channel " shut " mode" just.The download agent service routine of original version can be in operate as normal under the general mode owing to this position can be set.Download agent service routine after the renewal can be according to the actual needs, and Dynamic Selection is opened or closed this position and control download straight-through channel.This supports opening and closing automatically of download straight-through channel in downloading process, promptly supports the dynamic handoff functionality of put-through channel downloading mode and general mode.
The download agent program is provided with the download start address earlier when downloading batch data, download batch data then continuously: the download agent service routine is in downloading the batch data procedures, at first download start address, download batch data then, move in circles successively, downloaded all data.Because the inner parallel transfer mode that adopts of processor, inter-process speed is exceedingly fast; And the data speed of download of JTAG serial port does not far catch up with the processing speed of processor inside.Therefore when utilizing download straight-through channel to carry out the data download, the download agent service routine utilizes the characteristic of download straight-through channel, and the download start address at first is set, and the batch data download can reduce the traffic on the JTAG mouth then, thereby improves speed of download.The frequency that improves JTAG will reduce the stand-by period of put-through channel in the data waiting status, further improve the speed of download of program and data.
Claims (8)
1. the method for designing of a built-in processor high speed on-line download straight-through channel, its feature comprises as follows:
1) in online hardware debug interface, increases a kind of put-through channel pattern that batch data is downloaded that is intended to carry out;
2) on-line debugging interface inside is provided with piece and downloads initial address register and metadata cache register, is used for depositing from the start address of download agent program transmission and continuous data;
3) the current data download corresponding memory address of the inner generation automatically of on-line debugging interface, word is pressed in the data address support, and half-word and byte are downloaded;
4) the on-line debugging interface is finished the filling of processor scan chain automatically and is downloaded in the streamline by order or data that the interface of processor pipeline will be preset, finishes the operation that instruction is carried out by streamline;
5) download straight-through channel metadata cache register has buffering, is supported in when sending data, receives next data with further raising speed of download;
6) the on-line debugging interface module is supported the dynamic switching of common downloading mode and straight-through downloading mode;
7) the download agent program is provided with the download start address earlier when downloading batch data, downloads batch data then continuously.
2. the method for designing of a kind of built-in processor high speed on-line download straight-through channel according to claim 1, it is characterized in that, describedly increase a kind of put-through channel pattern that batch data is downloaded that is intended to carry out in online hardware debug interface: the mode of download is downloaded individual data from original single-address, and to change single-address into be that start address is downloaded batch data.
3. the method for designing of a kind of built-in processor high speed on-line download straight-through channel according to claim 1, it is characterized in that, described on-line debugging interface inside is provided with piece and downloads initial address register and metadata cache register, be used for depositing from the start address of download agent program transmission and continuous data: on the original original register of on-line debugging interface, expand two registers for the download straight-through channel special use, external interface is identical with original register with accessing operation.
4. the method for designing of a kind of built-in processor high speed on-line download straight-through channel according to claim 1, it is characterized in that, the current data download corresponding memory address of the inner generation automatically of described on-line debugging interface, word is pressed in the data address support, half-word and byte are downloaded: the State Control by on-line debugging interface internal hardware logic calculates the destination address that next time needs data downloaded automatically; Hardware control logic is according to configuration information, and automatically according to word, half-word and byte are downloaded.
5. the method for designing of a kind of built-in processor high speed on-line download straight-through channel according to claim 1, it is characterized in that, described on-line debugging interface is finished the filling of processor scan chain automatically and is downloaded in the streamline by order or data that the interface of processor pipeline will be preset, finish the operation that instruction is carried out by streamline: download straight-through channel is changed by hardware state, automatically the current data that wait for downloads are required address and data message move in the streamline of processor by the scan chain of processor, and processor is operated accordingly according to operation and data that scan chain moves into.
6. the method for designing of a kind of built-in processor high speed on-line download straight-through channel according to claim 1, it is characterized in that, put-through channel metadata cache register had buffering in described year, be supported in when sending data, receive next data with further raising speed of download: this register is supported in the downloading process of current data, handle next data from the input of JTAG serial port, promptly do not consider at the download agent service routine whether current data is downloaded under the situation about finishing by download straight-through channel, directly send next data, eliminate redundant status poll process, improved data download rate.
7. the method for designing of a kind of built-in processor high speed on-line download straight-through channel according to claim 1, it is characterized in that, described on-line debugging interface module is supported the dynamic switching of common downloading mode and straight-through downloading mode: the download agent service routine can be downloaded the direct mode operation enable bit by closing, directly close the download direct mode operation, data after this can be directly by common download.
8. the method for designing of a kind of built-in processor high speed on-line download straight-through channel according to claim 1, it is characterized in that, described download agent program is when downloading batch data, the download start address is set earlier, download batch data then continuously: the download agent service routine is at first downloaded start address in downloading the batch data procedures, download batch data then, move in circles successively, downloaded all data.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2011137648A1 (en) * | 2010-05-06 | 2011-11-10 | 中兴通讯股份有限公司 | Download method and system based on management data input/output interface |
| CN102968364A (en) * | 2012-11-16 | 2013-03-13 | 中国航天科技集团公司第九研究院第七七一研究所 | Universal debugging interface-based SoC (System on Chip) hardware debugger |
| CN103678751A (en) * | 2012-09-25 | 2014-03-26 | 上海华虹集成电路有限责任公司 | Processor chip simulation debugging system |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100492315C (en) * | 2004-12-15 | 2009-05-27 | 浙江大学 | Embedded signal processor simulator |
| CN100377116C (en) * | 2006-04-04 | 2008-03-26 | 浙江大学 | Processor high-speed data buffer memory reconfiguration method |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2011137648A1 (en) * | 2010-05-06 | 2011-11-10 | 中兴通讯股份有限公司 | Download method and system based on management data input/output interface |
| US9270734B2 (en) | 2010-05-06 | 2016-02-23 | Zte Corporation | Download method and system based on management data input/output interface |
| CN103678751A (en) * | 2012-09-25 | 2014-03-26 | 上海华虹集成电路有限责任公司 | Processor chip simulation debugging system |
| CN103678751B (en) * | 2012-09-25 | 2018-04-27 | 上海华虹集成电路有限责任公司 | Processor chips emulation debugging system |
| CN102968364A (en) * | 2012-11-16 | 2013-03-13 | 中国航天科技集团公司第九研究院第七七一研究所 | Universal debugging interface-based SoC (System on Chip) hardware debugger |
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