CN101140896A

CN101140896A - Method for manufacturing semi-conductor shallow ridges and deep groove

Info

Publication number: CN101140896A
Application number: CNA2006100309665A
Authority: CN
Inventors: 李永海; 周正良
Original assignee: Shanghai Hua Hong NEC Electronics Co Ltd
Current assignee: Shanghai Huahong Grace Semiconductor Manufacturing Corp
Priority date: 2006-09-08
Filing date: 2006-09-08
Publication date: 2008-03-12

Abstract

The invention discloses a manufacturing method for deep groove and shallow groove, which requires the deep groove making first and then the shallow groove making when padding the stuffing into the deep groove to more than half and simultaneously fully packing the deep groove and shallow groove high-integrity with oxide. Thus the top packing of the deep groove can be accomplished by STI process to reduce the isolation area of deep groove and packing both deep and shallow grooves with lower standard of photoetching and alignment precision, which simplify the technological process and the complexity.

Description

Make the method for semi-conductor shallow ridges and deep trouth

Technical field

The present invention relates to a kind of manufacture method of semiconductor trench, especially a kind of method of making semi-conductor shallow ridges and deep trouth.

Background technology

The structure of deep trench isolation and shallow-trench isolation and usefulness more and more comes into one's own in bipolar CMOS (Complementary Metal Oxide Semiconductor) device (BiCMOS) device.Deep trouth can suppress latch up effect (1atch up), isolate bipolar (bipolar transistor) device, and shallow slot is mainly used to the Isolation CMOS device, therefore for the BiCMOS device, all can adopt the structure of deep trench isolation and shallow-trench isolation and usefulness.Traditional deep trench isolation top has taken very large tracts of land with LOCOS (silicon carrying out local oxide isolation) technology; Also there are some to adopt and do shallow slot earlier, do the method for deep trouth again in big shallow slot position, the structure of producing as shown in Figure 1, this structure is done shallow slot earlier, deep trouth 11 is made in position at big shallow slot, as can be seen from Figure, the big shallow slot at deep trouth 11 places can take bigger area, and this manufacture method alignment precision (alignment) of also having relatively high expectations; And do shallow slot earlier, after make deep trouth, need finish respectively to isolate and make, also increased process complexity.

Summary of the invention

Technical problem to be solved by this invention provides a kind of method of making semi-conductor shallow ridges and deep trouth, can produce shallow slot and deep trouth simply fast, simplifies processing step.

For solving the problems of the technologies described above, the technical scheme that the present invention makes the method for semi-conductor shallow ridges and deep trouth is in turn include the following steps:

(1) the hard mask of deposit on silicon substrate;

(2) resist coating, photoetching forms the deep etching figure; The etching deep trouth is removed photoresist, and thermal oxidation forms sidewall oxide at deep trouth sidewall and bottom;

(3) in deep trouth, fill undoped polycrystalline silicon, anti-carve, remove other regional polysilicons;

(4) resist coating, photoresist covers deep trouth, and photoetching forms shallow slot etching figure;

(5) etching shallow slot is removed photoresist, thermal oxidation, and the upside of the polysilicon of filling in shallow slot sidewall and bottom and deep trouth forms sidewall oxide;

(6) fill deep trouth and shallow slot with high-compactness silica (HDP), anti-carve CMP (chemico-mechanical polishing) planarization;

(7) remove hard mask.

The present invention produces the deep trouth and the shallow slot of semiconductor device respectively fast by the mode of twice gluing photoetching, and its step is simple, is easy to realize, has simplified processing step greatly, has reduced production cost.

Description of drawings

The present invention is further detailed explanation below in conjunction with drawings and Examples:

Deep trouth and shallow slot structure schematic diagram that Fig. 1 makes for existing technology;

Fig. 2-Fig. 9 makes the schematic diagram of each step of method of semi-conductor shallow ridges and deep trouth for the present invention;

The deep trouth that Figure 10 makes for the method for making semi-conductor shallow ridges and deep trouth of the present invention and the structural representation of shallow slot.

Reference numeral is among the figure, 1. silicon substrate; 2. silica; 3. silicon nitride; 4. photoresist; 5. sidewall oxide; 6. undoped polycrystalline silicon; 7. photoresist; 8. shallow slot; 9. sidewall oxide; 10. high-compactness silica; 11. deep trouth.

Embodiment

The present invention makes the method for semi-conductor shallow ridges and deep trouth, in turn includes the following steps:

(1) the hard mask of deposit on silicon substrate 1, described hard mask comprises one deck silica 2 and one deck silicon nitride 3, as shown in Figure 2;

(2) resist coating 4, and photoetching forms the deep etching figure, as shown in Figure 3; The etching deep trouth is removed photoresist, and thermal oxidation forms sidewall oxide 5 at deep trouth sidewall and bottom, as shown in Figure 4;

(3) in deep trouth, fill undoped polycrystalline silicon 6, anti-carve, remove other regional polysilicons, as shown in Figure 5;

(4) resist coating 7, and photoresist 7 covers deep trouth, and photoetching forms shallow slot etching figure, as shown in Figure 6;

(5) the etching shallow slot 8, as shown in Figure 7, remove photoresist, thermal oxidation, and the upside of the polysilicon of filling in shallow slot sidewall and bottom and deep trouth forms sidewall oxide 9, as shown in Figure 8;

(6) fill deep trouth and shallow slot with high-compactness silica (HDP) 10, anti-carve, cmp planarizationization, as shown in Figure 9;

(7) remove hard mask, obtain the structure of deep trouth and shallow slot, as shown in figure 10.

The present invention makes the method for semiconductor deep trouth and shallow slot, make deep trouth earlier, filler fill out deep trouth more than half after, do shallow slot again, use high dense oxide (HDP oxide) to fill up deep trouth and shallow slot simultaneously, finish the deep trouth top with STI (shallow-trench isolation) technology so on the one hand and fill, can reduce the deep trench isolation area, owing to reduce the photoetching alignment precision requirement, fill deep trouth and shallow slot simultaneously on the other hand, also simplified technology difficulty and complexity.

The present invention is by reducing traditional deep trench isolation area, thereby increase the integrated level of element, be particularly useful for undersized bipolar CMOS (Complementary Metal Oxide Semiconductor) device (Bipolarcomplementary metal-oxide-semiconductor, BiCMOS), this invention is adopted and is done the order that deep trouth is done shallow slot more earlier, reduce the requirement of photoetching alignment precision, filled shallow slot simultaneously and manufacturing process has also been simplified at the deep trouth top, reduced cost.

Claims

1. a method of making semi-conductor shallow ridges and deep trouth is characterized in that, in turn includes the following steps:

(1) the hard mask of deposit on silicon substrate;

(6) with silica-filled deep trouth of high-compactness and shallow slot, anti-carve cmp planarizationization;

(7) remove hard mask.

2. the method for making semi-conductor shallow ridges according to claim 1 and deep trouth is characterized in that, described hard mask comprises one deck silica.

3. the method for making semi-conductor shallow ridges according to claim 1 and deep trouth is characterized in that, described hard mask comprises one deck silicon nitride.