CN101131329B - Processing circuit for coder signal - Google Patents

Abstract

A correcting circuit of the encoder signal with a high position detecting precision can also correct the phase error with a simple arithmetic processing at the condition that the frequency of the 2-phase sign signal which is used for interpolating is high. The position detector comprises the following components: a peak detector which detects the output signal of the AD convertor, namely the peakvalue of A1 signal and B1 signal; an excursion/amplitude correcting circuit which uses the detected peak value, corrects the error of the excursion and the amplitude, and generates A2 and B2 signal; a phase error detector which detects the intersection value between the A2 signal and the B2 signal; a phase correcting circuit which calculates the correction index of the A2 signal and B2 signal according to the intersection value detected by the phase error detector; a position data converting circuit which converts the sine signal of A phase and B phase to the position data, and the position detector is also arranged with the following components: a speed detector which detects the frequency of the sine signal of A phase and B phase; and a correction judging circuit which judges the updateof the correction value that is switched to excursion, amplitude and phase is valid or invalid.

Description

Encoder signal processing circuit

Technical field

The present invention relates to that the sinusoidal signal of 2 phases of quadrature is carried out interpolation and handle and obtain in the high-resolution scrambler, proofread and correct skew, the amplitude of the sinusoidal signal of 2 phases, the circuit of phase place.

Background technology

Generally formed the position probing of the scrambler of rotary-type (perhaps line style) by light-emitting component and photo detector and the rotary body (perhaps moving body) that formed cancellate seam (slit) between them, resolution is determined at interval by cancellate seam.Therefore, reduced seam at interval in order to improve resolution, but because machining precision or optical diffraction phenomenon improve resolution with this method and have restriction.

So, generally carry out following method in recent years: A, the B sinusoidal simulating signal mutually that generates the signal Synchronization between the seam with rotary body (perhaps moving body) with 90 phase differential of spending, to carry out the signal after interpolation is handled and the signal that obtains by above-mentioned seam synthesizes to this simulating signal, thereby improve resolution.

In order further to improve the resolution of scrambler, need to improve the resolution that interpolation is handled, promptly simulating signal is transformed to the resolution of the AD transducer of digital signal, thereby can improves whole resolution by improving.This AD transducer can be built in micro computer (micro computer) or LSI, but by the resolution of built-in AD transducer high more also be 10bit, in addition, general precision is poor, especially, in order to improve resolution, needs to use the AD transducer IC of monomer.

AD transducer IC and micro computer or LSI have parallel mode and serial mode, but consider that aspect miniaturization or cost serial mode is more effective.But there is the elongated problem of sampling period that sends data in serial mode.For example, under long situation of sampling period of AD transducer, when the frequency gets higher of the sinusoidal signal of 2 phases, the detection number in each cycle reduces, and is difficult to carry out accurately in order to improve the correction of the required skew of precision that interpolation handles, amplitude, phase place.

As the mode that addresses these problems, for example in the flat 7-218288 communique of Japanese Patent Application Laid-Open, take this method: the attenuation coefficient of the amplitude of the sinusoidal signal of 2 phases during with frequency gets higher is stored in the storer in advance, changes the correction of amplitude amount with the compensate for attenuation amount.But though can proofread and correct the damping capacity of the sinusoidal signal of 2 phases, if the sampling period is elongated, during the frequency gets higher of the sinusoidal signal of 2 phases, can not correctly detect maximal value or minimum value, corrected value produces error.

Figure 11 is the maximal value of the frequency of the sinusoidal signal A1, the B1 that are illustrated in 2 phases when high and the figure of the detection waveform of minimum value, and Figure 12 is the figure of waveform of intersection point C45, the C225 of the expression sinusoidal signal that detects 2 phases for the margin of error of detected phase.When frequency was higher, because of the long influence of transformed samples cycle of showing the AD transducer, the sinusoidal signal of conversion became stepped as Figure 11 and Figure 12, so be difficult to correctly detect maximum/minimum and phase error.

Under the state that comprises maximum/minimum and phase error, the waveform that the sinusoidal signal of 2 phases is proofreaied and correct becomes the waveform of distortion as shown in figure 13.Under the situation of so high frequency, produce following problem: even carried out the correction of amplitude damping factor, also produce error in the corrected value of skew, amplitude, phase place, the precision that interpolation is handled worsens.

Summary of the invention

Encoder signal processing circuit of the present invention has following structure.Comprise: the AD transducer is transformed to numerical data with B sinusoidal signal mutually mutually with the A of quadrature, generation A1 signal and B1 signal; Peak detctor, the maximal value and the minimum value of detection A1 signal and B1 signal; Skew/amplitude correction circuit uses by maximal value and minimum value that peak detctor detected, obtains the corrected value of skew and amplitude according to the error of skew and amplitude, proofreaies and correct skew and amplitude, generates A2 signal and B2 signal; Phase error detector, the amount of phase error of detection A2 signal and B2 signal; Phase-correcting circuit according to by the amount of phase error that phase error detector detected, is obtained the corrected value of phase place, generates A3 signal and B3 signal that phase differential becomes 90 degree; The position data translation circuit is a position data from A3 signal and B3 signal transformation; Speed detector detects A phase and B frequency mutually; And the correction decision circuit, be made as the renewal of the corrected value of skew and the corrected value of amplitude and phase place effective or invalid.When having surpassed setpoint frequency by the frequency that speed detector detected, proofread and correct that decision circuit will be offset and the renewal of the corrected value of the corrected value of amplitude and phase place be made as invalid; Becoming setpoint frequency by the frequency that speed detector detected when following, proofreading and correct that decision circuit will be offset and the renewal of the corrected value of the corrected value of amplitude and phase place is made as effectively.

According to said structure, even can obtain the skew of the sinusoidal signal of 2 phases or amplitude, phase place change because timeliness changes, also can proofread and correct these side-play amounts accurately, and under the frequency condition with higher of the sinusoidal signal of 2 phases, can be because of the sparse and affected encoder signal processing circuit in sampling period yet.

Description of drawings

Fig. 1 is the block scheme of the encoder circuit in first embodiment of the present invention.

Fig. 2 is the key diagram of the action waveforms of the peak detctor in first embodiment.

Fig. 3 is the key diagram of the action waveforms of the phase error detector in first embodiment.

Fig. 4 is that the hits in the one-period of sinusoidal signal is under 14 the situation, carries out the result's that interpolation handles key diagram to not using the sinusoidal signal of proofreading and correct judging part.

Fig. 5 is that the hits in the one-period of sinusoidal signal is under 14 the situation, the sinusoidal signal in first embodiment is carried out the result's that interpolation handles key diagram.

Fig. 6 is the block scheme of the encoder circuit in second embodiment.

Fig. 7 is the key diagram of the amplitude-temperature characterisitic in second embodiment.

Fig. 8 is the key diagram of the skew-temperature characterisitic in second embodiment.

Fig. 9 is the block scheme of the encoder circuit in the 3rd embodiment.

Figure 10 is the block scheme of the encoder circuit in the 4th embodiment.

Figure 11 is the key diagram of the maximum/minimum of the detection sinusoidal signal in example in the past.

Figure 12 is the key diagram of the margin of error of the detected phase in example in the past.

Figure 13 is the key diagram of the sinusoidal signal after the correction in the example in the past.

Embodiment

(first embodiment)

Use Fig. 1 to Fig. 8, the phase-correcting circuit of code device signal of the present invention is described.Fig. 1 is the block scheme that expression comprises the encoder signal processing circuit of skew/correction of amplitude, phase correction, Fig. 2 is the action waveforms of expression peak detctor, Fig. 3 is the action waveforms of expression phase error detector, and Fig. 4 and Fig. 5 are the peak detctor when being illustrated in high frequency and the action waveforms of phase error detector.

In Fig. 1, the A0 signal of from the original signal of scrambler output, simulating and B0 signal be have 90 degree phase differential A mutually with B sinusoidal signal mutually.Generally be to constitute by light-emitting component and photo detector and seam plate.

Light-emitting component uses LED or laser, and photo detector uses photodiode or lighting transistor.The seam plate is to be made by the glass or the resin material that see through light, and the cancellate mask by light is set on the seam plate.Be configured to, photo detector accepts the light of self-emission device via the seam light that plate saw through, and because of the seam plate is set on the rotary body of scrambler, so be formed the cancellate shape of seam plate, makes when rotated from photo detector sine wave output shape.

AD transducer 2 will be a digital signal from simulating signal A0 signal, the B0 signal transformation of scrambler output.Because of the amplitude from the simulating signal of scrambler output is hundreds of mV, so use amplifier etc. to amplify tens times, utilize after being transformed to the voltage of the input range (range) that meets AD transducer 2, then can improve the precision of digital signal.

The output signal that peak detctor 15 detects AD transducer 2 is the maximum/minimum of A1 signal, B1 signal.Fig. 2 represents the action waveforms of peak detctor 15, uses this figure that the detection method of maximum/minimum is described.

In Fig. 2, | the A1| signal and | the B1| signal is respectively with the signal of A1 signal and the conversion of B1 signal absolute value.Detect | the A1| signal and | the intersection point of B1| signal generates intersection point signal 18a, 18b, 18c, 18d.As illustrated in fig. 2, be divided into zone 1～zone 4 in this intersection point signal one-period, in zone 1 is to be made as the peaked zone of detecting the A1 signal, in zone 2 are the zones that are made as the minimum value that detects the B1 signal, in zone 3 are the zones that are made as the minimum value that detects the A1 signal, are to be made as the peaked zone of detecting the B1 signal in zone 4.

The action of declare area 1, at first, when detecting intersection point signal 18a, relatively the last sub-value of A1 signal and this sub-value, when this sub-value was big, renewal latch data 16a (max) in this sub-value hour, did not upgrade latch data 16a (max).This action is repeated in interval in zone 1, when detecting intersection point signal 18b, determines the maximal value of latch data 16a (max) as the A1 signal.Because of zone 2, zone 3, zone 4 action identical with zone 1, so omission.Like this, can detect the maximum/minimum of A1 signal, B1 signal.

Skew/amplitude correction circuit 4 uses the maximum/minimum signal 16 that is detected by peak detctor 15, the normalization that A1 signal and B1 signal are removed skew and amplitude.

Use maximum/minimum signal 16, can obtain the skew (OS_DETa, OS_DETb) of A1 signal and B1 signal according to formula 1.In addition, if with the off-set value of proofreading and correct be made as OS_LEVEL, the signal removed after the skew is made as A1d signal and B1d signal, then can remove skew according to formula 2.

(formula 1)

$\left.\begin{array}{c}A1d=A1-\mathrm{OS}\_\mathrm{DETa}+\mathrm{OS}\_\mathrm{LEVEL}\\ B1d=B1-\mathrm{OS}\_\mathrm{DETb}+\mathrm{OS}\_\mathrm{LEVEL}\end{array}\right\}......$ (formula 2)

Use maximum/minimum signal 16, also can obtain the amplitude (PP_DETa, PP_DETb) of A1 signal and B1 signal according to formula 3.In addition, if when the normalization size of amplitude is made as K, can obtain the A2 signal and the B2 signal of the error of having proofreaied and correct skew and amplitude according to formula 4.

(formula 3)

$\left.\begin{array}{c}\mathrm{<figure-callout\; id="2"\; label="A"\; filenames="S071E3780520070810E000011.png,S071E3780520070810E000031.png"\; state="\{\{state\}\}">A</figure-callout>}2=A1d\&times;K/\mathrm{PP}\_\mathrm{<figure-callout\; id="2"\; label="DETa\; B"\; filenames="S071E3780520070810E000011.png,S071E3780520070810E000031.png"\; state="\{\{state\}\}">DETa</figure-callout>}& \\ B2=B1d\&times;K/\mathrm{PP}\_\mathrm{DETb}\end{array}\right\}......$ (formula 4)

Phase correction module 9 is to be made of phase-correcting circuit 6 and phase error detector 7, carry out following effect: detect by phase error detector 7 and be corrected the A2 signal of skew/amplitude, the phase error of B2 signal, according to the margin of error that is detected by phase error detector 7, use A correction signal, the B correction signal that the phase error of A2 signal, B2 signal is proofreaied and correct by phase-correcting circuit 6, output has A3 signal, the B3 signal of the phase differential of 90 degree.

Use Fig. 3 that the details of this action is described.Fig. 3 is to be benchmark with the A2 signal, and only the phase place of B2 signal has become in advance the example of the B2d signal of α orphan's degree.Amplitude is normalized to big or small K by skew/amplitude correction circuit 4, so the amplitude of A2 signal, B2d signal becomes K.

Phase error detector 7 detects the size of the intersection point of A2 signal when detecting intersection point signal 18a, 18b, 18c, 18d, B2d signal, according to this intersection value calculation process and derive the phase correction amount.A2 signal, B2d signal can be represented like that suc as formula 5.The A2 signal of this moment, the intersection point of B2d signal intersect at (π/4-α/2) lonely degree, (5 π/4-α/2) lonely degree, and the size of its intersection point becomes Ksin (π/4-α/2), Ksin (5 π/4-α/2).

Because of mutual equal and opposite in direction, so when being made as C45=Ksin (π/4-α/2), C225=Ksin (5 π/4-α/2), can obtain phase error/2 according to formula 6.In addition, factor 6 is to be that benchmark is obtained the B correction signal with the A2 signal, so according to sin ^-1Formula calculate, but can the B2d signal be benchmark also obviously, according to cos ^-1Formula and obtain.

$\left.\begin{array}{c}A2=K\sin \mathrm{\&theta;}\\ B2d=K\cos (\mathrm{\&theta;}+\mathrm{\&alpha;})\end{array}\right\}......$ (formula 5)

$\left.\begin{array}{c}\mathrm{\&alpha;}/2=\mathrm{\&pi;}/4-{\sin }^{-1}(C45/K)\\ \mathrm{\&alpha;}/2=\mathrm{\&pi;}/4-{\sin }^{-1}(C225/K)\end{array}\right\}......$ (formula 6)

In addition, phase-correcting circuit 6 can come the phase calibration error according to formula 7, formula 8.Wherein, Kp1, Kp2 are the phase correction gains that is used to obtain A correction signal, B correction signal, set the phase correction gain, so that the phase differential of A3 signal and B3 signal becomes 90 degree.

A3=A2+Kp1B2d=Ksin θ+Kp1Kcos (θ+α) ... (formula 7)

B3=B2d+Kp2A2=Kcos (θ+α)+Kp2Ksin θ ... (formula 8)

The method of obtaining of Kp1 and Kp2 then, is described.In formula 7, because of θ=-α/2 o'clock, as long as make the A3 signal become 0, so Kp1 can obtain according to formula 9.

$\left.\begin{array}{c}0=K\sin (-\mathrm{\&alpha;}/2)+\mathrm{<figure-callout\; id="1"\; label="Kp"\; filenames="S071E3780520070810E000051.png"\; state="\{\{state\}\}">Kp</figure-callout>}1\&CenterDot;K\cos (\mathrm{\&alpha;}/2)\\ \mathrm{<figure-callout\; id="1"\; label="Kp"\; filenames="S071E3780520070810E000051.png"\; state="\{\{state\}\}">Kp</figure-callout>}1=\tan (\mathrm{\&alpha;}/2)\end{array}\right\}......$ (formula 9)

In addition, equally in formula 8, because of in θ=pi/2-α/2 o'clock, as long as make B3 become 0, so Kp2 can obtain according to formula 10.

$\left.\begin{array}{c}0=K\cos (\mathrm{\&pi;}/2+\mathrm{\&alpha;}/2)+\mathrm{<figure-callout\; id="2"\; label="Kp"\; filenames="S071E3780520070810E000011.png,S071E3780520070810E000031.png"\; state="\{\{state\}\}">Kp</figure-callout>}2\&CenterDot;K\sin (\mathrm{\&pi;}/2-\mathrm{\&alpha;}/2)\\ \mathrm{<figure-callout\; id="2"\; label="Kp"\; filenames="S071E3780520070810E000011.png,S071E3780520070810E000031.png"\; state="\{\{state\}\}">Kp</figure-callout>}2=\tan (\mathrm{\&alpha;}/2)\end{array}\right\}......$ (formula 10)

Because of the Kp1 that obtained according to formula 9 and formula 10 and Kp2 can be represented by cotype mutually, so the burden of computing reduces by half.A2 signal, B2 signal (B2d signal) are obtained α/2 according to formula 6, obtain the phase correction gain according to formula 9 or formula 10, can obtain having proofreaied and correct A3 signal, the B3 signal of the side-play amount of phase place by use formula 7 and formula 8.

Then, the A3 signal of having proofreaied and correct phase place, the size of B3 signal are described.The maximal value of the amplitude of formula 7 and formula 8 be respectively θ=pi/2-α/2, θ=-point of α/2, so these are brought into formula 7 and formula 8, then A3 signal, B3 signal become formula 11 and formula 12, can be proofreaied and correct by identical size as shown in Figure 3.In the one-period of 2 phase signals, there are two intersection points, use so also can average to handle with the Kp that intersection point is separately obtained.

$\left.\begin{array}{c}A3=K\sin (\mathrm{\&pi;}/2-\mathrm{\&alpha;}/2)+\mathrm{Kp}\&CenterDot;K\cos (\mathrm{\&pi;}/2+\mathrm{\&alpha;}/2)\\ =K\cos (\mathrm{\&alpha;}/2)-\mathrm{Kp}\&CenterDot;K\sin (\mathrm{\&alpha;}/2)\end{array}\right\}......$ (formula 11)

$\left.\begin{array}{c}B3=K\cos (\mathrm{\&alpha;}/2)+\mathrm{Kp}\&CenterDot;K\sin (-\mathrm{\&alpha;}/2)\\ =K\cos (\mathrm{\&alpha;}/2)-\mathrm{Kp}\&CenterDot;K\sin (\mathrm{\&alpha;}/2)\end{array}\right\}......$ (formula 12)

Then, position data conversion circuit 10 is described.Use has A3 signal, the B3 signal of phase differential of 90 degree, and use formula 13 then can easily be transformed to the angle-data θ IP (14) of interpolation.

θ IP=tan ^-1(A3/B3) ... (formula 13)

Then, corrected value refresh circuit 23 of the present invention is described.Corrected value refresh circuit 23 is made of speed detector 21 and correction decision circuit 22.Speed detector 21 detects the frequency signal 19 of the sinusoidal signal of 2 phases.Because of frequency becomes the A1 signal that detected by AD transform component 2 and the amount of movement between the B1 signals sampling,, can easily obtain so detected value by calculating last time and this detected value is poor.

As other method, by the sinusoidal signal of 2 phases being compared and be transformed to square wave, measure the time between the edge of square wave of conversion in the central value of separately sine wave, can obtain frequency.Proofread and correct decision circuit 22 and accept the frequency information of the frequency signal 19 obtained by speed detector 21, with corrected value update signal 20 (for example, it is the signal of L that the renewal of corrected value is made as when invalid) output to peak detctor 15 and phase error detector 7, make when frequency signal 19 is higher than the frequency of a certain setting, be not offset renewal with the corrected value of amplitude and phase place.

In addition, when frequency signal 19 is lower than the frequency of setting, in order to be offset the renewal with the corrected value of amplitude and phase place, corrected value update signal 20 (when for example, making the renewal of corrected value effective is the signal of H) is outputed to peak detctor 15 and phase error detector 7.

The frequency setting that switches corrected value update signal 20 is for can correctly detecting the value of corrected value.The benchmark of setting is, frequency setting is cut apart more than (per 5 degree samplings) for can detect 72 during the one-period of the sinusoidal signal of 2 phases, then the error of corrected value can be suppressed less.In the sinusoidal signal of 2 phases because temperature or supply voltage, The noise and easily under the situation of change, though the position detection accuracy of scrambler can worsen, can with cut apart number set (for example, per 10 degree are sampled) less.

In addition, make the setting of the frequency of upgrading corrected value have hysteresis characteristic, be lower than from effectively switching to the setting of invalid frequency by being made as, thereby can become stable change action from the invalid setting that switches to effective frequency.

Fig. 4 and Fig. 5 are that expression is carried out the result that interpolation is handled with the sinusoidal signal of 2 phases, all are under the high frequency operating state, during the one-period of sine wave in, AD transform component 2 be sampled as 14 times situation.Fig. 4 is the situation of not proofreading and correct judging part in previous methods, and Fig. 5 is provided with correction decision circuit of the present invention, and the renewal of corrected value is made as waveform under the invalid situation.The detection of corrected value can not normally be carried out in previous methods, so there is deviation in the difference between sampling, but can be roughly certain in the method for the invention.

As mentioned above, circuit structure and calculation process by first embodiment, even can obtain the skew of the sinusoidal signal of 2 phases or amplitude, phase place change because timeliness changes, also can proofread and correct these side-play amounts accurately, and under the frequency condition with higher of the sinusoidal signal of 2 phases, can be because of the sparse and affected high-resolution scrambler in sampling period yet.

(second embodiment)

Use Fig. 6 to Fig. 8, second embodiment of the present invention is described.Different with first embodiment is Temperature Detector 24 to be set measure circuit temperature on every side, and the correcting value this point with temperature is proofreaied and correct skew or amplitude is explained.

Fig. 6 be with Fig. 1 in the same manner, use sinusoidal signal A0, the B0 of 2 phases, calculate the figure of angle-data θ IP (14), different with Fig. 1, this structure is to peak detctor 15 output temperature data 33.

Temperature Detector 24 is measured the temperature around the circuit, by using thermistor or temperature sensor IC, easily detected temperatures.Exported renewal with corrected value when being made as invalid signal (corrected value update signal 20) proofreading and correct decision circuit 22, the skew of 15 storage this moments of peak detctor and the correcting value and the temperature of this moment of amplitude.

Temperature data 33 from Temperature Detector 24 is input to peak detctor 15 termly, and with the temperature of storage relatively, if produce temperature difference, then be offset correction with the corrected value of amplitude according to temperature.

Fig. 7 and Fig. 8 are the curves of representing amplitude-temperature characterisitic, skew-temperature characterisitic respectively, obtain temperature coefficient in advance according to these temperature characterisitics.In addition, be under the nonlinear situation in data, by ROM is set along with the variation of temperature rate, thereby can easily carry out the correction of temperature.

As mentioned above, circuit structure and calculation process according to second embodiment, even can obtain the skew of the sinusoidal signal of 2 phases or amplitude, phase place change because temperature variation, timeliness change, also can proofread and correct these side-play amounts accurately, and under the frequency condition with higher of the sinusoidal signal of 2 phases, can be because of the sparse and affected high-resolution scrambler in sampling period yet.

(the 3rd embodiment)

Use Fig. 9, the 3rd embodiment of the present invention is described.Different with second embodiment is, in the structure of the sinusoidal signal A0, the B0 that generate 2 phases, appended LED light quantity correcting circuit 31, the amplitude of A0 signal and B0 signal is remained the circuit structure of influence of the temperature characterisitic of the deterioration that necessarily and not can be subjected to LED (light-emitting component) or LED and photo detector, this is described.

LED light quantity correcting circuit 31 is to be made of LED illuminating circuit 25 and LED light receiving circuit 27 and LED fader control circuit 29.LED illuminating circuit 25 is to be made of LED (light-emitting component) and the transistor that is used to regulate the electric current that flows to LED.

By the electric current that flows through LED is increased, LED luminous quantity 26 can be increased.LED light receiving circuit 27 is to be made of the photo detector of PD (photodiode) or PTR (lighting transistor) etc. and operational amplifier.

When the light time of accepting from LED, photo detector is transformed to voltage and output corresponding to this light quantity.Because these voltages are very little magnitudes of voltage of hundreds of mV, so amplify utilization by operational amplifier.In LED light receiving circuit 27, not only be provided for generating the photo detector of sinusoidal signal, also be provided with the photo detector that is used to measure light quantity, the light quantity of being measured is exported as measuring light quantity 28.

LED fader control circuit 29 comparative measurements light quantities 28 and the reference voltage that is determined in advance, and the control circuit of passing ratio integration control etc. generates fader control signal 30, makes them equate.The fader control signal 30 that generates is imported into LED illuminating circuit 25, is used to regulate the electric current that flows to LED.

The reference voltage of setting in LED fader control circuit 29 is set to, and the sinusoidal signal A0 signal of 2 phases that will be generated by LED light quantity correcting circuit 31, the amplitude of B0 signal are included in the level measured of AD translation circuit 2 and got final product.

As mentioned above, circuit structure and calculation process according to the 3rd embodiment, by LED light quantity correcting circuit 31 is set, can reduce the sinusoidal signal A0 signal of 2 phases, the amplitude change of B0 signal, so can obtain resisting temperature variation, timeliness variation, and under the high situation of the frequency of the sinusoidal signal of 2 phases, can be because of the sparse and affected high-resolution scrambler in sampling period.

(the 4th embodiment)

Use Figure 10, the 4th embodiment of the present invention is described.Different with the 3rd embodiment is, has 2 kinds of setpoint frequencies that are used to judge proofreading and correct decision circuit 22, and this is described.

Proofread and correct decision circuit 22 and can set the effective or invalid signal of renewal of the corrected value of the corrected value that makes skew and amplitude and phase place respectively individually.When the frequency gets higher of the sinusoidal signal A0 of 2 phases signal and B0 signal, because of the sampling period of AD translation circuit 2 longer, so assay intervals is sparse.

For A1 signal, the B1 signal of the sinusoidal signal of 2 phases that detect at peak detctor 15, because of the variation of the size of the value around the peak value less, so be difficult to be subjected to the sparse influence that produces in sampling period.Therefore, can be in proofreading and correct decision circuit 22, set the 1st setpoint frequency that is used to determine to be offset with the renewal of the corrected value of amplitude than the highland.

For example, even produce the side-play amount of ± 8 degree, peak value also just decays 1%.In can allowing the system of 1% change, the hits in each cycle of the sinusoidal signal of 2 phases can be allowed to become till 22.5 (360/16) the frequency.The corrected value of phase place detects the A2 signal of sinusoidal signal of 2 phases and the intersection point of B2 signal, changes at 1% o'clock in this intersection value, and the scope of angle becomes ± 0.6 degree.Therefore, in proofreading and correct decision circuit 22, compare, set the 2nd setpoint frequency of the renewal of the corrected value that is used to determine phase place than the lowland with the 1st setpoint frequency.

As mentioned above, by adopting the frequency of in the correction decision circuit 22 of the 4th embodiment, setting to be set at 2 kinds of structures that skew and correction of amplitude usefulness and phase correction are used individually, can reduce the sinusoidal signal A0 signal of 2 phases, the amplitude change of B0 signal, so can obtain resisting temperature variation, timeliness variation, and under the high situation of the frequency of the sinusoidal signal of 2 phases, can be because of the sparse and affected high-resolution scrambler in sampling period.

(the 5th embodiment)

The 5th embodiment of the present invention is described.Different with first to fourth embodiment is, proofreaies and correct decision circuit 22 and constitutes, and judgement will be offset renewal with which corrected value of the corrected value of the corrected value of amplitude or phase place and be made as effectively or invalid, and this is described in detail.In the lower system of the frequency of the A0 signal of the sinusoidal signal of 2 phases and B0 signal, as previously mentioned, can ignore the change of amplitude, so will be offset and the renewal of the corrected value of amplitude be made as all the time effectively also no problem.At this moment, only the renewal of the corrected value of detected phase correction is made as effectively or is invalid.

In addition, in linear detecting element (linear scale) etc., have the situation of the side-play amount of phase place by the precision decision of cancellate seam plate, at this moment, phase-correcting circuit 6 does not carry out phase correction to be handled, and only is offset with correction of amplitude to get final product.Being updated to effectively and invalid getting final product of the corrected value of 22 judgement skews of correction decision circuit and amplitude.

As mentioned above, can obtain proofreading and correct that decision circuit 22 can constitute also that being updated to of the corrected value of judging skew and amplitude is effective or invalid, effective or invalid which of being updated to of phase correcting value be updated to effective or invalid, because can make circuit scale suppress lessly, so can reduce cost, resisting temperature changes, timeliness changes, and under the high situation of the frequency of the sinusoidal signal of 2 phases, can be because of the sparse and affected high-resolution scrambler in sampling period.

In addition,, 2 phase signals are illustrated as sine wave, but also can carry out the correction of phase place to pseudo sine wave, the triangular wave that has distortion at waveform with identical structure from first embodiment to the, five embodiments.

Claims (5)

1. encoder signal processing circuit comprises:

The AD translation circuit is transformed to numerical data with B sinusoidal signal mutually mutually with the A of quadrature, generation A1 signal and B1 signal;

Peak detctor, the maximal value and the minimum value of detection A1 signal and B1 signal;

Skew/amplitude correction circuit uses by maximal value and minimum value that described peak detctor detected, according to the error of skew and amplitude, obtains the corrected value of skew and amplitude, proofreaies and correct skew and amplitude, generates A2 signal and B2 signal;

Phase error detector detects the amount of phase error of described A2 signal and B2 signal;

Phase-correcting circuit according to by the amount of phase error that described phase error detector detected, is obtained the corrected value of phase place, generates A3 signal and B3 signal that phase differential becomes 90 degree;

The position data translation circuit is a position data from described A3 signal and B3 signal transformation;

Speed detector detects described A phase and B frequency mutually; And

Proofread and correct decision circuit, the renewal of the corrected value of the corrected value of described skew and amplitude and described phase place is made as effective or invalid,

When having surpassed setpoint frequency by the frequency that described speed detector detected, it is invalid that described correction decision circuit is made as the renewal of the corrected value of the corrected value of described skew and amplitude and described phase place; Become setpoint frequency by the frequency that described speed detector detected when following, described correction decision circuit is made as the renewal of the corrected value of the corrected value of described skew and amplitude and described phase place effectively.

2. encoder signal processing circuit as claimed in claim 1 also comprises the Temperature Detector that is used to measure circuit temperature on every side,

Be made as under the invalid situation by of the renewal of described correction decision circuit the corrected value of the corrected value of described skew and amplitude and described phase place, according to by temperature that described Temperature Detector detected and the temperature difference when calculating the corrected value of described skew and amplitude and the A that obtains in advance mutually with the temperature coefficient of B sinusoidal signal mutually, proofread and correct the corrected value of described skew and amplitude.

3. encoder signal processing circuit as claimed in claim 1 is characterized in that,

The prime of AD transform component comprise with described A mutually and the size of the amplitude of B sinusoidal signal mutually be controlled to be certain LED light quantity correcting circuit.

4. encoder signal processing circuit as claimed in claim 1 is characterized in that,

When having surpassed the 1st setpoint frequency by the frequency that described speed detector detected, it is invalid that described correction decision circuit is made as the renewal of the corrected value of described skew and amplitude; Become the 1st setpoint frequency by the frequency that described speed detector detected when following, described correction decision circuit is made as the renewal of the corrected value of described skew and amplitude effectively; When having surpassed the 2nd setpoint frequency by the frequency that described speed detector detected, it is invalid that described correction decision circuit is made as the renewal of the corrected value of described phase place; Become the 2nd setpoint frequency by the frequency that described speed detector detected when following, described correction decision circuit is made as the renewal of the corrected value of described phase place effectively.

5. encoder signal processing circuit as claimed in claim 1 is characterized in that,

Described correction decision circuit is made as the renewal of the corrected value of any correcting circuit of described skew and amplitude correction circuit and described phase-correcting circuit effective or invalid.

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